CN111665432A - Verification method, device, equipment and storage medium for chip pin multiplexing module - Google Patents
Verification method, device, equipment and storage medium for chip pin multiplexing module Download PDFInfo
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- CN111665432A CN111665432A CN202010441876.5A CN202010441876A CN111665432A CN 111665432 A CN111665432 A CN 111665432A CN 202010441876 A CN202010441876 A CN 202010441876A CN 111665432 A CN111665432 A CN 111665432A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/2856—Internal circuit aspects, e.g. built-in test features; Test chips; Measuring material aspects, e.g. electro migration [EM]
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
- G01R31/287—Procedures; Software aspects
Abstract
The invention discloses a verification method, a device, equipment and a storage medium for a chip pin multiplexing module, wherein the implementation steps of the verification method comprise: acquiring all signals of a chip pin multiplexing module; and verifying the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal for the functional signal. The invention can solve the problems that the verification work of the chip pin multiplexing module is complicated and easy to make mistakes, realizes the automation of the verification of the chip pin multiplexing module, greatly reduces the verification workload and improves the verification accuracy.
Description
Technical Field
The invention relates to the technical field of chip testing, in particular to a verification method, a verification device, verification equipment and a storage medium for a chip pin multiplexing module.
Background
The chip pin multiplexing module has the main functions of connecting each part of a chip to external signals for function multiplexing and then leading out through pins, and the main functions are to reduce the output of chip pins and realize more pin functions in a limited pin range. Along with the rapid development of hardware technology, the integrated pin function of chip is also more and more, can reach hundreds of thousands, and consequently, the multiplexing module of chip pin is also more and more complicated, and the pin is multiplexing as the inside direct passageway that carries out data transmission with the outside of chip, even the function of chip inside is again correct, the multiplexing of pin goes wrong, also is that the merit is short of one and is short of one.
In summary, the verification work of the chip pin multiplexing module is very important, but the chip pin multiplexing module has more wires, and the verification work is tedious and is easy to make mistakes.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: aiming at the problems in the prior art, the invention provides a verification method, a verification device, verification equipment and a storage medium for a chip pin multiplexing module, which can solve the problems that the verification work of the chip pin multiplexing module is complicated and easy to make mistakes, realize the automation of the verification of the chip pin multiplexing module, greatly reduce the verification workload and improve the verification accuracy.
In order to solve the technical problems, the invention adopts the technical scheme that:
a verification method of a chip pin multiplexing module comprises the following implementation steps:
1) acquiring all signals of a chip pin multiplexing module;
2) and verifying the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal for the functional signal.
Optionally, the detailed steps of step 2) include:
2.1) traversing to obtain a signal of the chip pin multiplexing module as a current signal;
2.2) judging the type of the current signal, if the type of the current signal is a control signal, filling a script file for verifying the connectivity of the control signal into a configuration end of the control signal, and then generating an assertion sequence for indicating whether the connectivity of the control signal is qualified at an implementation end of the control signal according to the script file for verifying the connectivity of the control signal; if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, then generating an assertion sequence for indicating whether the connectivity of the functional signal is qualified at a receiving end of the functional signal according to the script file for verifying the connectivity of the functional signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal;
2.3) judging whether the signal of the chip pin multiplexing module is completely traversed or not, and if not, skipping to execute the step 2.1); otherwise, finishing traversing and exiting.
Optionally, the script file for verifying the functionality of the function signal comprises a function attribute of the function signal.
Optionally, the step of verifying the functionality of the functional signal according to a script file for verifying the functionality of the functional signal includes:
s1) generating a test stimulus conforming to the protocol timing of the function signal, the test stimulus including a write request and a read request transmitted to an external device, according to a script file for verifying the functionality of the function signal;
s2) according to the test stimulus, indicating a first module in the chip for sending the write request to the external equipment, sending first data carried by the write request to a chip pin multiplexing module, and sending the first data to the external equipment through the chip pin multiplexing module; according to the test excitation, indicating a second module in the chip for sending the read request to the external equipment, sending the read request to a chip pin multiplexing module, sending the read request to the external equipment through the chip pin multiplexing module, and enabling the external equipment to return second data to the chip; the second data is data sent to the external equipment by the chip pin multiplexing module;
s3) comparing the first data and the second data to obtain a comparison result, and determining whether the transmission process of the first data and the read request conforms to the protocol timing of the function signal when the first data and the read request are sent to the external device through the chip pin multiplexing module.
Optionally, step S3) is followed by the step of obtaining a final functional verification result according to the comparison result and the determination result of whether the protocol timing of the functional signal is met: when the comparison result indicates that the first data and the second data are the same and the judgment result of whether the protocol time sequence of the functional signal is met indicates that the transmission process of the first data and the read request is met with the protocol time sequence of the functional signal, judging that the functionality of the functional signal is qualified; otherwise, judging that the functionality of the functional signal is not qualified.
In addition, the invention also provides a verification device of the chip pin multiplexing module, which comprises the following implementation steps:
the signal acquisition program unit is used for acquiring all signals of the chip pin multiplexing module;
and the signal verification program unit is used for verifying the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal.
Optionally, the signal verification program unit includes:
the signal traversal selection program module is used for traversing and acquiring a signal of the chip pin multiplexing module as a current signal;
the signal traversal processing program module is used for judging the type of the current signal, and if the type of the current signal is a control signal, a script file used for verifying the connectivity of the control signal is injected into a configuration end of the control signal; if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal;
the signal traversal judging program module is used for judging whether the signal of the chip pin multiplexing module is traversed completely or not, and if the signal is not traversed completely, the signal traversal selecting program module is skipped to execute; otherwise, finishing traversing and exiting.
In addition, the invention also provides a verification device of the chip pin multiplexing module, which comprises a computer device, wherein the computer device is programmed or configured to execute the steps of the verification method of the chip pin multiplexing module, or a computer program which is programmed or configured to execute the verification method of the chip pin multiplexing module is stored on a memory of the computer device.
In addition, the invention also provides a verification device of the chip pin multiplexing module, which at least comprises a memory and a microprocessor, wherein the microprocessor is programmed or configured to execute the steps of the verification method of the chip pin multiplexing module, or the memory stores a computer program which is programmed or configured to execute the verification method of the chip pin multiplexing module.
Furthermore, the present invention also provides a computer-readable storage medium having stored thereon a computer program programmed or configured to execute the verification method of the chip pin multiplexing module.
Compared with the prior art, the invention has the following advantages: the implementation steps of the verification method of the invention comprise obtaining all signals of the chip pin multiplexing module; the invention can solve the problems that the verification work of the chip pin multiplexing module is complicated and easy to make mistakes, realizes the automation of the verification of the chip pin multiplexing module, greatly reduces the verification workload and improves the verification accuracy.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the structures shown in the drawings without creative efforts.
FIG. 1 is a schematic diagram of a basic flow of a method according to an embodiment of the present invention.
FIG. 2 is a schematic flow chart of step 2) of the method according to the embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a verification apparatus of a chip pin multiplexing module according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a verification device of a chip pin multiplexing module according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention. It should be noted that the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of the present invention, "a plurality" means two or more unless specifically defined otherwise.
As shown in fig. 1, the implementation steps of the verification method for the chip pin multiplexing module of this embodiment include:
1) acquiring all signals of a chip pin multiplexing module;
2) and verifying the connectivity of the signals according to the script file for verifying the connectivity of the signals and verifying the functionality of the functional signals according to the script file for verifying the functionality of the functional signals for the functional signals.
The chip pin multiplexing module comprises a control signal and a function signal, wherein the control signal comprises a pin multiplexing signal, a pull-up and pull-down resistance signal, a driving capability signal and the like. And in the embodiment of the present invention, the specific way of performing connectivity verification on the control signal and the functional signal is different. As shown in fig. 2, the detailed steps of step 2) include:
2.1) traversing to obtain a signal of the chip pin multiplexing module as a current signal;
2.2) judging the type of the current signal;
if the type of the current signal is the control signal, filling a script file for verifying the connectivity of the control signal into a configuration end of the control signal, and then generating an assertion sequence for indicating whether the connectivity of the control signal is qualified or not at an implementation end of the control signal according to the script file for verifying the connectivity of the control signal; the assertion sequence directly indicates that the connectivity of the control signal is qualified (or disqualified), and whether the connectivity of the control signal is qualified or not is clear through the assertion sequence. More specifically, the script file for verifying the connectivity of the control signal may be pre-input to the verification platform through a graphical interaction interface of the verification platform, and after the script file for verifying the connectivity of the control signal is injected into the configuration end of the control signal, the verification platform may run the script file and generate an assertion sequence at the implementation end of the control signal, thereby completing verification of the connectivity of the control signal;
if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, and then generating an assertion sequence for indicating whether the connectivity of the functional signal is qualified or not at a receiving end of the functional signal according to the script file for verifying the connectivity of the functional signal; the obtained assertion sequence directly indicates that the connectivity of the functional signal is qualified (or unqualified), and whether the connectivity of the functional signal is qualified or not is clear through the assertion sequence. More specifically, the script file for verifying the connectivity of the functional signal may be pre-input to the verification platform through a graphical interaction interface of the verification platform, and after the script file for verifying the connectivity of the functional signal is injected into the sending end of the functional signal, the verification platform may run the script file and generate an assertion sequence at the receiving end of the functional signal, thereby completing verification of the connectivity of the functional signal.
If the type of the current signal is a function signal, the method further comprises the step of verifying the functionality of the function signal according to a script file for verifying the functionality of the function signal. In the embodiment of the invention, whether the functions of all functional signals in the chip can be correctly realized after the functional signals are processed by the complex multiplexing logic of the chip pin multiplexing module is the main purpose of functional verification. The script file for verifying the functionality of the functional signal includes a functional attribute of the functional signal, that is, the script file includes information for describing what kind of function the functional signal is for implementing, and the script file can be pre-input to the verification platform through a graphical interaction interface of the verification platform.
2.3) judging whether the signal of the chip pin multiplexing module is completely traversed or not, and if not, skipping to execute the step 2.1); otherwise, finishing traversing and exiting.
In this embodiment, the script file for verifying the functionality of the function signal includes the function attribute of the function signal.
In this embodiment, the step of verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal includes:
s1) generating a test stimulus conforming to the protocol timing of the function signal according to a script file for verifying the functionality of the function signal, the test stimulus including a write request and a read request transmitted to an external device; it should be noted that the write request and the read request sent to the external device are functions of verified function signals, that is, the function signals are used for sending the write request and the read request to the external device. It should be further noted that, the verification platform generates a protocol timing sequence according to the functional attribute of the verified functional signal, so as to ensure data communication with the external device.
S2) according to the test excitation, indicating a first module used for sending a write request to external equipment in the chip, sending first data carried by the write request to a chip pin multiplexing module, and sending the first data to the external equipment through the chip pin multiplexing module; it should be noted that the Chip may be a System-on-a-Chip (SOC), and correspondingly, the Chip pin multiplexing module is a Chip pin multiplexing module of the SOC. According to the test excitation, indicating a second module used for sending a read request to external equipment in the chip, sending the read request to a chip pin multiplexing module, sending the read request to the external equipment through the chip pin multiplexing module, and enabling the external equipment to return second data to the chip; the second data is data sent to the external equipment by the chip pin multiplexing module;
s3) comparing the first data with the second data to obtain a comparison result, and judging whether the transmission process of the first data and the read request accords with the protocol time sequence of the function signal when the first data and the read request are sent to the external equipment through the chip pin multiplexing module. In an embodiment of the present invention, the verification platform may generate the monitoring model for performing the above steps S1) to S3) according to the functional attribute of the verified functional signal.
As an optional implementation manner, step S3) of this embodiment further includes a step of obtaining a final result of the functionality verification according to the comparison result and the determination result of whether the protocol timing of the functional signal is met: when the comparison result indicates that the first data and the second data are the same and the judgment result of whether the protocol time sequence of the functional signal is met indicates that the transmission process of the first data and the read request is met with the protocol time sequence of the functional signal, judging that the functionality of the functional signal is qualified; otherwise, judging that the functionality of the functional signal is not qualified.
For the understanding of the functional verification of the functional signal, a bus (LPC) signal is taken as an example herein to further explain the process of functional verification.
When the verification platform identifies that the functional attributes describing the functional signals in the script file are all signals of a corresponding LPC protocol, the verification platform can automatically generate excitation for writing data and reading data access requests on the LPC signals, sends the excitation to an LPC controller in a chip, and the LPC controller sends the excitation to a chip pin multiplexing module through an LPC pin and then sends the excitation to external equipment.
Wherein the monitoring model is responsible for monitoring transmissions on the bus. When the request starting period of the LPC bus is monitored, a time sequence monitoring part in a monitoring model judges whether a signal continues to a DIR period of a clock period, an address period of a clock period and TAR and Sync of one period respectively after the starting period according to a protocol specification, and then the signal is a data period, and at this time, the data monitoring part in the monitoring model stores the data value of the corresponding data period for comparison of subsequent read-write data. Finally, TAR and End are each one cycle. And when the monitoring model monitors a stop signal on the bus, the transmission is finished once, the monitoring is stopped, and finally, a functional verification result of the LPC signal is obtained according to the monitoring results of the time sequence monitoring part and the data monitoring part of the monitoring model.
It should be noted that, in the embodiment of the present invention, the verification platform verifies the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal, by referring to the signal; and then, aiming at the functional signal of the chip pin multiplexing module, verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal, so that the verification of the chip pin multiplexing module can be completed, and the automation of the verification of the chip pin multiplexing module is realized, thereby greatly reducing the verification workload and improving the verification accuracy.
In addition, this embodiment further provides a verification apparatus for a chip pin multiplexing module, and the implementation steps include:
the signal acquisition program unit is used for acquiring all signals of the chip pin multiplexing module;
and the signal verification program unit is used for verifying the connectivity of the signals according to the script file for verifying the connectivity of the signals and verifying the functionality of the functional signals according to the script file for verifying the functionality of the functional signals by the functional signals aiming at each signal of the chip pin multiplexing module.
In this embodiment, the signal verification program unit includes:
the signal traversal selection program module is used for traversing and acquiring a signal of the chip pin multiplexing module as a current signal;
the signal traversal processing program module is used for judging the type of the current signal, and if the type of the current signal is the control signal, the script file used for verifying the connectivity of the control signal is poured into the configuration end of the control signal; if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal;
the signal traversal judging program module is used for judging whether the signal of the chip pin multiplexing module is traversed completely or not, and if the signal is not traversed completely, the signal traversal selecting program module is skipped to execute; otherwise, finishing traversing and exiting.
In addition, the present embodiment further provides a verification apparatus for a chip pin multiplexing module, which includes a computer device programmed or configured to execute the steps of the verification method for the chip pin multiplexing module, or a computer program programmed or configured to execute the verification method for the chip pin multiplexing module is stored in a memory of the computer device.
As shown in fig. 3, an embodiment of the present invention further provides a verification apparatus for a chip pin multiplexing module, including: a first authentication module 21 and a second authentication module 22.
The first verification module 21 is configured to verify connectivity of each signal of the chip pin multiplexing module according to a script file for verifying connectivity of the signal; the signal is a control signal or a functional signal; and a second verifying module 22, configured to verify, according to the script file for verifying the functionality of the functional signal, the functionality of the functional signal of the chip pin multiplexing module.
Optionally, the first verification module 21 includes: a first authentication unit and a second authentication unit.
The first verification unit is used for injecting a script file for verifying the connectivity of the control signal into the configuration end of the control signal when the signal is the control signal; and the second verification unit is used for generating an assertion sequence used for indicating whether the connectivity of the control signal is qualified at the realization end of the control signal according to the script file used for verifying the connectivity of the control signal.
Optionally, the first verification module 21 includes: a third verification unit and a fourth verification unit.
The third verification unit is used for injecting a script file for verifying the connectivity of the functional signal into the sending end of the functional signal when the signal is the functional signal; and the fourth verification unit is used for generating an assertion sequence used for indicating whether the connectivity of the functional signal is qualified at the receiving end of the functional signal according to the script file used for verifying the connectivity of the functional signal.
In the embodiment of the present invention, the verification apparatus 20 of the chip pin multiplexing module is a device corresponding to the verification method of the chip pin multiplexing module, which can greatly reduce the verification workload of the chip pin multiplexing module and improve the verification accuracy.
It should be noted that the verification apparatus 20 of the chip pin multiplexing module includes all modules or units for implementing the verification method of the chip pin multiplexing module, and in order to avoid too many repetitions, the modules or units of the verification apparatus 20 of the chip pin multiplexing module are not described herein again.
As shown in fig. 4, the present embodiment further provides a verification apparatus for a chip pin multiplexing module, which at least includes a memory 31 and a microprocessor 32, where the microprocessor 32 is programmed or configured to execute the steps of the verification method for the chip pin multiplexing module, or the memory stores a computer program programmed or configured to execute the verification method for the chip pin multiplexing module. That is, in the embodiment of the present invention, when the verifying apparatus 30 of the chip pin multiplexing module executes the computer program, the steps of the verifying method of the chip pin multiplexing module described above are implemented, so that the verifying workload of the chip pin multiplexing module can be greatly reduced, and the verifying accuracy is improved.
In addition, the present embodiment also provides a computer-readable storage medium, on which a computer program programmed or configured to execute the verification method of the chip pin multiplexing module is stored. That is, in the embodiment of the present invention, when the computer program of the computer-readable storage medium is executed by the processor, the steps of the verification method for the chip pin multiplexing module are implemented, so that the verification workload of the chip pin multiplexing module can be greatly reduced, and the verification accuracy is improved. Illustratively, the computer program of the computer-readable storage medium comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, and the like. The computer-readable medium may include: any entity or device capable of carrying the computer program code, recording medium, usb disk, removable hard disk, magnetic disk, optical disk, computer Memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier wave signals, telecommunications signals, software distribution medium, and the like.
As will be appreciated by one skilled in the art, embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein. The present application is directed to methods, apparatus (systems), and computer program products according to embodiments of the application wherein instructions, which execute via a flowchart and/or a processor of the computer program product, create means for implementing functions specified in the flowchart and/or block diagram block or blocks. These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks. These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may occur to those skilled in the art without departing from the principle of the invention, and are considered to be within the scope of the invention.
Claims (10)
1. A verification method of a chip pin multiplexing module is characterized by comprising the following implementation steps:
1) acquiring all signals of a chip pin multiplexing module;
2) and verifying the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal for the functional signal.
2. The method for verifying the chip pin multiplexing module according to claim 1, wherein the detailed step of step 2) comprises:
2.1) traversing to obtain a signal of the chip pin multiplexing module as a current signal;
2.2) judging the type of the current signal, if the type of the current signal is a control signal, filling a script file for verifying the connectivity of the control signal into a configuration end of the control signal, and then generating an assertion sequence for indicating whether the connectivity of the control signal is qualified at an implementation end of the control signal according to the script file for verifying the connectivity of the control signal; if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, then generating an assertion sequence for indicating whether the connectivity of the functional signal is qualified at a receiving end of the functional signal according to the script file for verifying the connectivity of the functional signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal;
2.3) judging whether the signal of the chip pin multiplexing module is completely traversed or not, and if not, skipping to execute the step 2.1); otherwise, finishing traversing and exiting.
3. The method of claim 2, wherein the script file for verifying the functionality of the functional signal comprises a functional attribute of the functional signal.
4. The method for verifying the pin multiplexing module according to claim 2, wherein the step of verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal comprises:
s1) generating a test stimulus conforming to the protocol timing of the function signal, the test stimulus including a write request and a read request transmitted to an external device, according to a script file for verifying the functionality of the function signal;
s2) according to the test stimulus, indicating a first module in the chip for sending the write request to the external equipment, sending first data carried by the write request to a chip pin multiplexing module, and sending the first data to the external equipment through the chip pin multiplexing module; according to the test excitation, indicating a second module in the chip for sending the read request to the external equipment, sending the read request to a chip pin multiplexing module, sending the read request to the external equipment through the chip pin multiplexing module, and enabling the external equipment to return second data to the chip; the second data is data sent to the external equipment by the chip pin multiplexing module;
s3) comparing the first data and the second data to obtain a comparison result, and determining whether the transmission process of the first data and the read request conforms to the protocol timing of the function signal when the first data and the read request are sent to the external device through the chip pin multiplexing module.
5. The method for verifying the multiplexing module of chip pins according to claim 4, wherein step S3) is followed by the step of obtaining a final functional verification result according to the comparison result and the judgment result of whether the protocol timing sequence of the functional signal is met: when the comparison result indicates that the first data and the second data are the same and the judgment result of whether the protocol time sequence of the functional signal is met indicates that the transmission process of the first data and the read request is met with the protocol time sequence of the functional signal, judging that the functionality of the functional signal is qualified; otherwise, judging that the functionality of the functional signal is not qualified.
6. A verifying device of a chip pin multiplexing module is characterized by comprising the following implementation steps:
the signal acquisition program unit is used for acquiring all signals of the chip pin multiplexing module;
and the signal verification program unit is used for verifying the connectivity of each signal of the chip pin multiplexing module according to the script file for verifying the connectivity of the signal and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal.
7. The apparatus for verifying the chip pin multiplexing module according to claim 6, wherein the signal verification program unit comprises:
the signal traversal selection program module is used for traversing and acquiring a signal of the chip pin multiplexing module as a current signal;
the signal traversal processing program module is used for judging the type of the current signal, and if the type of the current signal is a control signal, a script file used for verifying the connectivity of the control signal is injected into a configuration end of the control signal; if the type of the current signal is a functional signal, filling a script file for verifying the connectivity of the functional signal into a sending end of the functional signal, and verifying the functionality of the functional signal according to the script file for verifying the functionality of the functional signal;
the signal traversal judging program module is used for judging whether the signal of the chip pin multiplexing module is traversed completely or not, and if the signal is not traversed completely, the signal traversal selecting program module is skipped to execute; otherwise, finishing traversing and exiting.
8. An apparatus for verifying a chip pin multiplexing module, comprising a computer device, wherein the computer device is programmed or configured to perform the steps of the method for verifying the chip pin multiplexing module according to any one of claims 1 to 5, or a memory of the computer device has stored thereon a computer program programmed or configured to perform the method for verifying the chip pin multiplexing module according to any one of claims 1 to 5.
9. An apparatus for verifying a chip pin multiplexing module, comprising at least a memory and a microprocessor, wherein the microprocessor is programmed or configured to perform the steps of the method for verifying the chip pin multiplexing module according to any one of claims 1 to 5, or the memory has stored thereon a computer program programmed or configured to perform the method for verifying the chip pin multiplexing module according to any one of claims 1 to 5.
10. A computer-readable storage medium having stored thereon a computer program programmed or configured to perform a method of verifying a pin multiplexing module of a chip according to any of claims 1 to 5.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010441876.5A CN111665432B (en) | 2020-05-22 | 2020-05-22 | Verification method, device, equipment and storage medium for chip pin multiplexing module |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010441876.5A CN111665432B (en) | 2020-05-22 | 2020-05-22 | Verification method, device, equipment and storage medium for chip pin multiplexing module |
Publications (2)
| Publication Number | Publication Date |
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| CN111665432A true CN111665432A (en) | 2020-09-15 |
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Citations (5)
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|---|---|---|---|---|
| EP0639006A1 (en) * | 1993-08-13 | 1995-02-15 | Lattice Semiconductor Corporation | Multiplexed control pins for in-system programming and boundary scan testing using state machines in a high density programmable logic device |
| EP0840217A1 (en) * | 1996-10-31 | 1998-05-06 | STMicroelectronics Limited | An integrated circuit with TAP (test access port) controller |
| CN102169160A (en) * | 2010-02-08 | 2011-08-31 | 无锡中星微电子有限公司 | Pin multiplexing verifying device and method for integrated circuit |
| CN108268676A (en) * | 2016-12-30 | 2018-07-10 | 联芯科技有限公司 | The verification method and device of pin multiplexing |
| CN110579701A (en) * | 2019-09-16 | 2019-12-17 | 晶晨半导体(上海)股份有限公司 | Method for detecting pin connectivity of integrated chip |
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Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0639006A1 (en) * | 1993-08-13 | 1995-02-15 | Lattice Semiconductor Corporation | Multiplexed control pins for in-system programming and boundary scan testing using state machines in a high density programmable logic device |
| EP0840217A1 (en) * | 1996-10-31 | 1998-05-06 | STMicroelectronics Limited | An integrated circuit with TAP (test access port) controller |
| CN102169160A (en) * | 2010-02-08 | 2011-08-31 | 无锡中星微电子有限公司 | Pin multiplexing verifying device and method for integrated circuit |
| CN108268676A (en) * | 2016-12-30 | 2018-07-10 | 联芯科技有限公司 | The verification method and device of pin multiplexing |
| CN110579701A (en) * | 2019-09-16 | 2019-12-17 | 晶晨半导体(上海)股份有限公司 | Method for detecting pin connectivity of integrated chip |
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