CN102131346B - Circuit board and manufacturing process thereof - Google Patents
Circuit board and manufacturing process thereof Download PDFInfo
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- CN102131346B CN102131346B CN201010004501.9A CN201010004501A CN102131346B CN 102131346 B CN102131346 B CN 102131346B CN 201010004501 A CN201010004501 A CN 201010004501A CN 102131346 B CN102131346 B CN 102131346B
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- layer
- conductive layer
- blind hole
- wiring board
- base plate
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Abstract
A circuit board comprises a circuit substrate, a medium layer, a first conductive layer and a second conductive layer. The circuit substrate has a first surface and a first circuit layer. The medium layer is arranged on the circuit substrate and covers the first surface and the first circuit layer. The medium layer has a second surface, at least one blind hole extending from the second surface to the first circuit layer and a first intagliated pattern. The first conductive layer is arranged in the blind hole. The second conductive layer is arranged in the intagliated pattern and the blind hole and covers the first conductive layer. The second conductive layer is electrically connected to the first circuit layer through the first conductive layer.
Description
Technical field
The invention relates to a kind of wiring board (circuit board) and preparation method thereof, and particularly about a kind of wiring board with better reliability and preparation method thereof.
Background technology
Wiring board technology now develops into buried circuit board (embedded circuit board) from general common non-buried circuit board.In detail, general common non-buried circuit board is characterised in that its circuit is to give prominence on the surface of dielectric layer, and buried circuit board is characterised in that its circuit is embedded in dielectric layer in being.The line construction of wiring board is all to form respectively by photoetching making method or laser ablation mode conventionally.
Utilize the manufacture method of build-up circuit structure of the buried circuit board that laser ablation mode formed as example taking tradition, it comprises the following steps.First, provide a dielectric layer to have on the circuit base plate of a line layer one.Then,, at surface irradiation one laser beam of dielectric layer, be connected to the blind hole of line layer to form an intaglio pattern and.Afterwards, electroplate manufacture method to form the conductive layer that fills up blind hole and intaglio pattern.So far, the build-up circuit structure of buried circuit board roughly completes.
But, while electroplating manufacture method, because the degree of depth of blind hole is different with the degree of depth of intaglio pattern, therefore easily not good because electroplating condition control, and make formed conductive layer have the inhomogeneous phenomenon of thickness distribution.Thus, when follow-up while removing the conductive layer being positioned at beyond intaglio pattern and blind hole, by the thickness of wayward removed conductive layer so that easily in the process removing the conductive layer of improper thinning built-in type or improper residual unnecessary electric conducting material on dielectric layer.In addition, the follow-up build-up circuit layer that carries out on this dielectric layer is again while making, and problem produces with yields is not high etc. to electroplate that manufacture method easily has that quality is bad, thus, easily reduces the manufacture method yields of build-up circuit structure, and then reduces the reliability of wiring board.
Summary of the invention
The invention provides a kind of wiring board and preparation method thereof, can promote the reliability of wiring board.
The present invention proposes a kind of wiring board, and it comprises a circuit base plate, a dielectric layer, one first conductive layer and one second conductive layer.Circuit base plate has a first surface and one first line layer.Dielectric layer is configured on circuit base plate and covers first surface and the first line layer.Dielectric layer has a second surface, at least one blind hole and intaglio pattern that extends to the first line layer from second surface.The first conductive layer is configured in blind hole.The second conductive layer is configured in intaglio pattern and blind hole, and covers the first conductive layer.The second conductive layer is electrically connected to the first line layer by the first conductive layer.
In one embodiment of this invention, the degree of depth of above-mentioned blind hole is H, and the thickness of the first conductive layer is h, and 0.2≤(h/H)≤0.9.
In one embodiment of this invention, above-mentioned intaglio pattern is connected with blind hole.
In one embodiment of this invention, above-mentioned wiring board also comprises an active layer, is configured between the intaglio pattern of dielectric layer and the second conductive layer and is configured between the first conductive layer and the second conductive layer.
In one embodiment of this invention, in the first above-mentioned line layer, be embedded in circuit base plate, and a surface of the first line layer trims in fact with first surface.
In one embodiment of this invention, the first above-mentioned line layer is configured on the first surface of circuit base plate.
In one embodiment of this invention, the second above-mentioned conductive layer and the second surface of dielectric layer trim in fact.
The present invention also proposes a kind of manufacture method of wiring board.First, provide a circuit base plate.Circuit base plate has a first surface and at least one the first line layer.Then, form a dielectric layer on circuit base plate.Dielectric layer has a second surface, and dielectric layer covers first surface and the first line layer.The second surface of dielectric layer is irradiated to a laser beam, extend to blind hole and an intaglio pattern of the first line layer to form at least one second surface from dielectric layer.Then, form one first conductive layer in blind hole.Finally, form one second conductive layer in intaglio pattern and blind hole.The second conductive layer covers the first conductive layer, and the second conductive layer is electrically connected to the first line layer by the first conductive layer.
In one embodiment of this invention, above-mentioned laser beam is infrared laser light source or ultraviolet laser light source.
In one embodiment of this invention, the method for above-mentioned formation the first conductive layer in blind hole comprises chemical deposition.
In one embodiment of this invention, the degree of depth of above-mentioned blind hole is H, and the thickness of the first conductive layer is h, and 0.2≤(h/H)≤0.9.
In one embodiment of this invention, before above-mentioned formation the second conductive layer, also comprise and form an active layer on the second surface of dielectric layer, in intaglio pattern and on the first conductive layer.
In one embodiment of this invention, the method for above-mentioned formation the second conductive layer in intaglio pattern and blind hole comprises chemical deposition.
In one embodiment of this invention, after above-mentioned formation the second conductive layer, also comprise the second conductive layer is carried out to a grinding manufacture method, to the second surface that exposes dielectric layer.
In one embodiment of this invention, in the first above-mentioned line layer, be embedded in circuit base plate, and a surface of the first line layer trims in fact with first surface.
In one embodiment of this invention, the first above-mentioned line layer is configured on the first surface of circuit base plate.
In one embodiment of this invention, above-mentioned intaglio pattern is connected with blind hole.
In one embodiment of this invention, the second above-mentioned conductive layer and the second surface of dielectric layer trim in fact.
Based on above-mentioned, because the manufacture method of wiring board of the present invention is first to form the first conductive layer in blind hole, to reduce difference in height between blind hole and intaglio pattern, then, then form on first conductive layer of the second conductive layer in blind hole with intaglio pattern in.The conductive layer that thus, can make to be formed in blind hole and intaglio pattern can have preferably even thickness degree and surface smoothness.Compared to the making of traditional circuit plate, wiring board of the present invention and preparation method thereof, can effectively avoid tradition to electroplate filling perforation effect not enough or excessively and the problem such as conductive layer uniformity is not good, has preferably reliability.
For above-mentioned feature and advantage of the present invention can be become apparent, special embodiment below, and coordinate accompanying drawing to be described in detail below.
Brief description of the drawings
Fig. 1 is the generalized section of a kind of wiring board of one embodiment of the present of invention.
The generalized section of the manufacture method of a kind of wiring board that Fig. 2 A to Fig. 2 F is one embodiment of the present of invention.
Main element symbol description
100: wiring board
110: circuit base plate
112: first surface
114: the first line layers
120: dielectric layer
122: second surface
124a, 124b: blind hole
126: intaglio pattern
130: the first conductive layers
140: the second conductive layers
150: active layer
L: laser beam
H, h: thickness
Embodiment
Fig. 1 is the generalized section of a kind of wiring board of one embodiment of the present of invention.Please refer to Fig. 1, in the present embodiment, wiring board 100 comprises a circuit base plate 110, a dielectric layer 120, one first conductive layer 130 and one second conductive layer 140.It is worth mentioning that, the structure of wiring board 100 can only have uniline layer, or has multilayer line layer.That is to say, wiring board 100 can be individual layer wiring board (single layer circuit board), double-layered circuit board (double layer circuit board) or multilayer circuit board (multi-layer circuit board).In the present embodiment, Fig. 1 only describes taking wiring board 100 as one build-up circuit boards.
In detail, circuit base plate 110 has a first surface 112 and one first line layer 114, and wherein the first line layer 114 is configured on the first surface 112 of circuit base plate 110.That is to say the first line layer 114 a kind of general line layer (non-embedded line layer) at last.Should be noted that at this, in the embodiment shown in fig. 1, although the first line layer 114 is to be configured on the first surface 112 of circuit base plate 110.But, in other unshowned embodiment, the first line layer 114 also can in be embedded in circuit base plate 110, and a surface of the first line layer 114 trims in fact with first surface 112.This means, the first line layer 114 a kind of embedded line layer at last substantially.In other words, the structure of the circuit base plate 110 shown in Fig. 1 is only for illustrating, and non-limiting the present invention.
Dielectric layer 120 is configured on circuit base plate 110 and covers first surface 112 and the first line layer 114.In the present embodiment, dielectric layer 120 has a second surface 122, at least onely extends to blind hole (two blind hole 124a, 124b are only schematically shown Fig. 1) and an intaglio pattern 126 of the first line layer 114 from second surface 122, and wherein blind hole 124a is connected with intaglio pattern 126.
The first conductive layer 130 is configured in blind hole 124a, 124b, and wherein the degree of depth of blind hole 124b (or blind hole 124a) is H, and the thickness of the first conductive layer 130 is h, preferably, and 0.2≤(h/H)≤0.9.The second conductive layer 140 is configured in intaglio pattern 126 and blind hole 124a, 124b, and covers the first conductive layer 130.That is to say, the second conductive layer 140 is configured in intaglio pattern 126 and on the first conductive layer 130.Particularly, the second conductive layer 140 can be electrically connected to by the first conductive layer 130 the first line layer 114 of circuit base plate 110, and the second conductive layer 140 trims in fact with the second surface 122 of dielectric layer 120.
In addition, the wiring board 100 of the present embodiment also comprises an active layer 150, and wherein active layer 150 is configured between the intaglio pattern 126 of dielectric layer 120 and the second conductive layer 140 and is configured between the first conductive layer 130 and the second conductive layer 140.Wherein, the material composition of active layer 150 comprises metal, and it is for example palladium.
In blind hole 124a, 124b due to the dielectric layer 120 of the present embodiment, dispose the first conductive layer 130, therefore can reduce the difference in height between blind hole 124a, 124b and intaglio pattern 126.If when (h/H) large, the meaning i.e. thickness of the first conductive layer 130 is thicker, can make the thickness of the second conductive layer 140 of blind hole 124a, the configuration of 124b domestic demand level off to the thickness of the second conductive layer 140 of intaglio pattern 126 wishs configurations.Thus, in the time that the second conductive layer 140 is configured in to blind hole 124a, 124b and intaglio pattern 126, can there is preferably even thickness degree and surface smoothness.In other words,, compared to conventional art, it is not enough or excessively and the problem such as conductive layer uniformity is not good that the design of the wiring board 100 of the present embodiment can effectively avoid tradition to electroplate filling perforation effect, has preferably reliability.
Below only introduce the structure of wiring board 100 of the present invention, do not introduce the manufacture method of wiring board 100 of the present invention.To this, below by the structure of the wiring board with in Fig. 1 100 as an example, and coordinate Fig. 2 A to Fig. 2 F to be described in detail the manufacture method of wiring board 100 of the present invention.
The generalized section of the manufacture method of a kind of wiring board that Fig. 2 A to Fig. 2 F is one embodiment of the present of invention.Please refer to Fig. 2 A, according to the manufacture method of the wiring board 100 of the present embodiment, first, provide a circuit base plate 110.Circuit base plate 110 has a first surface 112 and one first line layer 114, and wherein the first line layer 114 is configured on the first surface 112 of circuit base plate 110.In other words, substantially can be at last a kind of general line layer (being non-embedded line layer) of the first line layer 114.Should be noted that at this, in other unshowned embodiment, the first line layer 114 also can in be embedded in circuit base plate 110, and a surface of the first line layer 114 trims in fact with first surface 112.This means, the first line layer 114 a kind of embedded line layer at last substantially.Therefore, circuit base plate 110 structures shown in Fig. 2 A are only for illustrating, and non-limiting the present invention.
Then, refer again to Fig. 2 A, form a dielectric layer 120 on circuit base plate 110, wherein dielectric layer 120 has a second surface 122, and dielectric layer 120 covers first surface 112 and the first line layer 114.
Then, please refer to Fig. 2 B, the second surface 122 of dielectric layer 120 is irradiated to a laser beam L, at least onely extend to blind hole (two blind hole 124a, 124b are only schematically shown Fig. 2 B) and an intaglio pattern 126 of the first line layer 114 from the second surface 122 of dielectric layer 120 to form.Wherein, intaglio pattern 126 is connected with blind hole 124a.In the present embodiment, laser beam L is for example infrared laser light source or ultraviolet laser light source.
Then, please refer to Fig. 2 C, form one first conductive layer 130 in blind hole 124a, 124b.Wherein, form the method for the first conductive layer 130 in blind hole 124a, 124b and comprise chemical deposition.Particularly, in the present embodiment, the degree of depth of blind hole 124b (or blind hole 124b) is H, and the thickness of the first conductive layer 130 is h, preferably, and 0.2≤(h/H)≤0.9.
Then, please refer to Fig. 2 D, form an active layer 150 on the second surface 122 of dielectric layer 120, in intaglio pattern 126 and on the first conductive layer 130, in order to there is the initiation that makes to produce chemical deposition reaction on dielectric layer 120 surfaces, in order to forming the second conductive layer 140 (please refer to Fig. 2 E), and continue and form the second conductive layer 140 at the first conductive layer 130, fill up electric conducting material and complete blind hole.In the present embodiment, the main material composition of active layer 150 is for example palladium.
Then, please refer to Fig. 2 E, form one second conductive layer 140 in intaglio pattern 126 and blind hole 124a, 124b, wherein the second conductive layer 140 covers the first conductive layer 130, and the second conductive layer 140 is electrically connected to the first line layer 114 by the first conductive layer 130.Now, the second surface 122 of the second conductive layer 140 blanket dielectric layer 120.In addition, form the second conductive layer 140 and comprise chemical deposition in intaglio pattern 126 and the method in blind hole 124a, 124b.
Finally, please refer to Fig. 2 F, the second conductive layer 140 is carried out to a grinding manufacture method, to the second surface 122 that exposes dielectric layer 120.That is to say, after grinding manufacture method, can remove the active layer 150 on the second surface 122 that is positioned at dielectric layer 120, and expose second surface 122, so that the second conductive layer 140 trims in fact with the second surface 122 of dielectric layer 120.So far, to complete the making of wiring board 100.
Should be noted that at this, although the present embodiment grinds manufacture method after forming the second conductive layer 140, but in other unshowned embodiment, if when the surface smoothness of the second conductive layer 140 depositing is better, can omit the step of grinding manufacture method.In other words, the grinding manufacture method step described in the present embodiment determines whether a selectivity step of implementing for the surface smoothness of the second visual deposited conductive layer 140, and non-essential manufacture method step.
Because the manufacture method of the wiring board 100 of the present embodiment is first to form the first conductive layer 130 in blind hole 124a, 124b, to reduce difference in height between blind hole 124a, 124b and intaglio pattern 126, then, then form on first conductive layer 130 of the second conductive layer 140 in blind hole 124a, 124b with intaglio pattern 126 in.The conductive layer that thus, can make to be formed in blind hole 124a, 124b and intaglio pattern 126 can have preferably even thickness degree and surface smoothness.Compared to the making of traditional circuit plate, it is not enough or excessively and the problem such as conductive layer uniformity is not good that the manufacture method of the wiring board 100 of the present embodiment can effectively avoid tradition to electroplate filling perforation effect, has preferably reliability.
In sum, because the present invention disposes the first conductive layer in blind hole, therefore can effectively reduce difference in height between blind hole and intaglio pattern, configure the thickness of the second conductive layer to make the thickness of the second conductive layer of blind hole domestic demand configuration level off to intaglio pattern wish.Thus, in the time that the second conductive layer is configured in to blind hole and intaglio pattern, can there is preferably even thickness degree and surface smoothness.Compared to conventional art, it is not enough or excessively and the problem such as conductive layer uniformity is not good that the design of wiring board of the present invention can effectively avoid tradition to electroplate filling perforation effect, has preferably reliability.
Although the present invention with embodiment openly as above; so it is not in order to limit the present invention; under any, in technical field, have and conventionally know the knowledgeable; without departing from the spirit and scope of the present invention; when doing a little change and retouching, therefore protection scope of the present invention is when being as the criterion depending on claims person of defining.
Claims (15)
1. a wiring board, comprising:
One circuit base plate, has a first surface and one first line layer;
One dielectric layer, is configured on this circuit base plate and covers this first surface and this first line layer, and this dielectric layer has a second surface, an intaglio pattern and at least one blind hole that extends to this first line layer from this second surface;
One first conductive layer, is configured in this blind hole and only covers whole inner bottom surfaces and the part medial surface of this blind hole; And
One second conductive layer, is configured in this intaglio pattern and this blind hole, and covers this first conductive layer, and wherein this second conductive layer is electrically connected to this first line layer by this first conductive layer.
2. wiring board according to claim 1, also comprises an active layer, is configured between this intaglio pattern of this dielectric layer and this second conductive layer and is configured between this first conductive layer and this second conductive layer.
3. wiring board according to claim 1 and 2, wherein the degree of depth of this blind hole is H, and the thickness of this first conductive layer is h, and 0.2≤(h/H)≤0.9.
4. wiring board according to claim 1, is wherein embedded in this circuit base plate in this first line layer, and a surface of this first line layer trims in fact with this first surface.
5. wiring board according to claim 1, wherein this first line layer is configured on this first surface of this circuit base plate.
6. according to the wiring board described in claim 1,4 or 5, wherein this second surface of this second conductive layer and this dielectric layer trims in fact.
7. a manufacture method for wiring board, comprising:
One circuit base plate is provided, and this circuit base plate has a first surface and one first line layer;
Form a dielectric layer on this circuit base plate, this dielectric layer has a second surface, and this dielectric layer covers this first surface and this first line layer;
This second surface to this dielectric layer irradiates a laser beam, to form an intaglio pattern and at least one blind hole that extends to this first line layer from this second surface of this dielectric layer;
Form one first conductive layer in this blind hole, wherein this first conductive layer only covers whole inner bottom surfaces and the part medial surface of this blind hole; And
Form one second conductive layer in this intaglio pattern and this blind hole, wherein this second conductive layer covers this first conductive layer, and this second conductive layer is electrically connected to this first line layer by this first conductive layer.
8. the manufacture method of wiring board according to claim 7, wherein, before forming this second conductive layer, also comprises:
Form an active layer on this second surface of this dielectric layer, in this intaglio pattern and on this first conductive layer.
9. the manufacture method of wiring board according to claim 7, wherein the degree of depth of this blind hole is H, and the thickness of this first conductive layer is h, and 0.2≤(h/H)≤0.9.
10. according to the manufacture method of the wiring board described in claim 7 or 9, wherein form the method for this first conductive layer in this blind hole and comprise chemical deposition.
The manufacture method of 11. wiring boards according to claim 7, wherein forms the method for this second conductive layer in this intaglio pattern and this blind hole and comprises chemical deposition.
12. according to the manufacture method of the wiring board described in claim 7 or 11, wherein, after forming this second conductive layer, also comprises:
This second conductive layer is carried out to a grinding manufacture method, to this second surface that exposes this dielectric layer.
The manufacture method of 13. wiring boards according to claim 7, is wherein embedded in this circuit base plate in this first line layer, and a surface of this first line layer trims in fact with this first surface.
The manufacture method of 14. wiring boards according to claim 7, wherein this first line layer is configured on this first surface of this circuit base plate.
15. according to the manufacture method of the wiring board described in claim 7,13 or 14, and wherein this second surface of this second conductive layer and this dielectric layer trims in fact.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010004501.9A CN102131346B (en) | 2010-01-15 | 2010-01-15 | Circuit board and manufacturing process thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201010004501.9A CN102131346B (en) | 2010-01-15 | 2010-01-15 | Circuit board and manufacturing process thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102131346A CN102131346A (en) | 2011-07-20 |
| CN102131346B true CN102131346B (en) | 2014-08-06 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201010004501.9A Expired - Fee Related CN102131346B (en) | 2010-01-15 | 2010-01-15 | Circuit board and manufacturing process thereof |
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| CN (1) | CN102131346B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103052268B (en) * | 2011-10-11 | 2016-03-02 | 欣兴电子股份有限公司 | The manufacture method of line construction |
| CN103517576B (en) * | 2012-06-19 | 2017-05-31 | 深南电路有限公司 | Printed circuit board (PCB) processing method and printed circuit board (PCB) and electronic equipment |
| TWI625991B (en) * | 2016-10-17 | 2018-06-01 | 南亞電路板股份有限公司 | Circuit board structure and method for forming the same |
| CN114269065B (en) * | 2020-09-16 | 2023-08-04 | 宏启胜精密电子(秦皇岛)有限公司 | Circuit board with embedded conductive circuit and manufacturing method thereof |
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|---|---|---|---|---|
| EP0361195B1 (en) * | 1988-09-30 | 1993-03-17 | Siemens Aktiengesellschaft | Printed circuit board with moulded substrate |
| CN101198219A (en) * | 2006-12-06 | 2008-06-11 | 日立比亚机械股份有限公司 | Method for producing printed circuit board and machine for processing the same |
| KR20090036939A (en) * | 2007-10-10 | 2009-04-15 | 주식회사 하이닉스반도체 | Printed circuit board |
| CN101562944A (en) * | 2008-04-16 | 2009-10-21 | 欣兴电子股份有限公司 | Circuit board and manufacturing technology thereof |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1251323C (en) * | 2002-02-07 | 2006-04-12 | 联华电子股份有限公司 | Method of improving surface flatness of embedded interlayer metal dielectric layer |
| CN100593963C (en) * | 2007-07-17 | 2010-03-10 | 欣兴电子股份有限公司 | Inside imbedded type line structure and technique thereof |
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2010
- 2010-01-15 CN CN201010004501.9A patent/CN102131346B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0361195B1 (en) * | 1988-09-30 | 1993-03-17 | Siemens Aktiengesellschaft | Printed circuit board with moulded substrate |
| CN101198219A (en) * | 2006-12-06 | 2008-06-11 | 日立比亚机械股份有限公司 | Method for producing printed circuit board and machine for processing the same |
| KR20090036939A (en) * | 2007-10-10 | 2009-04-15 | 주식회사 하이닉스반도체 | Printed circuit board |
| CN101562944A (en) * | 2008-04-16 | 2009-10-21 | 欣兴电子股份有限公司 | Circuit board and manufacturing technology thereof |
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| CN102131346A (en) | 2011-07-20 |
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