CN102088278A - Oscillator - Google Patents
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- CN102088278A CN102088278A CN 201010549120 CN201010549120A CN102088278A CN 102088278 A CN102088278 A CN 102088278A CN 201010549120 CN201010549120 CN 201010549120 CN 201010549120 A CN201010549120 A CN 201010549120A CN 102088278 A CN102088278 A CN 102088278A
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Abstract
The invention discloses an oscillator, comprising a current source circuit, a comparison circuit, a current-voltage converting circuit, a charging device and a discharging control circuit, wherein the current source circuit generates a first current and a second current; the comparison circuit comprises a first bias terminal, a second bias terminal, a first input terminal, a second input terminal and an output terminal; the current-voltage converting circuit converts the first current into a threshold voltage and provides the threshold voltage to the first input terminal of the comparison circuit; the charging device receives the charging of the second current to obtain a charging voltage and provides the charging voltage to the second input terminal of the comparison circuit, wherein the comparison circuit outputs a valid control signal through the output terminal when the charging voltage is greater than or equal to the threshold voltage, and outputs an invalid control signal through the output terminal when the charging voltage is smaller than the threshold voltage; and the discharging control circuit discharges the charging device when the control signal is valid and forbids discharging the charging device when the control signal is invalid.
Description
[technical field]
The present invention relates to electronic circuit field, particularly the pierce circuit of high-precision low-voltage and low-power dissipation.
[background technology]
Oscillator is a kind of basic circuit in the electronic circuit, and it can be converted to direct current energy the AC energy with certain frequency.Oscillator is commonly used to produce sine wave, sawtooth waveforms and square-wave signal etc.In the prior art, oscillator is widely used in as in the systems such as DC-DC Switching Power Supply, lithium battery protection circuit, lithium cell charging circuit, restorer.
In being 200812605.4 Chinese patent " a kind of oscillator with low voltage and low power consumption ", application number disclosed a kind of pierce circuit that produces sawtooth waveforms.Though this pierce circuit has lower, the low in energy consumption and advantage of high precision of operating voltage, this pierce circuit needs the electric current source generating circuit based on Δ Vgs/R of particular type that electric current is provided.In practice, the device that this electric current source generating circuit needs is more, and chip occupying area is big, if can further optimize, obviously is very favorable.
Therefore, be necessary to propose a kind of new technical scheme and solve above-mentioned shortcoming.
[summary of the invention]
The purpose of this part is to summarize some aspects of embodiments of the invention and briefly introduces some preferred embodiments.In this part and the application's specification digest and denomination of invention, may do a little simplification or omit avoiding the making purpose of this part, specification digest and denomination of invention fuzzy, and this simplification or omit and can not be used to limit the scope of the invention.
The object of the present invention is to provide a kind of oscillator, it has simple in structure, high accuracy, low-work voltage and low in power consumption.
In order to reach purpose of the present invention, the invention provides a kind of oscillator, described oscillator comprises: current source circuit, comprise first branch road that produces first electric current and second branch road that produces second electric current, described first electric current becomes predetermined ratio with second electric current;
Comparison circuit comprises first offset side that links to each other with described first branch road, second offset side, first input end, second input and the output that link to each other with described second branch road;
Current-to-voltage converting circuit becomes threshold voltage with described first current conversion and described threshold voltage is offered the first input end of described comparison circuit;
Charging device, the charging that receives described second electric current is to obtain charging voltage and described charging voltage to be offered second input of described comparison circuit, wherein said comparison circuit is exported effective control signal by output in charging voltage during more than or equal to described threshold voltage, charging voltage during less than described threshold voltage by the invalid control signal of output output;
Charge/discharge control circuit discharges to described charging device when described control signal is effective, forbids described charging device is discharged when described control signal is invalid.
Further, first electric current in the described current source circuit and second electric current duplicate generation by the electric current that same current source produces through current mirroring circuit.
Further, described comparison circuit comprises the first transistor and transistor seconds;
Described the first transistor grid links to each other with the transistor seconds grid and this first transistor grid links to each other with drain electrode, and with the drain electrode of described the first transistor first offset side, with the first input end of described the first transistor source electrode as described comparison circuit as described comparison circuit;
Described transistor seconds drain electrode is as second offset side of described comparison circuit, and with second input of this transistor seconds source electrode as described comparison circuit, the point that described second offset side links to each other with second branch road is as the described relatively output of electric current.
Further, described current-to-voltage converting circuit comprises first resistance, and/or described charging device comprises first electric capacity.
Further, described charge/discharge control circuit comprises the 3rd transistor or the 3rd triode, the described the 3rd transistorized grid is the control signal receiving terminal of described charge/discharge control circuit, and the described the 3rd transistorized source electrode links to each other with the two ends of described charging device respectively with drain electrode.
Further, also be connected with delay circuit between the control signal receiving terminal of the output of described comparison circuit and described charge/discharge control circuit, described delay circuit is exported to described charge/discharge control circuit with the control signal time-delay.
Further, described delay circuit comprises two or more inverters of mutual series connection, and the number of described inverter is an even number.
Further, described current mirror adopts cascade structure.
Further, described current source circuit comprise the supply current that produces predetermined value the 3rd branch road, proportional duplicate supply current with first branch road that produces first electric current and the proportional supply current that duplicates to produce second branch road of second electric current.
Described power supply branch road comprises the 4th transistor, second resistance of series connection successively, and wherein the 4th transistorized source electrode connects supply voltage, the end ground connection that second resistance is not connected with the 4th transistor; Wherein first branch road comprises the 5th transistor that is total to the grid common source with described the 4th transistor, wherein second branch road comprises the 6th transistor that is total to the grid common source with described the 4th transistor, described the 4th transistor, the 5th transistor and the 6th transistor form current mirror, and described the 5th transistor becomes predetermined ratio with the 6th transistor.
Further, described oscillator also comprises high-gain common source amplifying stage, and described high-gain common source amplifying stage is made up of the tenth transistor, the 11 transistor and the 3rd inverter, and described the 4th transistor of described the tenth transistor AND gate is the grid common source altogether; Described the tenth transistor drain links to each other with described the 11 transistor drain and the 3rd inverter input; The described the 11 transistorized grid links to each other and source ground with the output of described comparison circuit, and the output of described the 3rd inverter links to each other with the control signal receiving terminal of described charge/discharge control circuit.
Compared with prior art, the present invention makes the present invention can use the electric current source generating circuit of any kind to provide electric current in conjunction with current mirror by no longer needing the electric current source generating circuit based on Δ Vgs/R of particular type that electric current is provided to original design improved.Just simplified existing structure, made that described pierce circuit is easier to realize.
[description of drawings]
In conjunction with reaching ensuing detailed description with reference to the accompanying drawings, the present invention will be more readily understood, the structure member that wherein same Reference numeral is corresponding same, wherein:
Fig. 1 is the circuit theory diagrams of the oscillator in one embodiment of the present of invention;
Fig. 2 is the output sawtooth waveforms RAMP in one embodiment of the present of invention and the waveform schematic diagram of corresponding CLK signal;
Fig. 3 is the circuit structure diagram of the oscillator in an alternative embodiment of the invention;
Fig. 4 is the circuit structure diagram of the oscillator among another embodiment of the present invention;
Fig. 5 is the output signal RAMP contrast oscillogram before and after the described delay circuit of the employing in one embodiment of the present of invention;
Fig. 6 is the circuit structure diagram of the oscillator among another embodiment of the present invention; With
Fig. 7 manages the circuit structure diagram of the oscillator of implementing for utilizing POMS among the present invention.
[embodiment]
Detailed description of the present invention is mainly come the running of direct or indirect simulation technical solution of the present invention by program, step, logical block, process or other symbolistic descriptions.Be the thorough the present invention that understands, in ensuing description, stated a lot of specific detail.And when not having these specific detail, the present invention then may still can realize.Affiliated those of skill in the art use these descriptions herein and state that the others skilled in the art in affiliated field effectively introduce their work essence.In other words, be the purpose of the present invention of avoiding confusion, owing to method, program, composition and the circuit known are readily appreciated that, so they are not described in detail.
Alleged herein " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.In addition, represent the sequence of modules in method, flow chart or the functional block diagram of one or more embodiment and revocablely refer to any particular order, also be not construed as limiting the invention.
Please refer to Fig. 1, it shows the circuit theory diagrams of the oscillator 100 in one embodiment of the present of invention.Described oscillator 100 comprises current source circuit, comparison circuit, current-to-voltage converting circuit, charging device, delay circuit and charge/discharge control circuit.
Described current source circuit is used to produce first electric current I 1 and second electric current I 2 that is predetermined ratio.Described current source circuit comprises first branch road that produces first electric current I 1 and second branch road that produces second electric current I 2.Described first electric current I 1 and second electric current I 2 can be duplicated generation through current mirroring circuit by the electric current that same current source produces.Usually the current value of described same current source is indeclinable.Current source described herein need not can be the current source of any kind into the specific currents source generating circuit based on Δ Vgs/R produces.
Described comparison circuit is used for comparison oscillator output RAMP and B point current potential.Described comparison circuit comprises the first transistor MN1 and transistor seconds MN2, wherein the first transistor MN1, transistor seconds MN2 grid link to each other and the grid of the first transistor MN1 self links to each other with drain electrode, and the drain electrode of the first transistor MN1 receives first electric current I 1, and the drain electrode of transistor seconds MN2 receives second electric current I 2.
Described current-to-voltage converting circuit is used for converting first electric current I 1 to a input that voltage offers described comparison circuit.Described current-to-voltage converting circuit comprises first resistance R 1, an end ground connection of first resistance R 1 wherein, the source electrode of the described the first transistor MN1 of another termination, described first resistance R 1 converts first electric current I 1 to source electrode that voltage that B orders offers described the first transistor MN1.
Described charging device is used for received current I2 and then obtains the input that charging voltage also offers this charging voltage comparison circuit.Described charging device comprises first capacitor C 1, an end ground connection of first capacitor C 1 wherein, the source electrode of the described transistor seconds MN2 of another termination, described first capacitor C 1 receives the charging of second electric current I 2 and then obtains charging voltage, also be RAMP, offer the source electrode of described transistor seconds MN2.
Described delay circuit is used for described charge/discharge control circuit is exported in the comparative result time-delay of the output output of comparison circuit.Described delay circuit comprises the first inverter INV1 and the second inverter INV2 of mutual series connection, wherein the input of the first inverter INV1 links to each other with the drain electrode of described transistor seconds MN2, wherein the output of the second inverter INV2 links to each other with the control end of described charge/discharge control circuit, described second inverter INV2 output control signal CLK.
Described charge/discharge control circuit is used to control charging device and carries out charge or discharge.Described charge/discharge control circuit comprises the 3rd transistor MN3, and in one embodiment, described the 3rd transistor MN3 also can be the equivalent electrons switching device, such as the NPN triode.The two ends of described charging device C1 link to each other with drain electrode with the source electrode of the 3rd transistor MN3 of charge/discharge control circuit respectively, and the drain electrode of the 3rd transistor MN3 is connected with the source electrode of transistor seconds MN2, and with the output (RAMP) of this tie point as this oscillator.Described current source circuit, comparison circuit, current-to-voltage converting circuit, charging device, delay circuit and discharge controller spare and connected mode thereof have realized the function that discharges and recharges to first capacitor C 1, and obtain corresponding sawtooth waveform at output RAMP.
Specifically, the operation principle of described comparison circuit is for relatively (C point) result is exported in the first transistor MN1 source electrode (B point) and transistor seconds MN2 source electrode (RAMP) current potential and then decision.Be lower than under the B point current potential situation at RAMP, the C point becomes the invalid control signal that CLK is ordered for electronegative potential and after the first inverter INV1 and second inverter INV2 time-delay; Otherwise be higher than under the B point current potential situation at RAMP, the C point becomes effective control signal that CLK is ordered for high potential and after the first inverter INV1 and second inverter INV2 time-delay.Input of comparison circuit links to each other with charging device C1 and oscillator output end (RAMP), and another input links to each other with current-to-voltage converting circuit R1, also promptly compares the relation between first capacitor C, 1 both end voltage and first resistance R, 1 voltage.
Elaborate the course of work of oscillator shown in Figure 1 below.
Among Fig. 1, under the initial condition, the voltage of first capacitor C 1 is zero.Because an end ground connection of first capacitor C 1, and the voltage of first capacitor C 1 equals RAMP voltage, so initial condition RAMP voltage is zero.
First electric current I 1 and second electric current I 2 can be duplicated generation through the current mirroring circuit of coupling by the electric current that same current source produces.Described first electric current I 1 and second electric current I 2 are all non-vanishing.The voltage of first resistance R 1 equals the amassing of resistance of first electric current I 1 and first resistance R 1, and first electric current I 1 is non-vanishing, and then the voltage of first resistance R 1 is non-vanishing.Because of an end ground connection of first resistance R 1, then the other end voltage of first resistance R 1 just equals B point current potential, so B point current potential is non-vanishing again.
Comparison circuit is RAMP, B point current potential relatively, and initial condition RAMP current potential is zero, and B point current potential is non-vanishing, so comparison circuit output (C point) is low level.
Be transferred to after the low level that described C is ordered is delayed time through delay circuit and become invalid control signal CLK.Described CLK signal is transferred to the grid of described the 3rd transistor MN3, and therefore the grid potential of the 3rd transistor MN3 is an electronegative potential, and the 3rd transistor MN3 is in cut-off state.The 3rd transistor MN3 by and the voltage of first capacitor C 1 be under zero situation, current source circuit is to 1 charging of first capacitor C.This charging current is second electric current.
According to formula Q=CV as can be known, charge capacity is directly proportional with voltage under electric capacity one stable condition, and wherein Q is a charge capacity, and C is an electric capacity, and V is a voltage.Therefore along with first capacitor C 1 is charged gradually, the RAMP current potential raises gradually.When the RAMP current potential surpassed B point current potential, when just RAMP voltage surpassed R1 voltage, comparison circuit output potential (C point) became high potential.
Hence one can see that, and first capacitor C 1 is charged always, and the RAMP current potential raises gradually, is higher than B point current potential constantly up to the RAMP current potential, and the C point becomes high potential; C point current potential is the grid potential of the 3rd transistor MN3 after the delay circuit time-delay, therefore this moment, the 3rd transistor MN3 grid was a high potential, described the 3rd transistor MN3 conducting.When described the 3rd transistor MN3 is under the conducting state, discharged rapidly with first capacitor C 1 that described the 3rd transistor MN3 connects.Because metal-oxide-semiconductor is very fast to capacitor discharge speed, therefore first capacitor C is far smaller than the charging interval 1 discharge time.
As mentioned above, go round and begin again, first capacitor C 1 is recharged repeatedly and discharges, and causes output (RAMP) voltage of this oscillator to raise gradually, reduces rapidly again ..., and then form the waveform of sawtooth waveforms at RAMP end.Fig. 2 is the schematic diagram of the CLK signal of oscillator 100 output sawtooth waveforms RAMP of the present invention and correspondence, this figure abscissa is the time, ordinate is a voltage, and wherein the ascent stage of sawtooth waveforms RAMP is the charging interval of first capacitor C 1, and the decline stage is the discharge time of first capacitor C 1.And learn easily that by last analysis the peak value of described sawtooth waveforms RAMP is the product of first electric current I 1 and described first resistance R 1.Then the charging interval of this oscillator 100 is T=(I1*R1) * C1/I2, wherein C1 is the capacitance of first capacitor C 1, if the merchant of first electric current I 1 and second electric current I 2 equals constant K, and determined by the physical parameter of device because of R1*C1, can learn easily that by formula the charging interval of described oscillator 100 depends on described constant K.If the design discharge time of described first capacitor C 1 is very little with respect to the charging interval, be approximately equal to K*R1*C1 the cycle of oscillation of then described oscillator 100.As long as rational first resistance of selection is with first electric capacity and make first electric current become predetermined ratio with second electric current.In a preferred embodiment, described the first transistor MN1 and transistor seconds MN2 are the NMOS pipe that breadth length ratio equates, described first electric current I 1 equals described second electric current I 2.
Because the grid of the first transistor MN1 self in the oscillator 100 of the present invention links to each other with drain electrode, does not need other devices that described grid voltage is provided, so do not need the electric current source generating circuit based on Δ Vgs/R of particular type to produce electric current.
In a preferred embodiment of the invention, described current source circuit can have simple current mirror circuit shown in Figure 3 to realize.Described current source circuit comprises the 4th transistor MP1, the 5th transistor MP2, the 6th transistor MP3 and second resistance R 2.The source electrode of described the 4th transistor MP1, the 5th transistor MP2 and the 6th transistor MP3 links to each other and meets supply voltage VDD, and the grid of described the 4th transistor MP1, the 5th transistor MP2 and the 6th transistor MP3 links to each other, and therefore described the 4th transistor MP1, the 5th transistor MP2 and the 6th transistor MP3 constitute current mirror.Described the 4th transistor MP1 connects with second resistance R 2 and generates supply current I3, described supply current I3 can be considered as a current source, described the 5th transistor MP2 is proportional to be duplicated described supply current I3 and produces first electric current I 1, and described the 6th transistor MP3 is proportional to be duplicated described supply current I3 and produce second electric current I 2.Because the electric current of metal-oxide-semiconductor is proportional to the breadth length ratio of corresponding metal-oxide-semiconductor in the current mirror, therefore the current ratio in the 4th transistor MP1, the 5th transistor MP2 and the 6th transistor MP3 equals their breadth length ratio.In one embodiment, for first electric current I 1 and second electric current I 2 that obtain to equate, described the 5th transistor MP2 is identical with the breadth length ratio of the 6th transistor MP3.In view of the content that the current mirroring circuit technology is well known to those skilled in the art, do not do too many explanation in detail herein.But which kind of current mirror current source circuit of the present invention specifically adopts unfixing, as long as can obtain to have first electric current I 1 and second electric current I 2 of predetermined ratio.
Such as in another preferred embodiment of the present invention, described current mirror can adopt cascade structure, and reason is that the current mirror of cascade structure can improve the current replication precision.Fig. 4 is the oscillator schematic diagram with cascade structure current mirror, and Fig. 4 is with respect to the newly-increased current mirror that is made of the 7th transistor MP11, the 8th transistor MP12 and the 9th transistor MP13 of Fig. 3, and then has improved the precision of current mirror replica current greatly.
In another preferred embodiment of the present invention, described delay circuit can be realized that purpose is to prolong discharge time by the delay process device that some inverters are formed, and then improves the oscillator frequency precision.Inverter quantity in this delay process device is even number and more than or equal to two, reason is that this delay process device only has delay function and can not change reverses direction.Fig. 5 adopts the output signal RAMP contrast oscillogram before and after the described delay circuit.Oscillator recharges after the charge capacity of needs first capacitor C 1 is discharged to zero fully in oscillatory process.Therefore oscillator needs long enough discharge time, so that the electric weight on first capacitor C 1 can have been discharged fully.Usually adding the delay processor can prolong discharge time, and then improves the oscillator frequency precision.Among Fig. 5, RAMP1 is that electric capacity is discharged into the output waveform schematic diagram that just continues charging after zero, and RAMP2 is that the electric capacity continuation again of just discharge is charged and then can be caused oscillator frequency to have certain error.In different embodiment, inverter quantity difference in the delay process device, concrete quantity can obtain by emulation.
In another preferred embodiment of the present invention, at second offset side access high-gain common source amplifying stage of comparison circuit, purpose is to improve the frequency accuracy of oscillator.
High-gain amplifying stage operation principle is that its input end signal is carried out processing and amplifying and output.Fig. 6 is the oscillator schematic diagram with high-gain common source amplifying stage.In Fig. 6, high-gain common source amplifying stage is made up of the tenth transistor MP8, the 11 transistor MN6, the 3rd inverter INV3.This high-gain common-source amplifier is connected second offset side of comparison circuit, and the output of described comparison circuit is connected the first inverter INV1 input.As can be seen from Figure 6, the effect of high-gain common source amplifying stage is that the output of comparison circuit is amplified, and will amplify the result and be input to the first inverter INV1.
Comparison circuit is RAMP and B point current potential relatively, just has been higher than B point current potential little by little constantly at the RAMP current potential, and this exceeds very little current potential and is not sufficient to make the first inverter INV1 to produce upset.Therefore increase high-gain common source amplifying stage at the comparison circuit output, make the RAMP current potential just be higher than B point current potential when a bit, become bigger high potential after the high potential process high-gain common source amplifying stage processing and amplifying that this is very little, and then make the first inverter INV1 produce upset.Therefore oscillator shown in Figure 6 is with respect to oscillator shown in Figure 3, can just begin discharge during more near B point current potential at the RAMP current potential, and then reduce discharge time, raising oscillator frequency precision.
The implementation that the present invention also provides described oscillator 100 to adopt the PMOS pipe to implement simultaneously.The implementation that described employing PMOS pipe is implemented specifically can be with reference to figure 7, because its flesh and blood is identical with Fig. 1, so be not repeated introduction.
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that and be familiar with the scope that any change that the person skilled in art does the specific embodiment of the present invention does not all break away from claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to described embodiment.
Claims (10)
1. oscillator is characterized in that it comprises:
Current source circuit comprises first branch road that produces first electric current and second branch road that produces second electric current, and described first electric current becomes predetermined ratio with second electric current;
Comparison circuit comprises first offset side that links to each other with described first branch road, second offset side, first input end, second input and the output that link to each other with described second branch road;
Current-to-voltage converting circuit becomes threshold voltage with described first current conversion and described threshold voltage is offered the first input end of described comparison circuit;
Charging device, the charging that receives described second electric current is to obtain charging voltage and described charging voltage to be offered second input of described comparison circuit, wherein said comparison circuit is exported effective control signal by output in charging voltage during more than or equal to described threshold voltage, charging voltage during less than described threshold voltage by the invalid control signal of output output;
Charge/discharge control circuit discharges to described charging device when described control signal is effective, forbids described charging device is discharged when described control signal is invalid.
2. oscillator according to claim 1 is characterized in that, first electric current in the described current source circuit and second electric current duplicate generation by the electric current that same current source produces through current mirroring circuit.
3. oscillator according to claim 1 is characterized in that described comparison circuit comprises the first transistor and transistor seconds;
Described the first transistor grid links to each other with the transistor seconds grid and this first transistor grid links to each other with drain electrode, and with the drain electrode of described the first transistor first offset side, with the first input end of described the first transistor source electrode as described comparison circuit as described comparison circuit;
Described transistor seconds drain electrode is as second offset side of described comparison circuit, and with second input of this transistor seconds source electrode as described comparison circuit, the point that described second offset side links to each other with second branch road is as the described relatively output of electric current.
4. oscillator according to claim 1 is characterized in that described current-to-voltage converting circuit comprises first resistance, and/or described charging device comprises first electric capacity.
5. oscillator according to claim 1, it is characterized in that, described charge/discharge control circuit comprises the 3rd transistor or the 3rd triode, the described the 3rd transistorized grid is the control signal receiving terminal of described charge/discharge control circuit, and the described the 3rd transistorized source electrode links to each other with the two ends of described charging device respectively with drain electrode.
6. oscillator according to claim 1, it is characterized in that, also be connected with delay circuit between the control signal receiving terminal of the output of described comparison circuit and described charge/discharge control circuit, described delay circuit is exported to described charge/discharge control circuit with the control signal time-delay.
7. oscillator according to claim 6 is characterized in that, described delay circuit comprises two or more inverters of mutual series connection, and the number of described inverter is an even number.
8. oscillator according to claim 2 is characterized in that, described current mirror adopts cascade structure.
9. oscillator according to claim 1, it is characterized in that, described current source circuit comprise the supply current that produces predetermined value the 3rd branch road, proportional duplicate supply current with first branch road that produces first electric current and the proportional supply current that duplicates to produce second branch road of second electric current
Described power supply branch road comprises the 4th transistor, second resistance of series connection successively, and wherein the 4th transistorized source electrode connects supply voltage, the end ground connection that second resistance is not connected with the 4th transistor; Wherein first branch road comprises the 5th transistor that is total to the grid common source with described the 4th transistor, wherein second branch road comprises the 6th transistor that is total to the grid common source with described the 4th transistor, described the 4th transistor, the 5th transistor and the 6th transistor form current mirror, and described the 5th transistor becomes predetermined ratio with the 6th transistor.
10. oscillator according to claim 9, it is characterized in that, described oscillator also comprises high-gain common source amplifying stage, and described high-gain common source amplifying stage is made up of the tenth transistor, the 11 transistor and the 3rd inverter, and described the 4th transistor of described the tenth transistor AND gate is the grid common source altogether; Described the tenth transistor drain links to each other with described the 11 transistor drain and the 3rd inverter input; The described the 11 transistorized grid links to each other and source ground with the output of described comparison circuit, and the output of described the 3rd inverter links to each other with the control signal receiving terminal of described charge/discharge control circuit.
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Cited By (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103475338A (en) * | 2013-09-25 | 2013-12-25 | 无锡中星微电子有限公司 | High-precision low-voltage oscillator |
| CN103490726A (en) * | 2013-09-25 | 2014-01-01 | 无锡中星微电子有限公司 | Low-voltage oscillator |
| CN103532521A (en) * | 2013-10-15 | 2014-01-22 | 无锡中星微电子有限公司 | Improved low-voltage oscillator |
| CN103633939A (en) * | 2011-08-26 | 2014-03-12 | 无锡中星微电子有限公司 | Oscillator |
| CN103647508A (en) * | 2013-11-28 | 2014-03-19 | 无锡中星微电子有限公司 | An oscillator with ultralow power consumption |
| CN105281727A (en) * | 2014-07-24 | 2016-01-27 | 登丰微电子股份有限公司 | Delay circuit |
| CN106873694A (en) * | 2017-02-08 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The voltage x current for exporting READY signal produces circuit |
| CN108566163A (en) * | 2018-06-22 | 2018-09-21 | 上海艾为电子技术股份有限公司 | A kind of pierce circuit |
| CN108933581A (en) * | 2018-06-22 | 2018-12-04 | 上海艾为电子技术股份有限公司 | A kind of pierce circuit |
| CN111628752A (en) * | 2020-06-02 | 2020-09-04 | 华南理工大学 | RC oscillator adopting pre-charging technology |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090160521A1 (en) * | 2007-12-21 | 2009-06-25 | Tomer Shaul Elran | Low vt dependency rc oscillator |
| CN101826840A (en) * | 2009-02-09 | 2010-09-08 | 台湾积体电路制造股份有限公司 | With the irrelevant VDD separate oscillators of processing variation |
| CN201854256U (en) * | 2010-11-17 | 2011-06-01 | 无锡中星微电子有限公司 | Oscillator |
-
2010
- 2010-11-17 CN CN 201010549120 patent/CN102088278B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20090160521A1 (en) * | 2007-12-21 | 2009-06-25 | Tomer Shaul Elran | Low vt dependency rc oscillator |
| CN101826840A (en) * | 2009-02-09 | 2010-09-08 | 台湾积体电路制造股份有限公司 | With the irrelevant VDD separate oscillators of processing variation |
| CN201854256U (en) * | 2010-11-17 | 2011-06-01 | 无锡中星微电子有限公司 | Oscillator |
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| CN103633939A (en) * | 2011-08-26 | 2014-03-12 | 无锡中星微电子有限公司 | Oscillator |
| CN103633939B (en) * | 2011-08-26 | 2017-02-22 | 无锡中感微电子股份有限公司 | Oscillator |
| CN103490726A (en) * | 2013-09-25 | 2014-01-01 | 无锡中星微电子有限公司 | Low-voltage oscillator |
| CN103475338A (en) * | 2013-09-25 | 2013-12-25 | 无锡中星微电子有限公司 | High-precision low-voltage oscillator |
| CN103475338B (en) * | 2013-09-25 | 2016-06-15 | 无锡中感微电子股份有限公司 | A kind of High-precision low-voltage oscillator |
| CN103532521B (en) * | 2013-10-15 | 2016-05-25 | 无锡中感微电子股份有限公司 | Modified low voltage oscillator |
| CN103532521A (en) * | 2013-10-15 | 2014-01-22 | 无锡中星微电子有限公司 | Improved low-voltage oscillator |
| CN103647508A (en) * | 2013-11-28 | 2014-03-19 | 无锡中星微电子有限公司 | An oscillator with ultralow power consumption |
| CN103647508B (en) * | 2013-11-28 | 2016-04-20 | 无锡中感微电子股份有限公司 | Super low-power consumption oscillator |
| CN105281727A (en) * | 2014-07-24 | 2016-01-27 | 登丰微电子股份有限公司 | Delay circuit |
| CN105281727B (en) * | 2014-07-24 | 2018-06-01 | 登丰微电子股份有限公司 | delay circuit |
| CN106873694A (en) * | 2017-02-08 | 2017-06-20 | 上海华虹宏力半导体制造有限公司 | The voltage x current for exporting READY signal produces circuit |
| CN106873694B (en) * | 2017-02-08 | 2018-04-17 | 上海华虹宏力半导体制造有限公司 | Export the voltage and current generation circuit of READY signal |
| CN108566163A (en) * | 2018-06-22 | 2018-09-21 | 上海艾为电子技术股份有限公司 | A kind of pierce circuit |
| CN108933581A (en) * | 2018-06-22 | 2018-12-04 | 上海艾为电子技术股份有限公司 | A kind of pierce circuit |
| CN111628752A (en) * | 2020-06-02 | 2020-09-04 | 华南理工大学 | RC oscillator adopting pre-charging technology |
| CN114448386A (en) * | 2022-02-09 | 2022-05-06 | 无锡市晶源微电子有限公司 | Time delay device |
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