CN103633939A - Oscillator - Google Patents
Oscillator Download PDFInfo
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- CN103633939A CN103633939A CN201310680402.6A CN201310680402A CN103633939A CN 103633939 A CN103633939 A CN 103633939A CN 201310680402 A CN201310680402 A CN 201310680402A CN 103633939 A CN103633939 A CN 103633939A
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Abstract
The invention provides an oscillator. The oscillator comprises a first oscillation unit and a second oscillation unit, each oscillation unit comprises a resistor for generating a reference peak voltage, a capacitor for generating a comparison voltage, a first current source, a comparison circuit and a discharge control circuit, wherein the current provided by the first current source of the first oscillation unit is used for charging the capacitor of the first oscillation unit, when the comparison voltage of the comparison circuit of the first oscillation unit is greater than or equal to the reference peak voltage, the comparison circuit of the first oscillation unit is used for notifying the discharge control circuit of the first oscillation unit to begin discharging and the discharge control circuit of the second oscillation unit to stop discharging; the current provided by the first current source of the second oscillation unit is used for charging the capacitor of the second oscillation unit, when the comparison voltage of the comparison circuit of the second oscillation unit is greater than or equal to the reference peak voltage, the comparison circuit of the second oscillation unit is used for notifying the discharge control circuit of the second oscillation unit to begin discharging and the discharge control circuit of the first oscillation unit to stop discharging. Compared with the prior art, the oscillator provided by the invention can obtain an output frequency signal with high precision.
Description
The present patent application is to be dividing an application that August 26, application number in 2011 are 201110248468.9, denomination of invention is " programmable oscillator " applying date.
[technical field]
The present invention relates to electronic circuit field, particularly a kind of oscillator.
[background technology]
In order to cater to the demand in market, more and more to the research and development of high-precision low-power consumption oscillator, such as Chinese patent discloseder high-precision low-power consumption oscillators, if application number is 200810112605.4,200810115218.6,200910087721.X etc.It is very low that these oscillators can produce power consumption, and frequency, with supply voltage and the less oscillator signal of variations in temperature, goes in various power-supply management systems, but the frequency change that some occasion causes process deviation requirement is also very high.Described process deviation refers to the frequency error between the chip that extensive manufacturing process causes, and as very high in the standby clock request in Bluetooth system, clock jitter will cause two to need the Bluetooth system of communication cannot normally shake hands and wake up under sleep pattern.In some system, in bluetooth or USB system, high to frequency requirement, for example require frequency change to be less than +/-1000ppm, i.e. one thousandth.Crystal oscillator can reach in +/-100ppm conventionally, but the price of crystal is higher, and application cost is also higher.In conventional bluetooth system, need at least two crystal oscillators, one for radio frequency part, frequency is higher, is generally 26-100MHz, also needs in addition a low-frequency clock waking up for sleep pattern, and as 32KHz or lower, cost also can be higher like this.
Because be necessary to propose a kind of improved technical scheme, overcome the problems referred to above.
[summary of the invention]
The object of this part is to summarize some aspects of embodiments of the invention and briefly introduces some preferred embodiments.In this part and the application's specification digest and denomination of invention, may do a little simplification or omit to avoid the making object of this part, specification digest and denomination of invention fuzzy, and this simplification or omit can not be for limiting the scope of the invention.
The object of the present invention is to provide a kind of oscillator, it can obtain the output frequency signal of degree of precision.
According to object of the present invention, the invention provides a kind of oscillator, it comprises the first oscillating unit and the second oscillating unit, and wherein each oscillating unit comprises comparison circuit and the charge/discharge control circuit of the resistance, the electric capacity that produces a comparative voltage, the first current source, more described reference peak threshold voltage and the described comparative voltage that produce reference peak threshold voltage.The electric current that the first current source based on the first oscillating unit provides charges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is more than or equal to the reference peak threshold voltage in the first oscillating unit, the charge/discharge control circuit of notifying the charge/discharge control circuit of the first oscillating unit to start electric discharge and the second oscillating unit stops discharging, the electric current that the first current source based on the second oscillating unit provides charges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to the reference peak threshold voltage in the second oscillating unit, the charge/discharge control circuit of notifying the charge/discharge control circuit of the second oscillating unit to start electric discharge and the first oscillating unit stops discharging.
Further, described the first oscillating unit and the second oscillating unit are shared a logical circuit, described logical circuit comprises the first NOR gate and the second NOR gate, each oscillating unit also comprises the second current source, comparison circuit in described the first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and the first inverter, charge/discharge control circuit in the first oscillating unit comprises a NMOS pipe, a termination voltage of the second current source in the first oscillating unit wherein, the drain electrode of another termination the 3rd NMOS pipe, between the source electrode of described the 3rd NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage in the first oscillating unit, one termination voltage of the first current source in the first oscillating unit, the drain electrode of another termination the 4th NMOS pipe, between the source electrode of described the 4th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the first oscillating unit, the 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe, in the one NMOS pipe and the first oscillating unit, produce the described Capacitance parallel connection of comparative voltage, the drain electrode of the 4th NMOS pipe connects the input of the first inverter, comparison circuit in described the second oscillating unit comprises the 5th NMOS pipe, the 6th NMOS pipe and the second inverter, charge/discharge control circuit in the second oscillating unit comprises the 2nd NMOS pipe, a termination voltage of the second current source in the second oscillating unit wherein, the drain electrode of another termination the 5th NMOS pipe, between the source electrode of described the 5th NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage in the second oscillating unit, one termination voltage of the first current source in the second oscillating unit, the drain electrode of another termination the 6th NMOS pipe, between the source electrode of described the 6th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the second oscillating unit, in the 2nd NMOS pipe and the second oscillating unit, produce the described Capacitance parallel connection of comparative voltage, the drain electrode of the 6th NMOS pipe connects the input of the second inverter, the output of the first inverter is connected with the first input end of the first NOR gate, the grid of the one NMOS pipe is connected with the second input of the first NOR gate and the output of the second NOR gate, the output of the first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of the second NOR gate, the output of the second inverter is connected with the second input of the second NOR gate.
Further, the length-width ratio of described the 3rd NMOS pipe and the 4th NMOS pipe equates, the length-width ratio of described the 5th NMOS pipe and the 6th NMOS pipe equates, the electric current that the first current source in the first oscillating unit and the second current source provide is equal, and the electric current that the first current source in the second oscillating unit and the second current source provide equates.
According to object of the present invention, the invention provides another kind of oscillator, it comprises the first oscillating unit and the second oscillating unit, wherein two oscillating units are shared a resistance that produces reference peak threshold voltage, each oscillating unit also comprises the electric capacity that produces a comparative voltage, the first current source, the comparison circuit of more described reference peak threshold voltage and described comparative voltage and charge/discharge control circuit, the electric current that the first current source based on the first oscillating unit provides charges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is more than or equal to described reference peak threshold voltage, the charge/discharge control circuit of notifying the charge/discharge control circuit of the first oscillating unit to start electric discharge and the second oscillating unit stops discharging, the electric current that the first current source based on the second oscillating unit provides charges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to described reference peak threshold voltage, the charge/discharge control circuit of notifying the charge/discharge control circuit of the second oscillating unit to start electric discharge and the first oscillating unit stops discharging.
Further, described the first oscillating unit and the second oscillating unit are shared a logical circuit and the second current source, described logical circuit comprises the first NOR gate and the second NOR gate, comparison circuit in described the first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and the first inverter, charge/discharge control circuit in the first oscillating unit comprises a NMOS pipe, a termination voltage of the second current source wherein, the drain electrode of another termination the 3rd NMOS pipe, between the source electrode of described the 3rd NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage, one termination voltage of the first current source in the first oscillating unit, the drain electrode of another termination the 4th NMOS pipe, between the source electrode of described the 4th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the first oscillating unit, the 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe, the one NMOS pipe and described Capacitance parallel connection, the drain electrode of the 4th NMOS pipe connects the input of the first inverter, comparison circuit in described the second oscillating unit comprises the 3rd NMOS pipe, the 6th NMOS pipe and the second inverter, wherein the comparison circuit in the second oscillating unit and the comparison circuit in the first oscillating unit are shared the 3rd NMOS pipe, charge/discharge control circuit in the second oscillating unit comprises the 2nd NMOS pipe, a termination voltage of the first current source in the second oscillating unit wherein, the drain electrode of another termination the 6th NMOS pipe, between the source electrode of described the 6th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the second oscillating unit, the grid of the 6th NMOS pipe is connected with the node between the second current source in described the first oscillating unit and the 3rd NMOS pipe, the 2nd NMOS pipe and described Capacitance parallel connection, the drain electrode of the 6th NMOS pipe connects the input of the second inverter, the output of the first inverter is connected with the first input end of the first NOR gate, the grid of the one NMOS pipe is connected with the second input of the first NOR gate and the output of the second NOR gate, the output of the first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of the second NOR gate, the output of the second inverter is connected with the second input of the second NOR gate.
Further, the length-width ratio of described the 3rd NMOS pipe, the 4th NMOS pipe and the 5th NMOS pipe is all equal, and the electric current that the first current source in the first current source in the first oscillating unit, the second current source and the second oscillating unit provides all equates.
According to object of the present invention, the invention provides another kind of oscillator, it comprises the first oscillating unit and the second oscillating unit, wherein each oscillating unit comprises the resistance that produces reference peak threshold voltage, produce the electric capacity of a comparative voltage, current source, the comparison circuit of more described reference peak threshold voltage and described comparative voltage and charging control circuit, the electric current that current source based on the first oscillating unit provides discharges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is less than or equal to the reference peak threshold voltage in the first oscillating unit, the charging control circuit of notifying the charging control circuit of the first oscillating unit to start charging and the second oscillating unit stops charging, the electric current that current source based on the second oscillating unit provides discharges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is less than or equal to the reference peak threshold voltage in the second oscillating unit, the charging control circuit of notifying the charging control circuit of the second oscillating unit to start charging and the first oscillating unit stops charging.
According to object of the present invention, the invention provides another kind of oscillator, it comprises the first oscillating unit and the second oscillating unit, wherein two oscillating units are shared a resistance that produces reference peak threshold voltage, each oscillating unit also comprises the electric capacity that produces a comparative voltage, current source, the comparison circuit of more described reference peak threshold voltage and described comparative voltage and charging control circuit, the electric current that current source based on the first oscillating unit provides discharges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is less than or equal to described reference peak threshold voltage, the charging control circuit of notifying the charging control circuit of the first oscillating unit to start charging and the second oscillating unit stops charging, the electric current that current source based on the second oscillating unit provides discharges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to described reference peak threshold voltage, the charging control circuit of notifying the charging control circuit of the second oscillating unit to start charging and the first oscillating unit stops charging.
Compared with prior art, oscillator provided by the invention can obtain the output frequency signal of degree of precision.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
Fig. 1 is the structural representation of programmable oscillator in the present invention;
Fig. 2 is calibrating signal to the schematic diagram that in oscillation module able to programme, resistance is controlled;
Fig. 3 is calibrating signal to the schematic diagram that in oscillation module able to programme, electric capacity is controlled;
Fig. 4 is oscillation module able to programme circuit diagram in one embodiment in the present invention;
Fig. 5 is that the oscillator signal of the first electric capacity in Fig. 4 is, the contrast schematic diagram of the oscillator signal of the second electric capacity and the corresponding target low frequency signal producing; With
Fig. 6 is oscillation module able to programme circuit diagram in another embodiment in the present invention.
[embodiment]
Detailed description of the present invention is mainly carried out the running of direct or indirect simulation technical solution of the present invention by program, step, logical block, process or other symbolistic descriptions.For the thorough the present invention that understands, a lot of specific detail in ensuing description, have been stated.And when there is no these specific detail, the present invention may still can realize.Affiliated those of skill in the art use these descriptions and statement herein to the others skilled in the art in affiliated field, effectively to introduce their work essence.In other words, be the object of the present invention of avoiding confusion, due to the method for knowing and easily understanding of program, so they are not described in detail.
Alleged " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention herein.Different local in this manual " in one embodiment " that occur not all refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.In addition, represent sequence of modules in method, flow chart or the functional block diagram of one or more embodiment and revocablely refer to any particular order, not also being construed as limiting the invention." connection " in this specification comprises direct connection, also comprises indirect connection; " some " or " several " in literary composition refer to two or more.
Fig. 1 is the structural representation of programmable oscillator in the present invention, described programmable oscillator comprises calibrating signal generation module 110 and oscillation module able to programme 120, wherein said calibrating signal generation module 110 relatively (is expressed as D0, D1 with reference to the target low frequency signal LCK of high-frequency signal HCK and oscillation module able to programme 120 outputs with output calibrating signal in figure ... Dn), described oscillation module able to programme 120 is calibrated the target low frequency signal LCK of its output according to described calibrating signal.Described calibrating signal generation module 110 has a variety of methods with reference to high-frequency signal HCK and target low frequency signal LCK to obtain calibrating signal by more described, conventionally, described calibrating signal can adopt various coded system of the prior art, as thermometer code, Gray code, complement code etc.
A kind of the most general method that obtains calibrating signal can be: described calibrating signal generation module 110 is counted with reference to high-frequency signal described in the one-period of described target low frequency signal, according to the difference of the count value counting to get and standard value, determines described calibrating signal.In one embodiment, for the ease of understanding, this data mode of sentencing conventional belt sign bit is described described calibrating signal, but principle of the present invention is applicable to various coding techniquess.Can suppose that D0 is sign bit, high frequency clock HCK frequency is 64MHz, and low-frequency clock target frequency is 32KHz, and described calibrating signal generation module 110 can produce described calibrating signal by counting form.For the one-period of 32KHz frequency accurately, need just in time count the HCK cycle of full 2000 (standard value in this example) 64MHz, if counting surpasses 2000 cycles, show that the LCK cycle is partially long, D0 can be made as to 0, show to reduce the LCK cycle, D1-Dn is set as and reduces the LCK cycle and how much walk.If adjust step-length, be that the binary number that 0.5%, D1-Dn forms is 40, the cycle is shortened 0.5% * (2
n-40).Otherwise, if counting is less than 2000 cycles, show that the LCK cycle is partially short, D0 can be made as to 1, show to need to increase the LCK cycle, D1-Dn is set as increases LCK cycle step number.If adjust step-length, be that the binary number that 0.5%, D1-Dn forms is 40, the cycle is increased 0.5% * 40=20%, is increased to 120%.
That is to say, relatively with reference to high-frequency signal HCK and coarse target low frequency signal LCK of producing before, produce calibrating signal, then by described calibrating signal, control programmable unit in described oscillation module able to programme 120 to obtain accurate target low frequency signal LCK.
Described calibrating signal is generally used for calibrating adjustable device or the parameter in oscillation module 120 able to programme, as resistance, electric capacity or electric current etc.
Described oscillation module able to programme 120 comprises resistance, the electric capacity repeatedly discharging and recharging of generation reference peak threshold voltage and the electric current that described electric capacity is carried out to charge or discharge.
Accordingly, in order to make described calibrating signal, can control producing the described resistance of reference peak threshold voltage, described resistance can be designed as the form of several resistance unit series connection, each in some or all resistance units and a switch in parallel, according to described calibrating signal, control conducting or the cut-off of each switch and adjust the resistance value of described resistance, and then calibrate the target low frequency signal of described oscillation module able to programme 120 outputs.It specifically can be shown in Figure 2, it shows calibrating signal to schematic diagram that in oscillation module able to programme, resistance is controlled, described resistance be arranged to series connection several resistance R 00, R10, R11, R12 ..., R1n, respectively the resistance R 10, R10, R11, R12 of series connection ..., the upper switch in parallel of R1n, as a switch S 0 in parallel in resistance R 10, a switch S 1 in parallel in resistance R 11, the rest may be inferred; Then by described calibrating signal D0, D1, D2 ..., Dn be connected to described switch S 0, S1, S2 ..., Sn is upper to control conducting and the cut-off of described switch, thereby can control which resistance, can be connected in series to resistance R 00 and get on.Accordingly, just can be by described calibrating signal to described generation with reference to the regulation and control of programming of the value of the resistance of peak value.
In order to make described calibrating signal, can control the described electric capacity repeatedly discharging and recharging, described electric capacity can be arranged to the form of several capacitor cell parallel connections, each in some or all capacitor cells connected with a switch, according to described calibrating signal, control conducting or the cut-off of each switch and adjust the capacitance of described electric capacity, and then calibrate the target low frequency signal of described oscillation module output able to programme.It specifically can be shown in Figure 3, calibrating signal is to schematic diagram that in oscillation module able to programme, electric capacity is controlled, described electric capacity be arranged to several in parallel capacitor C 00, C10, C11, C12 ..., C1n, for capacitor C 10, C10, C11, C12 ..., the C1n switch of connecting on its place branch road respectively, as the switch S 1 of connecting on capacitor C 10 place branch roads, the switch S 2 of connecting on capacitor C 11 place branch roads, the rest may be inferred.Then by described calibrating signal D0, D1, D2 ..., Dn be connected to described switch S 1, S2, S3 ..., Sn is upper to control conducting and the cut-off of described switch, thereby can control which electric capacity, can be parallel to capacitor C 00 and get on.Accordingly, just can be by described calibrating signal to carrying out the regulation and control of programming of the value of the electric capacity of repeated charge.
Similarly, according to described calibrating signal, can also adjust the size of the described electric current in oscillation module 120 able to programme, electric capacity being discharged and recharged, and then calibrate the target low frequency signal of described oscillation module output able to programme.The branch road of generation current also can be set to the parallel form that is similar to electric capacity, the switch of connecting respectively in part or all of current branch, and each switch is controlled by described calibrating signal.Accordingly, the regulation and control of programming of the value that just can carry out the electric current of charge or discharge to electric capacity by described calibrating signal.
In traditional oscillators, can capacitance voltage be done very littlely fall time as far as possible.If described capacitance voltage is very long fall time, the dependence of technique, temperature, supply voltage is all very large relatively during this period of time, can directly cause cycle of oscillation inaccurate.But described capacitance voltage fall time again can not be too short, reason is that the too short capacitance voltage that may cause is not put into zero completely.The starting point of charging voltage is just inaccurate like this, larger with the variation of technique, temperature, supply voltage, thereby has affected the precision of charging interval section, has also affected cycle of oscillation.And the frequency of the target low frequency signal of oscillation module able to programme output in the present invention is irrelevant fall time with capacitance voltage, thereby make the target low frequency signal exported more accurate.
In one embodiment, described oscillation module able to programme 120 comprises the first oscillating unit and the second oscillating unit, wherein each oscillating unit comprises the resistance that produces reference peak threshold voltage, produce the electric capacity of a comparative voltage, the first current source, the comparison circuit of more described reference peak threshold voltage and described comparative voltage and charge/discharge control circuit, the electric current that wherein the first current source based on the first oscillating unit provides charges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is more than or equal to the reference peak threshold voltage in the first oscillating unit, the charge/discharge control circuit of notifying the charge/discharge control circuit of the first oscillating unit to start electric discharge and the second oscillating unit stops discharging, the electric current that the first current source based on the second oscillating unit provides charges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal in the second oscillating unit reference peak threshold voltage, the charge/discharge control circuit of notifying the charge/discharge control circuit of the second oscillating unit to start electric discharge and the first oscillating unit stops discharging.
It should be noted that, above-mentioned said stop electric discharge referring to that charge/discharge control circuit enters absence of discharge state, under this state, the electricity on described electric capacity cannot be discharged, said start electric discharge refer to that charge/discharge control circuit enters discharge condition, under this state, the electricity on described electric capacity can be discharged.
By Fig. 4 and Fig. 5, described oscillation module 120 able to programme is described below, it should be noted that, the oscillation module able to programme here also can be called as oscillator.
Fig. 4 is oscillation module able to programme circuit diagram in one embodiment in the present invention, described the first oscillating unit comprises the 3rd NMOS pipe MN3, the 4th NMOS pipe MN4, NMOS pipe MN1, the first inverter INV1, the first current source I11, the second current source I12 and a first NOR gate NOR1, and the second oscillating unit comprises the 5th NMOS pipe MN5, the 6th NMOS pipe MN6, the 2nd NMOS pipe MN2, the second inverter INV2, the first current source I21, the second current source I22 and the second NOR gate NOR2.
A termination voltage VDD of described the second current source I12 in the first oscillating unit wherein, the drain electrode of the 3rd NMOS pipe MN3 described in another termination, connects and below the resistance R 1(of reference peak threshold voltage, is called the first resistance R 1 described in one between the source electrode of the 3rd NMOS pipe MN3 and ground); A termination voltage VDD of described the first current source I11 in the first oscillating unit, the drain electrode of the 4th NMOS pipe MN4 described in another termination, connects and below the capacitor C 1(of comparative voltage, is called the first capacitor C 1 described in one between the source electrode of the 4th NMO pipe MN4 and ground); The grid of the 3rd NMOS pipe MN3 is connected with the grid of the MN4 of its drain electrode and the 4th NMOS pipe; A termination voltage VDD of the second current source I22 in the second oscillating unit, the drain electrode of the 5th NMOS pipe MN5 described in another termination, connects and below the resistance R 2(of reference peak threshold voltage, is called the second resistance R 2 described in one between the source electrode of the 5th NMOS pipe MN5 and ground); A termination voltage VDD of the first current source I21 in the second oscillating unit, the drain electrode of the 6th NMOS pipe MN6 described in another termination, connects and below the capacitor C 2(of comparative voltage, is called the second capacitor C 2 described in one between the source electrode of the 6th NMO pipe MN6 and ground); The grid of the 5th NMOS pipe MN5 is connected with the grid of the MN6 of its drain electrode and the 6th NMOS pipe; The one NMOS pipe MN1 is in parallel with described the first capacitor C 1, and the 2nd NMOS pipe MN2 is in parallel with described the second capacitor C 2; A described current source I11 in the first oscillating unit is connected to the first input end 1 of the first NOR gate NOR1 through described the first inverter INV1, the grid of the one NMOS pipe MN1 connects the output of the second input 2, the first NOR gate NOR1 of described the first NOR gate NOR1 and exports described target low frequency signal LCK; The grid that described the first current source I21 in the first oscillating unit is connected to the second input 2, the two NMOS pipe MN2 of the second NOR gate NOR2 through described the second inverter INV2 connects the first input end 1 of described the second NOR gate NOR2; The output of described the first NOR gate NOR1 is also connected with the first input end 1 of described the second NOR gate NOR2, and the output of described the second NOR gate NOR2 is also connected with the second input 2 of described the first NOR gate NOR1; The input of the first inverter INV1 is connected on the node between the first current source I11 and the 4th NMOS pipe MN4, and the input of the second inverter INV2 is connected on the node between the first current source I21 and the 6th NMOS pipe MN6.The signal of the output output of wherein said the first NOR gate NOR1 is described target low frequency signal LCK.
Wherein the 3rd NMOS pipe MN3, the 4th NMOS pipe MN4 and the first inverter INV1 have formed the comparison circuit in the first oscillating unit, for the reference peak threshold voltage of relatively the first resistance R 1 generation and the comparative voltage of the first capacitor C 1 generation; The one NMOS pipe MN1 is the charge/discharge control circuit in the first oscillating unit, and its comparative voltage producing in the first capacitor C 1 discharges to described the first capacitor C 1 while being more than or equal to the reference peak threshold voltage that the first resistance R 1 produces; The 5th NMOS pipe MN5, the 6th NMOS pipe MN6 and the second inverter INV2 have formed the comparison circuit in the second oscillating unit, for the reference peak threshold voltage of relatively the second resistance R 2 generations and the comparative voltage of the second capacitor C 2 generations; The 2nd NMOS pipe MN2 is the charge/discharge control circuit in the second oscillating unit, and its comparative voltage producing in the second capacitor C 2 discharges to described the second capacitor C 2 while being more than or equal to the reference peak threshold voltage that the second resistance R 2 produces; And the first NOR gate NOR1 and the second NOR gate NOR2 form two logical circuits that oscillating unit is shared.
Hence one can see that, and the output of the first NOR gate NOR1 in described logical circuit is controlled in the output of the comparison circuit in the first oscillating unit, and then can control the conducting of MN2 and closure in charge/discharge control circuit in the second oscillating unit; The output of the second NOR gate NOR2 in described logical circuit is controlled in the output of the comparison circuit in the second oscillating unit, and then can control the conducting of MN1 and closure in charge/discharge control circuit in the first oscillating unit.Thereby realize the function by comparison circuit controlled discharge control circuit.The annexation of each element in Fig. 5 is known, suppose first to the first capacitor C 1 charging, when the voltage VC1 once the first capacitor C 1 be detected is charged to peak value, the A node of the first inverter INV1 output just uprises, the output signal LCK(of the first NOR gate NOR1 is target low frequency signal LCK) from high step-down, the second capacitor C 2 starts charging, when the second capacitor C 2 is not charged to before peak value, the B node of the output of the second inverter INV2 is low level, the grid D point of a NMOS pipe MN1 is high level, and the first capacitor C 1 is discharged.Specifically can be with reference to shown in figure 5, wherein VC1 is the voltage of the first capacitor C 1, and VC2 is the voltage of the second capacitor C 2, at first period T1, the first capacitor C 1 starts to be discharged to zero in the starting point of described first period T1 from its peak value, and maintains nought state to the terminal of described first period T1; Meanwhile, the second capacitor C 2 starts charging in the starting point of first period T1 from null value, at the terminal of first period T1, charges to its peak value.Subsequently, when described the second capacitor C 2 is charged to after peak value, described B point uprises from low, described D point becomes low level, and a described C1 starts charging, and a described C1 charges to before peak value, described A point is low level, and described target low frequency signal LCK is high level, and the second capacitor C 2 is discharged.Specifically can be with reference to shown in figure 5, at second phase T2, described the first capacitor C 1 starts charging in the starting point of described second phase T2 from null value, at the terminal of second phase T2, charges to its peak value; Meanwhile, described the second capacitor C 2 starts to be discharged to zero in the starting point of second phase T2 from peak value, and maintains nought state to the terminal of second phase T2.Again subsequently, when the voltage VC1 of the first capacitor C 1 is charged to peak value, described A node just uprises, and goes round and begins again like this, and oscillator just vibration gets up.
When described first period T1, described target low frequency signal LCK is low level, and when follow-up second phase T2, described target low frequency signal LCK is high level.Can find out, described first period T1 and second phase T2 have formed the one-period of target low frequency signal LCK.When the first capacitor C 1 and the second capacitor C 2 ceaselessly alternately discharge and recharge, the target low frequency signal that will the output cycle be T1+T2.
In the present invention, if ignore delay and the logical circuit (INV1 of comparator, INV2, NOR1, NOR2) time of delay, equal the charging interval (being T1) of the first capacitor C 1 and charging interval (the being T2) sum of the second capacitor C 2 cycle of oscillation of described programmable oscillator, have nothing to do with the discharge time of the first capacitor C 1 and the discharge time of the second capacitor C 2, so just improved precision cycle of oscillation of described programmable oscillator.If the breadth length ratio of the 3rd NMOS pipe MN3 and the 4th NMOS pipe MN4 equates, the breadth length ratio of the 5th NMOS pipe MN5 and the 6th NMOS pipe MN6 equates, the electric current that the first current source I11 in the first oscillating unit and the second current source I12 provide equates, the electric current that the first current source I21 in the second oscillating unit and the second current source I22 provide equates, in the first capacitor C 1 charging process, voltage on it is from zero director I11R1, the electric charge of the first capacitor C 1 charging is Q1=I12R1C1 during this period of time, corresponding charging current is I11, so charging interval T1=Q1/I11=I12R1C1/I11 of the first capacitor C 1, I11=I12 wherein, so T1=R1C1, in like manner, the charging interval T2=R2C2 of the second capacitor C 2, be T=T1+T2=R1C1+R2C2 the cycle of oscillation of described programmable oscillator.Wherein, R1 is the resistance value of the first resistance R 1, and C1 is the capacitance of the first capacitor C 1, and R2 is the resistance value of the second resistance R 2, and C2 is the capacitance of the second capacitor C 2.
Hence one can see that, the cycle of described target low frequency signal LCK only with the capacitance of described the first capacitor C 1, the resistance value of the capacitance of the second capacitor C 2, the first resistance R 1 is relevant with the resistance value of the second resistance R 2, so described calibrating signal can regulate the value of the first capacitor C 1, the second capacitor C 2, the first resistance R 1 and the second resistance R 2 further to regulate the frequency of described target low frequency signal by above-mentioned method (being the method shown in Fig. 2 or Fig. 3).
Certainly, when if the initial value of the electric current that the first current source I11 provides with the second current source I12 is different, or the initial value of first electric current I 21 and the second electric current I 22 is when different, all can, by being similar to the processing mode of above-mentioned electric capacity, by described correction data signal, to above-mentioned electric current, regulate and control calibration.
Except the circuit of a kind of oscillation module able to programme shown in Fig. 4, the present invention also provides a kind of circuit of oscillation module able to programme of simplification, as shown in Figure 6.In programmable oscillator in Fig. 6 and Fig. 4, the difference of programmable oscillator is: the oscillation module able to programme in this figure has saved the second resistance R 2, the second current source I22 and the 5th NMOS pipe MN5, and the grid of the 6th NMOS pipe MN6 is directly connected to the grid of the 3rd NMOS pipe MN3.Like this, the grid voltage of MN3 provides voltage bias for MN4, and this voltage also can be used as the voltage bias of MN6.The operation principle of the programmable oscillator in Fig. 6 is similar to the operation principle in Fig. 4, in design, only need to meet the first current source I21 in the second oscillating unit, the electric current that the first current source I11 in the first oscillating unit, the second current source I12 provide all equates, the length-width ratio of NMOS pipe MN3, MN4 and MN6 all equates, and can obtain thus: T1=R1C1, T2=(I1R1) C2/I4=R1C2.
Above-mentioned Fig. 4 and Fig. 6 illustrate two metal-oxide-semiconductors in comparison circuit described in oscillating unit and are NMOS pipe, it is when actual realization, can also adopt PMOS pipe to realize, as by as described in MN1 replace with PMOS pipe MP1, described MN2 is replaced with to PMOS pipe MP2, described MN3, MN4, MN5 and MN6 are replaced with respectively to PMOS pipe MP3, MP4, MP5 and MP6.Accordingly, the circuit in Fig. 4 becomes: it is upper that an end that produces the first resistance R 1 of reference peak threshold voltage in the first oscillating unit is connected on voltage VDD, and the other end is connected on the source electrode of MP3, and described the second current source I12 connects between the drain electrode of MP3 and ground; An end that produces the first capacitor C 1 of comparative voltage in the first oscillating unit is connected on voltage VDD, the other end is connected on the source electrode of MP4, described the first current source I11 that connects between the drain electrode of MP4 and ground, the current direction of described the first current source I11 and the second current source I12 points to ground; MP1 is in parallel with described the first capacitor C 1; The grid of MP3 is connected with the grid of MP4; It is upper that an end that produces the second resistance R 2 of reference peak threshold voltage in the second oscillating unit is connected on voltage VDD, and the other end is connected on the source electrode of MP5, and described the second current source I22 connects between the drain electrode of MP5 and ground; An end that produces the second capacitor C 2 of comparative voltage in the second oscillating unit is connected on voltage VDD, the other end is connected on the source electrode of MP6, described the first current source I21 that connects between the drain electrode of MP6 and ground, the current direction of described the first current source I21 and the second current source I22 points to ground; MP2 is in parallel with described the second capacitor C 2; The grid of MP5 is connected with the grid of MP6.Remaining element as the connection of the first inverter INV1, the first NOR gate NOR1, the second inverter INV2 and the second NOR gate NOR2 all with in Fig. 4, connect identical.
Adopt after PMOS pipe, MP3, MP4 and the first inverter INV1 have formed the comparison circuit in the first oscillating unit, for the reference peak threshold voltage of relatively the first resistance R 1 generation and the comparative voltage of the first capacitor C 1 generation; MP1 is the charging control circuit in the first oscillating unit, and charging control circuit when its comparative voltage producing in the first capacitor C 1 is less than or equal to the reference peak threshold voltage that the first resistance R 1 produces in the first oscillating unit charges to described the first capacitor C 1; MP5, MP6 and the second inverter INV2 have formed the comparison circuit in the second oscillating unit, for the reference peak threshold voltage of relatively the second resistance R 2 generations and the comparative voltage of the second capacitor C 2 generations; MP2 is the charging control circuit in the second oscillating unit, and charging control circuit when its comparative voltage producing in the second capacitor C 2 is less than or equal to the reference peak threshold voltage that the second resistance R 2 produces in the second oscillating unit charges to described the second capacitor C 2; And the first NOR gate NOR1 and the second NOR gate NOR2 form two logical circuits that oscillating unit is shared.
Hence one can see that, and when adopting PMOS pipe, the output of the first NOR gate NOR1 in described logical circuit is controlled in the output of the comparison circuit in the first oscillating unit, and then can control the conducting of MN2 and closure in charging control circuit in the second oscillating unit; The output of the second NOR gate NOR2 in described logical circuit is controlled in the output of the comparison circuit in the second oscillating unit, and then can control the conducting of MN1 and closure in charging control circuit in the first oscillating unit.Thereby realize, by comparison circuit, controlled the function of charging control circuit.
Certainly, corresponding to Fig. 6, can adopt too PMOS pipe to replace existing NMOS pipe, its principle is similar to the above, just repeats no more here.
In sum, programmable oscillator provided by the invention can utilize the high-frequency signal of high frequency crystal oscillation device to produce an accurate low-frequency signals after calibrated, this low-frequency signals is not subject to the impact of capacitor discharge time, accuracy is high, and owing to can save low frequency crystal oscillator in application, thereby saved cost.
Above-mentioned explanation has fully disclosed the specific embodiment of the present invention.It is pointed out that being familiar with any change that person skilled in art does the specific embodiment of the present invention does not all depart from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention is also not limited only to previous embodiment.
Claims (8)
1. an oscillator, it is characterized in that, it comprises the first oscillating unit and the second oscillating unit, wherein each oscillating unit comprises comparison circuit and the charge/discharge control circuit of the resistance, the electric capacity that produces a comparative voltage, the first current source, more described reference peak threshold voltage and the described comparative voltage that produce reference peak threshold voltage
The electric current that the first current source based on the first oscillating unit provides charges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is more than or equal to the reference peak threshold voltage in the first oscillating unit, the charge/discharge control circuit of notifying the charge/discharge control circuit of the first oscillating unit to start electric discharge and the second oscillating unit stops discharging
The electric current that the first current source based on the second oscillating unit provides charges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to the reference peak threshold voltage in the second oscillating unit, the charge/discharge control circuit of notifying the charge/discharge control circuit of the second oscillating unit to start electric discharge and the first oscillating unit stops discharging.
2. oscillator according to claim 1, is characterized in that: described the first oscillating unit and the second oscillating unit are shared a logical circuit, and described logical circuit comprises the first NOR gate and the second NOR gate, and each oscillating unit also comprises the second current source,
Comparison circuit in described the first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and the first inverter, charge/discharge control circuit in the first oscillating unit comprises a NMOS pipe, a termination voltage of the second current source in the first oscillating unit wherein, the drain electrode of another termination the 3rd NMOS pipe, between the source electrode of described the 3rd NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage in the first oscillating unit, one termination voltage of the first current source in the first oscillating unit, the drain electrode of another termination the 4th NMOS pipe, between the source electrode of described the 4th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the first oscillating unit, the 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe, in the one NMOS pipe and the first oscillating unit, produce the described Capacitance parallel connection of comparative voltage, the drain electrode of the 4th NMOS pipe connects the input of the first inverter,
Comparison circuit in described the second oscillating unit comprises the 5th NMOS pipe, the 6th NMOS pipe and the second inverter, charge/discharge control circuit in the second oscillating unit comprises the 2nd NMOS pipe, a termination voltage of the second current source in the second oscillating unit wherein, the drain electrode of another termination the 5th NMOS pipe, between the source electrode of described the 5th NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage in the second oscillating unit, one termination voltage of the first current source in the second oscillating unit, the drain electrode of another termination the 6th NMOS pipe, between the source electrode of described the 6th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the second oscillating unit, in the 2nd NMOS pipe and the second oscillating unit, produce the described Capacitance parallel connection of comparative voltage, the drain electrode of the 6th NMOS pipe connects the input of the second inverter,
The output of the first inverter is connected with the first input end of the first NOR gate, the grid of the one NMOS pipe is connected with the second input of the first NOR gate and the output of the second NOR gate, the output of the first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of the second NOR gate, and the output of the second inverter is connected with the second input of the second NOR gate.
3. oscillator according to claim 2, it is characterized in that: the length-width ratio of described the 3rd NMOS pipe and the 4th NMOS pipe equates, the length-width ratio of described the 5th NMOS pipe and the 6th NMOS pipe equates, the electric current that the first current source in the first oscillating unit and the second current source provide is equal, and the electric current that the first current source in the second oscillating unit and the second current source provide equates.
4. an oscillator, it is characterized in that, it comprises the first oscillating unit and the second oscillating unit, wherein two oscillating units are shared a resistance that produces reference peak threshold voltage, each oscillating unit also comprises comparison circuit and the charge/discharge control circuit of the electric capacity, the first current source, more described reference peak threshold voltage and the described comparative voltage that produce a comparative voltage
The electric current that the first current source based on the first oscillating unit provides charges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is more than or equal to described reference peak threshold voltage, the charge/discharge control circuit of notifying the charge/discharge control circuit of the first oscillating unit to start electric discharge and the second oscillating unit stops discharging
The electric current that the first current source based on the second oscillating unit provides charges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to described reference peak threshold voltage, the charge/discharge control circuit of notifying the charge/discharge control circuit of the second oscillating unit to start electric discharge and the first oscillating unit stops discharging.
5. oscillator according to claim 4, is characterized in that:
Described the first oscillating unit and the second oscillating unit are shared a logical circuit and the second current source, and described logical circuit comprises the first NOR gate and the second NOR gate,
Comparison circuit in described the first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and the first inverter, charge/discharge control circuit in the first oscillating unit comprises a NMOS pipe, a termination voltage of the second current source wherein, the drain electrode of another termination the 3rd NMOS pipe, between the source electrode of described the 3rd NMOS pipe and ground, be connected the resistance that produces reference peak threshold voltage, one termination voltage of the first current source in the first oscillating unit, the drain electrode of another termination the 4th NMOS pipe, between the source electrode of described the 4th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the first oscillating unit, the 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe, the one NMOS pipe and described Capacitance parallel connection, the drain electrode of the 4th NMOS pipe connects the input of the first inverter,
Comparison circuit in described the second oscillating unit comprises the 3rd NMOS pipe, the 6th NMOS pipe and the second inverter, wherein the comparison circuit in the second oscillating unit and the comparison circuit in the first oscillating unit are shared the 3rd NMOS pipe, charge/discharge control circuit in the second oscillating unit comprises the 2nd NMOS pipe, a termination voltage of the first current source in the second oscillating unit wherein, the drain electrode of another termination the 6th NMOS pipe, between the source electrode of described the 6th NMOS pipe and ground, be connected the electric capacity that produces comparative voltage in the second oscillating unit, the grid of the 6th NMOS pipe is connected with the node between the second current source in described the first oscillating unit and the 3rd NMOS pipe, the 2nd NMOS pipe and described Capacitance parallel connection, the drain electrode of the 6th NMOS pipe connects the input of the second inverter,
The output of the first inverter is connected with the first input end of the first NOR gate, the grid of the one NMOS pipe is connected with the second input of the first NOR gate and the output of the second NOR gate, the output of the first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of the second NOR gate, and the output of the second inverter is connected with the second input of the second NOR gate.
6. oscillator according to claim 5, it is characterized in that: the length-width ratio of described the 3rd NMOS pipe, the 4th NMOS pipe and the 5th NMOS pipe is all equal, and the electric current that the first current source in the first current source in the first oscillating unit, the second current source and the second oscillating unit provides all equates.
7. an oscillator, it is characterized in that, it comprises the first oscillating unit and the second oscillating unit, wherein each oscillating unit comprises comparison circuit and the charging control circuit of the resistance, the electric capacity that produces a comparative voltage, current source, more described reference peak threshold voltage and the described comparative voltage that produce reference peak threshold voltage
The electric current that current source based on the first oscillating unit provides discharges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is less than or equal to the reference peak threshold voltage in the first oscillating unit, the charging control circuit of notifying the charging control circuit of the first oscillating unit to start charging and the second oscillating unit stops charging
The electric current that current source based on the second oscillating unit provides discharges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is less than or equal to the reference peak threshold voltage in the second oscillating unit, the charging control circuit of notifying the charging control circuit of the second oscillating unit to start charging and the first oscillating unit stops charging.
8. an oscillator, it is characterized in that, it comprises the first oscillating unit and the second oscillating unit, wherein two oscillating units are shared a resistance that produces reference peak threshold voltage, each oscillating unit also comprises comparison circuit and the charging control circuit of the electric capacity, current source, more described reference peak threshold voltage and the described comparative voltage that produce a comparative voltage
The electric current that current source based on the first oscillating unit provides discharges to the electric capacity of the first oscillating unit, when the comparative voltage of the comparison circuit of the first oscillating unit in the first oscillating unit is less than or equal to described reference peak threshold voltage, the charging control circuit of notifying the charging control circuit of the first oscillating unit to start charging and the second oscillating unit stops charging
The electric current that current source based on the second oscillating unit provides discharges to the electric capacity of the second oscillating unit, when the comparative voltage of the comparison circuit of the second oscillating unit in the second oscillating unit is more than or equal to described reference peak threshold voltage, the charging control circuit of notifying the charging control circuit of the second oscillating unit to start charging and the first oscillating unit stops charging.
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| CN 201110248468 CN102386846B (en) | 2011-08-26 | 2011-08-26 | Programmable oscillator |
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