CN202218192U - Programmable oscillator - Google Patents
Programmable oscillator Download PDFInfo
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- CN202218192U CN202218192U CN2011203147673U CN201120314767U CN202218192U CN 202218192 U CN202218192 U CN 202218192U CN 2011203147673 U CN2011203147673 U CN 2011203147673U CN 201120314767 U CN201120314767 U CN 201120314767U CN 202218192 U CN202218192 U CN 202218192U
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Abstract
The utility model provides a programmable oscillator which comprises a calibrating signal generation module and a programmable oscillation module, wherein the calibrating signal generation module is used for generating a calibrating signal by comparing a high-frequency reference signal and a low-frequency target signal output by the programmable oscillation module; and the programmable oscillation module is used for calibrating the low-frequency target signal output by the programmable oscillation module according to the calibrating signal. The programmable oscillator can be used for obtaining an output frequency signal with higher accuracy.
Description
[technical field]
The utility model relates to electronic circuit field, particularly a kind of programmable oscillator.
[background technology]
In order to cater to the demand in market, more and more to the research and development of high-precision low-power consumption oscillator, such as the disclosed high-precision low-power consumption oscillators of Chinese patent, be 200810112605.4,200810115218.6 like application number, 200910087721.X etc.It is very low that these oscillators can produce power consumption, and frequency goes in the various power-supply management systems with supply voltage and the less oscillator signal of variations in temperature, but some occasion requires also very high to the frequency change that process deviation causes.Said process deviation is meant the frequency error between the chip that extensive manufacturing process causes, and very high like the standby clock request in the Bluetooth system, clock jitter will cause two to need the Bluetooth system of communication under sleep pattern, can't normally to shake hands and wake up.In some system, high to frequency requirement in bluetooth or USB system, for example require frequency change less than+/-1000ppm, i.e. one thousandth.Crystal oscillator can reach usually+/-100ppm in, but the price of crystal is higher, application cost is also higher.Need at least two crystal oscillators in the conventional bluetooth system, one is used for radio frequency part, and frequency is higher, is generally 26-100MHz, also needs one in addition and is used for the low-frequency clock that sleep pattern is waken up, and like 32KHz or lower, cost also can be than higher like this.
Overcome the problems referred to above because be necessary to propose a kind of improved technical scheme.
[utility model content]
The purpose of this part be to summarize the utility model embodiment some aspects and briefly introduce some preferred embodiments.In this part and the application's specification digest and utility model title, may do a little simplification or omit avoiding the making purpose of this part, specification digest and utility model title fuzzy, and this simplification or omit the scope that can not be used to limit the utility model.
The purpose of the utility model is to provide a kind of programmable oscillator, and it can obtain the output frequency signal of degree of precision.
Purpose according to the utility model; The utility model provides a kind of programmable oscillator; It comprises calibrating signal generation module and oscillation module able to programme; With reference to the target low frequency signal generation calibrating signal of high-frequency signal and oscillation module able to programme output, said oscillation module able to programme is calibrated the target low frequency signal of its output to wherein said calibrating signal generation module according to said calibrating signal through relatively.
Further, said calibrating signal generation module is counted with reference to high-frequency signal said in the one-period of said target low frequency signal, confirms said calibrating signal according to the difference of count value that counts to get and standard value.
Further; Said oscillation module able to programme comprises the resistance that produces the reference peak threshold voltage, the electric capacity that discharges and recharges repeatedly and said electric capacity is carried out the electric current of charge or discharge; Said resistance comprises the resistance unit of several series connection; In some or all resistance units each all with a switch in parallel, according to the conducting of each switch of said calibrating signal control or end the resistance value of adjusting said resistance, and then calibrate the target low frequency signal of said oscillation module output able to programme; Said electric capacity comprises the capacitor cell that several are parallelly connected; In some or all capacitor cells each all connected with a switch; Control the conducting of each switch or end the capacitance of adjusting said electric capacity according to said calibrating signal, and then calibrate the target low frequency signal of said oscillation module output able to programme; Or adjust the size of said electric current, and then calibrate the target low frequency signal of said oscillation module output able to programme according to said calibrating signal.
Further; Said oscillation module able to programme also comprises in comparison circuit and charge/discharge control circuit or the charging control circuit; One end of said resistance forms said reference peak threshold voltage; One end of electric capacity forms comparative voltage; In that controlled said electric current is under the situation that said electric capacity is charged according to said calibrating signal; More said reference peak threshold voltage of said comparison circuit and said comparative voltage, and control said charge/discharge control circuit at said comparative voltage during more than or equal to said reference peak threshold voltage said electric capacity is discharged are in that controlled said electric current is under the situation that said electric capacity is discharged according to said calibrating signal; More said reference peak threshold voltage of said comparison circuit and said comparative voltage, and when said comparative voltage is less than or equal to said reference peak threshold voltage, control said charging control circuit said electric capacity is charged.
Further; Said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein each oscillating unit comprises the resistance that produces the reference peak threshold voltage, comparison circuit and the charge/discharge control circuit that produces electric capacity, first current source, more said reference peak threshold voltage and the said comparative voltage of a comparative voltage; The electric current that provides based on first current source of first oscillating unit charges to the electric capacity of first oscillating unit; The comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is during more than or equal to the reference peak threshold voltage in first oscillating unit; The charge/discharge control circuit of notifying the charge/discharge control circuit of first oscillating unit to begin to discharge with second oscillating unit stops discharge; The electric current that provides based on first current source of second oscillating unit charges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to the reference peak threshold voltage in second oscillating unit, and the charge/discharge control circuit of notifying the charge/discharge control circuit of second oscillating unit to begin to discharge with first oscillating unit stops discharge.
Further, said first oscillating unit and second oscillating unit are shared a logical circuit, and each oscillating unit also comprises second current source; Said logical circuit comprises first NOR gate and second NOR gate; Comparison circuit in said first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and first inverter, and the charge/discharge control circuit in first oscillating unit comprises NMOS pipe, wherein a termination voltage of second current source in first oscillating unit; The drain electrode of another termination the 3rd NMOS pipe; Is connected the resistance that produces the reference peak threshold voltage in first oscillating unit, a termination voltage of first current source in first oscillating unit, the drain electrode that another termination the 4th NMOS manages between the source electrode of said the 3rd NMOS pipe and the ground; The electric capacity that is connected generation comparative voltage in first oscillating unit between the source electrode of said the 4th NMOS pipe and the ground; The 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe, and NMOS pipe is parallelly connected with said electric capacity, and the drain electrode of the 4th NMOS pipe connects the input of first inverter; Comparison circuit in said second oscillating unit comprises the 5th NMOS pipe, the 6th NMOS pipe and second inverter; Charge/discharge control circuit in second oscillating unit comprises the 2nd NMOS pipe; A termination voltage of second current source in second oscillating unit wherein; The resistance that is connected generation reference peak threshold voltage in first oscillating unit between the drain electrode of another termination the 5th NMOS pipe, the source electrode of said the 5th NMOS pipe and ground, a termination voltage of first current source in second oscillating unit; The drain electrode of another termination the 6th NMOS pipe; Is connected the electric capacity that produces comparative voltage in first oscillating unit between the source electrode of said the 6th NMOS pipe and the ground, the 2nd NMOS pipe is parallelly connected with said electric capacity, and the drain electrode that the 6th NMOS manages connects the input of second inverter; The output of first inverter is connected with the first input end of first NOR gate; The grid of the one NMOS pipe is connected with second input of first NOR gate and the output of second NOR gate; The output of first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of second NOR gate, and the output of second inverter is connected with second input of second NOR gate.
Further; Said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein two oscillating units are shared a resistance that produces the reference peak threshold voltage; Each oscillating unit also comprises the comparison circuit and the charge/discharge control circuit of the electric capacity, first current source, more said reference peak threshold voltage and the said comparative voltage that produce a comparative voltage; The electric current that provides based on first current source of first oscillating unit charges to the electric capacity of first oscillating unit; The comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit be during more than or equal to said reference peak threshold voltage, and the charge/discharge control circuit of notifying the charge/discharge control circuit of first oscillating unit to begin to discharge with second oscillating unit stops discharge; The electric current that provides based on first current source of second oscillating unit charges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to said reference peak threshold voltage, and the charge/discharge control circuit of notifying the charge/discharge control circuit of second oscillating unit to begin to discharge with first oscillating unit stops discharge.
Further; Said first oscillating unit and second oscillating unit are shared a logical circuit and second current source; Said logical circuit comprises first NOR gate and second NOR gate, and the comparison circuit in said first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and first inverter, and the charge/discharge control circuit in first oscillating unit comprises NMOS pipe; A termination voltage of second current source wherein; The resistance that is connected generation reference peak threshold voltage between the drain electrode of another termination the 3rd NMOS pipe, the source electrode of said the 3rd NMOS pipe and ground, a termination voltage of first current source in first oscillating unit; The drain electrode of another termination the 4th NMOS pipe; Is connected the electric capacity that produces comparative voltage in first oscillating unit between the source electrode of said the 4th NMOS pipe and the ground, the 3rd NMOS pipe is connected with the grid that the 4th NMOS manages, and a NMOS manages parallelly connected with said electric capacity; The drain electrode of the 4th NMOS pipe connects the input of first inverter; Comparison circuit in said second oscillating unit comprises the 3rd NMOS pipe, the 6th NMOS pipe and second inverter, and wherein comparison circuit in second oscillating unit and the comparison circuit in first oscillating unit are shared the 3rd NMOS pipe, and the charge/discharge control circuit in second oscillating unit comprises the 2nd NMOS pipe; A termination voltage of first current source in second oscillating unit wherein; Is connected the electric capacity that produces comparative voltage in second oscillating unit between the drain electrode of another termination the 6th NMOS pipe, the source electrode of said the 6th NMOS pipe and ground, the node between second current source and the 3rd NMOS manage in the grid of the 6th NMOS pipe and said first oscillating unit is connected; The 2nd NMOS pipe is parallelly connected with said electric capacity; The drain electrode of the 6th NMOS pipe connects the input of second inverter, and the output of first inverter is connected with the first input end of first NOR gate, and the grid of NMOS pipe is connected with second input of first NOR gate and the output of second NOR gate; The output of first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of second NOR gate, and the output of second inverter is connected with second input of second NOR gate.
Further; Said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein each oscillating unit comprises the resistance that produces the reference peak threshold voltage, comparison circuit and the charging control circuit that produces electric capacity, current source, more said reference peak threshold voltage and the said comparative voltage of a comparative voltage; The electric current that provides based on the current source of first oscillating unit discharges to the electric capacity of first oscillating unit; When the comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is less than or equal to the reference peak threshold voltage in first oscillating unit; The charging control circuit of notifying the charging control circuit of first oscillating unit to begin to charge with second oscillating unit stops charging; The electric current that provides based on the current source of second oscillating unit discharges to the electric capacity of second oscillating unit; When the comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit was less than or equal to the reference peak threshold voltage in second oscillating unit, the charging control circuit of notifying the charging control circuit of second oscillating unit to begin to charge with first oscillating unit stopped charging.
Further; Said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein two oscillating units are shared a resistance that produces the reference peak threshold voltage; Each oscillating unit also comprises the comparison circuit and the charging control circuit of the electric capacity, current source, more said reference peak threshold voltage and the said comparative voltage that produce a comparative voltage; The electric current that provides based on the current source of first oscillating unit discharges to the electric capacity of first oscillating unit; When the comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is less than or equal to said reference peak threshold voltage; The charging control circuit of notifying the charging control circuit of first oscillating unit to begin to charge with second oscillating unit stops charging; The electric current that provides based on the current source of second oscillating unit discharges to the electric capacity of second oscillating unit, and the comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to said reference peak threshold voltage, and the charging control circuit of notifying the charging control circuit of second oscillating unit to begin to charge with first oscillating unit stops charging.
Compared with prior art, the programmable oscillator that the utility model provides can utilize the high-frequency signal of high-frequency crystal oscillator that the low-frequency signals of its output is calibrated, thereby obtains the output frequency signal of degree of precision.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the utility model embodiment; The accompanying drawing of required use is done to introduce simply in will describing embodiment below; Obviously, the accompanying drawing in describing below only is some embodiment of the utility model, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.Wherein:
Fig. 1 is the structural representation of programmable oscillator in the utility model;
The sketch map that Fig. 2 controls resistance in the oscillation module able to programme for calibrating signal;
The sketch map that Fig. 3 controls electric capacity in the oscillation module able to programme for calibrating signal;
Fig. 4 is an oscillation module able to programme circuit diagram in one embodiment in the utility model;
Fig. 5 is the oscillator signal of first electric capacity among Fig. 4, the oscillator signal of second electric capacity and the contrast sketch map of the corresponding target low frequency signal that produces; With
Fig. 6 is an oscillation module able to programme circuit diagram in another embodiment in the utility model.
[embodiment]
The detailed description of the utility model is mainly come the running of direct or indirect simulation the utility model technical scheme through program, step, logical block, process or other symbolistic descriptions.Be the thorough the utility model of understanding, in ensuing description, stated a lot of specific detail.And when not having these specific detail, the utility model then possibly still can be realized.Affiliated those of skill in the art use these descriptions here and state that the others skilled in the art in affiliated field effectively introduce their work essence.In other words, be the purpose of the utility model of avoiding confusion, because the understanding easily of method of knowing and program, so they are not described in detail.
Alleged here " embodiment " or " embodiment " are meant special characteristic, structure or the characteristic that can be contained at least one implementation of the utility model.Different in this manual local " in one embodiment " that occur not are all to refer to same embodiment, neither be independent or optionally mutually exclusive with other embodiment embodiment.In addition, represent that the sequence of modules and revocable in method, flow chart or the functional block diagram of one or more embodiment refers to any particular order, also do not constitute restriction the utility model." connection " in this specification comprises direct connection, also comprises indirect connection; " some " or " several " in the literary composition are meant two or more.
The utility model provides a kind of programmable oscillator, and its high-frequency signal that utilizes the high frequency oscillation device to produce is regulated the low frequency signal of its output, so that low frequency signal is adjusted to accurate target low frequency signal, thereby has saved the use of low frequency crystal oscillator.
Fig. 1 is the structural representation of programmable oscillator in the utility model; Said programmable oscillator comprises calibrating signal generation module 110 and oscillation module 120 able to programme; Wherein said calibrating signal generation module 110 relatively with reference to the target low frequency signal LCK of high-frequency signal HCK and oscillation module able to programme 120 outputs with output calibrating signal (being expressed as D0, D1...Dn among the figure), said oscillation module 120 able to programme is calibrated the target low frequency signal LCK of its output according to said calibrating signal.Said calibrating signal generation module 110 has a variety of methods with reference to high-frequency signal HCK and target low frequency signal LCK to obtain calibrating signal through more said; Usually; Said calibrating signal can adopt various coded system of the prior art, like thermometer code, Gray code, complement code etc.
Obtain calibrating signal a kind of the most general method can for: said calibrating signal generation module 110 is counted with reference to high-frequency signal said in the one-period of said target low frequency signal, confirms said calibrating signal according to the difference of count value that counts to get and standard value.In one embodiment, for the ease of understanding, this data mode of sentencing the conventional belt sign bit is described said calibrating signal, but the principle of the utility model is applicable to various coding techniquess.Can suppose that D0 is a sign bit, high frequency clock HCK frequency is 64MHz, and the low-frequency clock target frequency is 32KHz, and said calibrating signal generation module 110 can produce said calibrating signal through the counting form.For the one-period of 32KHz frequency accurately; Need the just in time HCK cycle of full 2000 (standard value in this example) 64MHz of meter; If counting surpasses 2000 cycles, show that then the LCK cycle is long partially, can be made as 0 with D0; Show to reduce the LCK cycle, D1-Dn be set as reduce the LCK cycle what the step.If the adjustment step-length is 0.5%, the binary number that D1-Dn constitutes is 40, and then the cycle is shortened 0.5% * (2
n-40).Otherwise, if counting shows then that less than 2000 cycles the LCK cycle is short partially, can D0 be made as 1, showing needs to increase the LCK cycle, and D1-Dn is set as increases LCK cycle step number.If the adjustment step-length is 0.5%, the binary number that D1-Dn constitutes is 40, and then the cycle is increased 0.5% * 40=20%, promptly is increased to 120%.
That is to say; Relatively produce calibrating signal, control programmable unit in the said oscillation module able to programme 120 to obtain accurate target low frequency signal LCK through said calibrating signal then with reference to high-frequency signal HCK and coarse target low frequency signal LCK of producing before.
Said calibrating signal is generally used for calibrating adjustable device or the parameter in the oscillation module 120 able to programme, like resistance, electric capacity or electric current etc.
Said oscillation module able to programme 120 comprises the resistance that produces the reference peak threshold voltage, the electric capacity that discharges and recharges repeatedly and said electric capacity is carried out the electric current of charge or discharge.
Accordingly; In order to make said calibrating signal to control to the said resistance that produces the reference peak threshold voltage; Said resistance can be designed as the form of several resistance unit series connection; In some or all resistance units each all with a switch in parallel, according to the conducting of each switch of said calibrating signal control or end the resistance value of adjusting said resistance, and then calibrate the target low frequency signal of said oscillation module able to programme 120 outputs.It specifically can be referring to shown in Figure 2; It shows the sketch map that calibrating signal is controlled resistance in the oscillation module able to programme; Several resistance R 00 that said resistance is arranged to connect, R10, R11, R12 ..., R1n, respectively the resistance R 10 of series connection, R10, R11, R12 ..., switch of the last parallel connection of R1n, like parallelly connected switch S 0 on the resistance R 10; Switch S 1 of parallel connection on resistance R 11, the rest may be inferred; Then with said calibrating signal D0, D1, D2 ..., Dn be connected to said switch S 0, S1, S2 ..., Sn is last with the conducting of controlling said switch with end, get on thereby which resistance of may command can be connected in series to resistance R 00.In view of the above, just can be through said calibrating signal to said generation with reference to the regulation and control of programming of the value of the resistance of peak value.
In order to make said calibrating signal to control to the said electric capacity that discharges and recharges repeatedly; Can said electric capacity be arranged to the form of several capacitor cell parallel connections; In some or all capacitor cells each all connected with a switch; Control the conducting of each switch or end the capacitance of adjusting said electric capacity according to said calibrating signal, and then calibrate the target low frequency signal of said oscillation module output able to programme.It specifically can be referring to shown in Figure 3; The sketch map that calibrating signal is controlled electric capacity in the oscillation module able to programme; Said electric capacity be arranged to parallel connection several capacitor C 00, C10, C11, C12 ..., C1n, for capacitor C 10, C10, C11, C12 ..., C1n switch of series connection on its place branch road respectively, like switch S 1 of series connection on the capacitor C 10 place branch roads; Switch S 2 of series connection on capacitor C 11 place branch roads, the rest may be inferred.Then with said calibrating signal D0, D1, D2 ..., that Dn is connected to said switch S 1, S2, S3..., Sn is last with the conducting of controlling said switch with end, get on thereby which electric capacity of may command can be parallel to capacitor C 00.In view of the above, just can be through said calibrating signal to the regulation and control of programming of the value that can carry out the electric capacity of repeated charge.
Similarly, can also adjust the size of the said electric current that in the oscillation module 120 able to programme electric capacity is discharged and recharged, and then calibrate the target low frequency signal of said oscillation module output able to programme according to said calibrating signal.The branch road that produces electric current also can be arranged to it to be similar to the parallel form of electric capacity, the switch of on part or all of current branch, connecting respectively, and each switch is controlled by said calibrating signal.In view of the above, just can be through the value that said calibrating signal is carried out the electric current of charge or discharge to the electric capacity regulation and control of programming.
In traditional oscillators, can do very for a short time fall time capacitance voltage as far as possible.If said capacitance voltage is very long fall time, the dependence of technology, temperature, supply voltage is all very big relatively during this period of time, can directly cause cycle of oscillation inaccurate.But said capacitance voltage fall time again can not be too short, and reason is that too weak point possibly cause capacitance voltage not to be put into zero fully.The starting point of charging voltage is just inaccurate like this, and is bigger with the variation of technology, temperature, supply voltage, thereby influenced the precision of charging interval section, also influenced cycle of oscillation.And the frequency of the target low frequency signal of the oscillation module output able to programme in the utility model and capacitance voltage are irrelevant fall time, thereby make that the target low frequency signal of output is more accurate.
In one embodiment; Said oscillation module able to programme 120 comprises first oscillating unit and second oscillating unit; Wherein each oscillating unit comprises the resistance that produces the reference peak threshold voltage, comparison circuit and the charge/discharge control circuit that produces electric capacity, first current source, more said reference peak threshold voltage and the said comparative voltage of a comparative voltage; The electric current that wherein provides based on first current source of first oscillating unit charges to the electric capacity of first oscillating unit; The comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit be during more than or equal to the reference peak threshold voltage in first oscillating unit, and the charge/discharge control circuit of notifying the charge/discharge control circuit of first oscillating unit to begin to discharge with second oscillating unit stops discharge; The electric current that provides based on first current source of second oscillating unit charges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be more than or equal in second oscillating unit during reference peak threshold voltage, and the charge/discharge control circuit of notifying the charge/discharge control circuit of second oscillating unit to begin to discharge with first oscillating unit stops discharge.
It should be noted that; Above-mentionedly saidly stop discharge and be meant that charge/discharge control circuit gets into the absence of discharge state; Promptly cannot the electricity on the said electric capacity discharged under this state; Saidly begin discharge and be meant that charge/discharge control circuit gets into discharge condition, promptly can discharge the electricity on the said electric capacity under this state.
Then said oscillation module 120 able to programme is described below through Fig. 4 and Fig. 5.
Fig. 4 is an oscillation module able to programme circuit diagram in one embodiment in the utility model; Said first oscillating unit comprises the 3rd NMOS pipe MN3, the 4th NMOS pipe MN4, NMOS pipe MN1, the first inverter INV1, the first current source I11, the second current source I12 and the first NOR gate NOR1, and second oscillating unit comprises the 5th NMOS pipe MN5, the 6th NMOS pipe MN6, the 2nd NMOS pipe MN2, the second inverter INV2, the first current source I21, the second current source I22 and the second NOR gate NOR2.
The termination voltage VDD of the said second current source I12 in first oscillating unit wherein; The said resistance R 1 that is used to produce the reference peak threshold voltage of connecting between the drain electrode of said the 3rd NMOS of another termination pipe MN3, the source electrode of the 3rd NMOS pipe MN3 and ground (below be called first resistance R 1); The termination voltage VDD of the said first current source I11 in first oscillating unit; The said capacitor C 1 that is used to produce comparative voltage of connecting between the drain electrode of said the 4th NMOS of another termination pipe MN4, the source electrode of the 4th NMO pipe MN4 and ground (below be called first capacitor C 1); The grid of the 3rd NMOS pipe MN3 is connected with the grid of the MN4 of its drain electrode and the 4th NMOS pipe; The termination voltage VDD of the second current source I22 in second oscillating unit; The said resistance R 2 that is used to produce the reference peak threshold voltage of connecting between the drain electrode of said the 5th NMOS of another termination pipe MN5, the source electrode of the 5th NMOS pipe MN5 and ground (below be called second resistance R 2); The termination voltage VDD of the first current source I21 in second oscillating unit; The said capacitor C 2 that is used to produce comparative voltage of connecting between the drain electrode of said the 6th NMOS of another termination pipe MN6, the source electrode of the 6th NMO pipe MN6 and ground (below be called second capacitor C 2); The grid of the 5th NMOS pipe MN5 is connected with the grid of the MN6 of its drain electrode and the 6th NMOS pipe; MN1 is parallelly connected with said first capacitor C 1 for the one NMOS pipe, and MN2 is parallelly connected with said second capacitor C 2 for the 2nd NMOS pipe; Said current source I11 in first oscillating unit is connected to the first input end 1 of the first NOR gate NOR1 through the said first inverter INV1; The grid of the one NMOS pipe MN1 connects the output of second input, 2, the first NOR gate NOR1 of the said first NOR gate NOR1 and exports said target low frequency signal LCK; The grid that the said first current source I21 in first oscillating unit is connected to second input, 2, the two NMOS pipe MN2 of the second NOR gate NOR2 through the said second inverter INV2 connects the first input end 1 of the said second NOR gate NOR2; The output of the said first NOR gate NOR1 also is connected with the first input end 1 of the said second NOR gate NOR2, and the output of the said second NOR gate NOR2 also is connected with second input 2 of the said first NOR gate NOR1; The input of the first inverter INV1 is connected on the node between the first current source I11 and the 4th NMOS pipe MN4, and the input of the second inverter INV2 is connected on the node between the first current source I21 and the 6th NMOS pipe MN6.The signal of the output output of the wherein said first NOR gate NOR1 is said target low frequency signal LCK.
Wherein the 3rd NMOS pipe MN3, the 4th NMOS pipe MN4 and the first inverter INV1 have constituted the comparison circuit in first oscillating unit, to be used for the comparative voltage of reference peak threshold voltage that comparison first resistance R 1 produces and 1 generation of first capacitor C; The one NMOS pipe MN1 is the charge/discharge control circuit in first oscillating unit, during reference peak threshold voltage that its comparative voltage that produces in first capacitor C 1 produces more than or equal to first resistance R 1 said first capacitor C 1 is discharged; The 5th NMOS pipe MN5, the 6th NMOS pipe MN6 and the second inverter INV2 have constituted the comparison circuit in second oscillating unit, to be used for the comparative voltage of reference peak threshold voltage that comparison second resistance R 2 produces and 2 generations of second capacitor C; The 2nd NMOS pipe MN2 is the charge/discharge control circuit in second oscillating unit, during reference peak threshold voltage that its comparative voltage that produces in second capacitor C 2 produces more than or equal to second resistance R 2 said second capacitor C 2 is discharged; And the first NOR gate NOR1 and the second NOR gate NOR2 constitute the logical circuit that two oscillating units are shared.
Hence one can see that, and the output of the first NOR gate NOR1 in the said logical circuit is controlled in the output of the comparison circuit in first oscillating unit, and then the conducting of MN2 and closure in the charge/discharge control circuit in may command second oscillating unit; The output of the second NOR gate NOR2 in the said logical circuit is controlled in the output of the comparison circuit in second oscillating unit, and then the conducting of MN1 and closure in the charge/discharge control circuit in may command first oscillating unit.Thereby realize function by comparison circuit control charge/discharge control circuit.Annexation by each element among Fig. 5 can be known; Suppose earlier first capacitor C 1 to be charged, when in a single day the voltage VC1 that detects first capacitor C 1 is charged to peak value, the A node of the first inverter INV1 output just uprises; The output signal LCK of the first NOR gate NOR1 (being target low frequency signal LCK) is from high step-down; Second capacitor C 2 begins charging, and before second capacitor C 2 was not charged to peak value, the B node of the output of the second inverter INV2 was a low level; Then the grid D point of NMOS pipe MN1 is a high level, and first capacitor C 1 is discharged.Specifically can be with reference to shown in Figure 5; Wherein VC1 is the voltage of first capacitor C 1, and VC2 is the voltage of second capacitor C 2, T1 between the first phase; The starting point of first capacitor C 1 T1 between the said first phase begins to be discharged to zero from its peak value, and keeps the terminal point of T1 between nought state to the said first phase; Simultaneously, the starting point of second capacitor C 2 T1 between the first phase begins charging from null value, and the terminal point of T1 charges to its peak value between the first phase.Subsequently, after said second capacitor C 2 was charged to peak value, said B point uprised from low; Said D point becomes low level, and a said C1 begins charging, before a said C1 charges to peak value; Said A point is a low level, and said target low frequency signal LCK is a high level, and second capacitor C 2 is discharged.Specifically can be with reference to shown in Figure 5, promptly at second phase T2, said first capacitor C 1 begins charging in the starting point of said second phase T2 from null value, charges to its peak value at the terminal point of second phase T2; Simultaneously, said second capacitor C 2 begins to be discharged to zero in the starting point of second phase T2 from peak value, and keeps the terminal point of nought state to second phase T2.Again subsequently, when the voltage VC1 of first capacitor C 1 was charged to peak value, said A node just uprised, and went round and began again like this, and oscillator just vibration gets up.
During T1, said target low frequency signal LCK is a low level between the said first phase, and when follow-up second phase T2, said target low frequency signal LCK is a high level.Can find out that T1 and second phase T2 have constituted the one-period of target low frequency signal LCK between the said first phase.When first capacitor C 1 and second capacitor C 2 ceaselessly alternately discharge and recharge, it will be the target low frequency signal of T1+T2 in the output cycle.
In the utility model, if ignore the delay and the logical circuit (INV1 of comparator; INV2; NOR1, equals the charging interval (being T1) of first capacitor C 1 and charging interval (the being T2) sum of second capacitor C 2 cycle of oscillation of said programmable oscillator at time of delay NOR2); Have nothing to do with the discharge time of first capacitor C 1 and the discharge time of second capacitor C 2, so just improved precision cycle of oscillation of said programmable oscillator.If the breadth length ratio of the 3rd NMOS pipe MN3 and the 4th NMOS pipe MN4 equates that the breadth length ratio of the 5th NMOS pipe MN5 and the 6th NMOS pipe MN6 equates that the electric current that the first current source I11 in first oscillating unit and the second current source I12 provide equates; The electric current that the first current source I21 in second oscillating unit and the second current source I22 provide equates; Then in first capacitor C, 1 charging process, the voltage on it is from zero director I11R1, and the electric charge of first capacitor C, 1 charging during this period of time is Q1=I12R1C1; Corresponding charging current is I11; So the charging interval T1=Q1/I11=I12R1C1/I11 of first capacitor C 1, so I11=I12 wherein is T1=R1C1; In like manner, the charging interval T2=R2C2 of second capacitor C 2, be T=T1+T2=R1C1+R2C2 the cycle of oscillation of said programmable oscillator.Wherein, R1 is the resistance value of first resistance R 1, and C1 is the capacitance of first capacitor C 1, and R2 is the resistance value of second resistance R 2, and C2 is the capacitance of second capacitor C 2.
Hence one can see that; The cycle of said target low frequency signal LCK is only relevant with the resistance value of the resistance value of the capacitance of the capacitance of said first capacitor C 1, second capacitor C 2, first resistance R 1 and second resistance R 2, so said calibrating signal can be regulated the frequency of the value of first capacitor C 1, second capacitor C 2, first resistance R 1 and second resistance R 2 with the said target low frequency signal of further adjusting through above-mentioned method (being the method shown in Fig. 2 or Fig. 3).
Certainly; If the initial value of the electric current that the first current source I11 and the second current source I12 provide is not simultaneously; Or the initial value of first electric current I 21 and second electric current I 22 is not simultaneously; All can regulate and control calibration through said correction data signal to above-mentioned electric current through being similar to the processing mode of above-mentioned electric capacity.
Except the circuit of a kind of oscillation module able to programme shown in Fig. 4, the utility model also provides a kind of circuit of oscillation module able to programme of simplification, and is as shown in Figure 6.The difference of programmable oscillator is among programmable oscillator among Fig. 6 and Fig. 4: the oscillation module able to programme among this figure has saved second resistance R 2, the second current source I22 and the 5th NMOS pipe MN5, and the grid of the 6th NMOS pipe MN6 is directly connected to the grid of the 3rd NMOS pipe MN3.Like this, the grid voltage of MN3 is that MN4 provides voltage bias, and this voltage also can be used as the voltage bias of MN6.The operation principle of the programmable oscillator among Fig. 6 is similar with the operation principle among Fig. 4; The electric current that only needing to satisfy the first current source I21, the first current source I11 in first oscillating unit, the second current source I12 in second oscillating unit in the design provides all equates; The length-width ratio of NMOS pipe MN3, MN4 and MN6 all equates to get final product; And can get thus: T1=R1C1, T2=(I1R1) C2/I4=R1C2.
Above-mentioned Fig. 4 and Fig. 6 illustrate two metal-oxide-semiconductors in the comparison circuit described in the oscillating unit and are the NMOS pipe; When it is realized in reality; Can also adopt PMOS to manage realizes; As said MN1 being replaced with PMOS pipe MP1, said MN2 is replaced with PMOS pipe MP2, said MN3, MN4, MN5 and MN6 are replaced with PMOS pipe MP3, MP4, MP5 and MP6 respectively.Accordingly, the circuit among Fig. 4 becomes: produce terminating on the voltage VDD of first resistance R 1 of reference peak threshold voltage in first oscillating unit, the other end is connected on the source electrode of MP3, and the said second current source I12 connects between the drain electrode of MP3 and the ground; One of first capacitor C 1 of generation comparative voltage terminates on the voltage VDD in first oscillating unit; The other end is connected on the source electrode of MP4; The said first current source I11 that connects between the drain electrode of MP4 and the ground, the current direction of the said first current source I11 and the second current source I12 points to ground; MP1 is parallelly connected with said first capacitor C 1; The grid of MP3 is connected with the grid of MP4; Produce terminating on the voltage VDD of second resistance R 2 of reference peak threshold voltage in second oscillating unit, the other end is connected on the source electrode of MP5, and the said second current source I22 connects between the drain electrode of MP5 and the ground; One of second capacitor C 2 of generation comparative voltage terminates on the voltage VDD in second oscillating unit; The other end is connected on the source electrode of MP6; The said first current source I21 that connects between the drain electrode of MP6 and the ground, the current direction of the said first current source I21 and the second current source I22 points to ground; MP2 is parallelly connected with said second capacitor C 2; The grid of MP5 is connected with the grid of MP6.Remaining element as the connection of the first inverter INV1, the first NOR gate NOR1, the second inverter INV2 and the second NOR gate NOR2 all with Fig. 4 in connect identical.
After adopting the PMOS pipe, MP3, MP4 and the first inverter INV1 have constituted the comparison circuit in first oscillating unit, to be used for the comparative voltage of reference peak threshold voltage that comparison first resistance R 1 produces and 1 generation of first capacitor C; MP1 is the charging control circuit in first oscillating unit, and the charging control circuit when it is less than or equal to the reference peak threshold voltage of first resistance R, 1 generation at the comparative voltage that first capacitor C 1 produces in first oscillating unit charges to said first capacitor C 1; MP5, MP6 and the second inverter INV2 have constituted the comparison circuit in second oscillating unit, to be used for the comparative voltage of reference peak threshold voltage that comparison second resistance R 2 produces and 2 generations of second capacitor C; MP2 is the charging control circuit in second oscillating unit, and the charging control circuit when it is less than or equal to the reference peak threshold voltage of second resistance R, 2 generations at the comparative voltage that second capacitor C 2 produces in second oscillating unit charges to said second capacitor C 2; And the first NOR gate NOR1 and the second NOR gate NOR2 constitute the logical circuit that two oscillating units are shared.
Hence one can see that, and when adopting the PMOS pipe, the output of the first NOR gate NOR1 in the said logical circuit is controlled in the output of the comparison circuit in first oscillating unit, and then the conducting of MN2 and closure in the charging control circuit in may command second oscillating unit; The output of the second NOR gate NOR2 in the said logical circuit is controlled in the output of the comparison circuit in second oscillating unit, and then the conducting of MN1 and closure in the charging control circuit in may command first oscillating unit.Thereby realize, by the function of comparison circuit control charging control circuit.
Certainly, corresponding to Fig. 6, can adopt the existing NMOS pipe of PMOS pipe replacement too, its principle and above-mentioned similar just repeats no more here.
In sum; The programmable oscillator that the utility model provides can utilize the high-frequency signal of high-frequency crystal oscillator to produce an accurate low-frequency signals after calibrated; This low-frequency signals does not receive the influence of capacitor discharge time; Accuracy is high, and owing in application, can save the low frequency crystal oscillator, thereby practiced thrift cost.
Above-mentioned explanation has fully disclosed the embodiment of the utility model.It is pointed out that any change that the technical staff that is familiar with this field does the embodiment of the utility model does not all break away from the scope of claims of the utility model.Correspondingly, the scope of the claim of the utility model also is not limited only to previous embodiment.
Claims (10)
1. programmable oscillator; It is characterized in that; It comprises calibrating signal generation module and oscillation module able to programme; With reference to the target low frequency signal generation calibrating signal of high-frequency signal and oscillation module able to programme output, said oscillation module able to programme is calibrated the target low frequency signal of its output to wherein said calibrating signal generation module according to said calibrating signal through relatively.
2. programmable oscillator according to claim 1; It is characterized in that: said calibrating signal generation module is counted with reference to high-frequency signal said in the one-period of said target low frequency signal, confirms said calibrating signal according to the difference of count value that counts to get and standard value.
3. programmable oscillator according to claim 1 is characterized in that: said oscillation module able to programme comprises resistance, electric capacity that discharges and recharges repeatedly that produces the reference peak threshold voltage and the electric current that said electric capacity is carried out charge or discharge,
Said resistance comprises the resistance unit of several series connection; In some or all resistance units each all with a switch in parallel; Control the conducting of each switch or end the resistance value of adjusting said resistance according to said calibrating signal, and then calibrate the target low frequency signal of said oscillation module output able to programme;
Said electric capacity comprises the capacitor cell that several are parallelly connected; In some or all capacitor cells each all connected with a switch; Control the conducting of each switch or end the capacitance of adjusting said electric capacity according to said calibrating signal, and then calibrate the target low frequency signal of said oscillation module output able to programme; Or
Adjust the size of said electric current according to said calibrating signal, and then calibrate the target low frequency signal of said oscillation module output able to programme.
4. programmable oscillator according to claim 3 is characterized in that: said oscillation module able to programme also comprises in comparison circuit and charge/discharge control circuit or the charging control circuit,
One end of said resistance forms said reference peak threshold voltage, and an end of electric capacity forms comparative voltage,
In that controlled said electric current is under the situation that said electric capacity is charged according to said calibrating signal; More said reference peak threshold voltage of said comparison circuit and said comparative voltage; And control said charge/discharge control circuit at said comparative voltage during more than or equal to said reference peak threshold voltage said electric capacity is discharged
In that controlled said electric current is under the situation that said electric capacity is discharged according to said calibrating signal; More said reference peak threshold voltage of said comparison circuit and said comparative voltage, and when said comparative voltage is less than or equal to said reference peak threshold voltage, control said charging control circuit said electric capacity is charged.
5. programmable oscillator according to claim 1; It is characterized in that: said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein each oscillating unit comprises the resistance that produces the reference peak threshold voltage, comparison circuit and the charge/discharge control circuit that produces electric capacity, first current source, more said reference peak threshold voltage and the said comparative voltage of a comparative voltage
The electric current that provides based on first current source of first oscillating unit charges to the electric capacity of first oscillating unit; The comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is during more than or equal to the reference peak threshold voltage in first oscillating unit; The charge/discharge control circuit of notifying the charge/discharge control circuit of first oscillating unit to begin to discharge with second oscillating unit stops discharge
The electric current that provides based on first current source of second oscillating unit charges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to the reference peak threshold voltage in second oscillating unit, and the charge/discharge control circuit of notifying the charge/discharge control circuit of second oscillating unit to begin to discharge with first oscillating unit stops discharge.
6. programmable oscillator according to claim 5 is characterized in that: said first oscillating unit and second oscillating unit are shared a logical circuit, and each oscillating unit also comprises second current source, and said logical circuit comprises first NOR gate and second NOR gate,
Comparison circuit in said first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and first inverter; Charge/discharge control circuit in first oscillating unit comprises NMOS pipe, a termination voltage of second current source in first oscillating unit wherein, the drain electrode of another termination the 3rd NMOS pipe; The resistance that is connected generation reference peak threshold voltage in first oscillating unit between the source electrode of said the 3rd NMOS pipe and the ground; One termination voltage of first current source in first oscillating unit, the drain electrode of another termination the 4th NMOS pipe is connected the electric capacity of generation comparative voltage in first oscillating unit between the source electrode of said the 4th NMOS pipe and the ground; The 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe; The one NMOS pipe is parallelly connected with said electric capacity, and the drain electrode of the 4th NMOS pipe connects the input of first inverter
Comparison circuit in said second oscillating unit comprises the 5th NMOS pipe, the 6th NMOS pipe and second inverter; Charge/discharge control circuit in second oscillating unit comprises the 2nd NMOS pipe; A termination voltage of second current source in second oscillating unit wherein, the drain electrode of another termination the 5th NMOS pipe is connected the resistance of generation reference peak threshold voltage in first oscillating unit between the source electrode of said the 5th NMOS pipe and the ground; One termination voltage of first current source in second oscillating unit; Is connected the electric capacity that produces comparative voltage in first oscillating unit between the drain electrode of another termination the 6th NMOS pipe, the source electrode of said the 6th NMOS pipe and ground, the 2nd NMOS manages parallelly connected with said electric capacity; The drain electrode of the 6th NMOS pipe connects the input of second inverter
The output of first inverter is connected with the first input end of first NOR gate; The grid of the one NMOS pipe is connected with second input of first NOR gate and the output of second NOR gate; The output of first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of second NOR gate, and the output of second inverter is connected with second input of second NOR gate.
7. programmable oscillator according to claim 1; It is characterized in that: said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein two oscillating units are shared a resistance that produces the reference peak threshold voltage; Each oscillating unit also comprises the comparison circuit and the charge/discharge control circuit of the electric capacity, first current source, more said reference peak threshold voltage and the said comparative voltage that produce a comparative voltage
The electric current that provides based on first current source of first oscillating unit charges to the electric capacity of first oscillating unit; The comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is during more than or equal to said reference peak threshold voltage; The charge/discharge control circuit of notifying the charge/discharge control circuit of first oscillating unit to begin to discharge with second oscillating unit stops discharge
The electric current that provides based on first current source of second oscillating unit charges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to said reference peak threshold voltage, and the charge/discharge control circuit of notifying the charge/discharge control circuit of second oscillating unit to begin to discharge with first oscillating unit stops discharge.
8. programmable oscillator according to claim 7 is characterized in that: said first oscillating unit and second oscillating unit are shared a logical circuit and second current source, and said logical circuit comprises first NOR gate and second NOR gate,
Comparison circuit in said first oscillating unit comprises the 3rd NMOS pipe, the 4th NMOS pipe and first inverter; Charge/discharge control circuit in first oscillating unit comprises NMOS pipe, a termination voltage of second current source wherein, the drain electrode of another termination the 3rd NMOS pipe; The resistance that is connected generation reference peak threshold voltage between the source electrode of said the 3rd NMOS pipe and the ground; One termination voltage of first current source in first oscillating unit, the drain electrode of another termination the 4th NMOS pipe is connected the electric capacity of generation comparative voltage in first oscillating unit between the source electrode of said the 4th NMOS pipe and the ground; The 3rd NMOS pipe is connected with the grid of the 4th NMOS pipe; The one NMOS pipe is parallelly connected with said electric capacity, and the drain electrode of the 4th NMOS pipe connects the input of first inverter
Comparison circuit in said second oscillating unit comprises the 3rd NMOS pipe, the 6th NMOS pipe and second inverter; Wherein comparison circuit in second oscillating unit and the comparison circuit in first oscillating unit are shared the 3rd NMOS pipe; Charge/discharge control circuit in second oscillating unit comprises the 2nd NMOS pipe; A termination voltage of first current source in second oscillating unit wherein, the drain electrode of another termination the 6th NMOS pipe is connected the electric capacity of generation comparative voltage in second oscillating unit between the source electrode of said the 6th NMOS pipe and the ground; Node between second current source and the 3rd NMOS manage in the grid of the 6th NMOS pipe and said first oscillating unit is connected; The 2nd NMOS pipe is parallelly connected with said electric capacity, and the drain electrode of the 6th NMOS pipe connects the input of second inverter
The output of first inverter is connected with the first input end of first NOR gate; The grid of the one NMOS pipe is connected with second input of first NOR gate and the output of second NOR gate; The output of first NOR gate is connected with the grid of the 2nd NMOS pipe and the first input end of second NOR gate, and the output of second inverter is connected with second input of second NOR gate.
9. programmable oscillator according to claim 1; It is characterized in that: said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein each oscillating unit comprises the resistance that produces the reference peak threshold voltage, comparison circuit and the charging control circuit that produces electric capacity, current source, more said reference peak threshold voltage and the said comparative voltage of a comparative voltage
The electric current that provides based on the current source of first oscillating unit discharges to the electric capacity of first oscillating unit; When the comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is less than or equal to the reference peak threshold voltage in first oscillating unit; The charging control circuit of notifying the charging control circuit of first oscillating unit to begin to charge with second oscillating unit stops charging
The electric current that provides based on the current source of second oscillating unit discharges to the electric capacity of second oscillating unit; When the comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit was less than or equal to the reference peak threshold voltage in second oscillating unit, the charging control circuit of notifying the charging control circuit of second oscillating unit to begin to charge with first oscillating unit stopped charging.
10. programmable oscillator according to claim 1; It is characterized in that: said oscillation module able to programme comprises first oscillating unit and second oscillating unit; Wherein two oscillating units are shared a resistance that produces the reference peak threshold voltage; Each oscillating unit also comprises the comparison circuit and the charging control circuit of the electric capacity, current source, more said reference peak threshold voltage and the said comparative voltage that produce a comparative voltage
The electric current that provides based on the current source of first oscillating unit discharges to the electric capacity of first oscillating unit; When the comparative voltage of the comparison circuit of first oscillating unit in first oscillating unit is less than or equal to said reference peak threshold voltage; The charging control circuit of notifying the charging control circuit of first oscillating unit to begin to charge with second oscillating unit stops charging
The electric current that provides based on the current source of second oscillating unit discharges to the electric capacity of second oscillating unit; The comparative voltage of the comparison circuit of second oscillating unit in second oscillating unit be during more than or equal to said reference peak threshold voltage, and the charging control circuit of notifying the charging control circuit of second oscillating unit to begin to charge with first oscillating unit stops charging.
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|---|---|---|---|
| CN2011203147673U CN202218192U (en) | 2011-08-26 | 2011-08-26 | Programmable oscillator |
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| Application Number | Priority Date | Filing Date | Title |
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| CN2011203147673U CN202218192U (en) | 2011-08-26 | 2011-08-26 | Programmable oscillator |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102386846A (en) * | 2011-08-26 | 2012-03-21 | 无锡中星微电子有限公司 | Programmable oscillator |
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2011
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102386846A (en) * | 2011-08-26 | 2012-03-21 | 无锡中星微电子有限公司 | Programmable oscillator |
| CN102386846B (en) * | 2011-08-26 | 2013-12-18 | 无锡中星微电子有限公司 | Programmable oscillator |
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