CN103475338A - High-precision low-voltage oscillator - Google Patents
High-precision low-voltage oscillator Download PDFInfo
- Publication number
- CN103475338A CN103475338A CN2013104429191A CN201310442919A CN103475338A CN 103475338 A CN103475338 A CN 103475338A CN 2013104429191 A CN2013104429191 A CN 2013104429191A CN 201310442919 A CN201310442919 A CN 201310442919A CN 103475338 A CN103475338 A CN 103475338A
- Authority
- CN
- China
- Prior art keywords
- transistor
- current source
- transistor seconds
- voltage
- control signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Inductance-Capacitance Distribution Constants And Capacitance-Resistance Oscillators (AREA)
- Logic Circuits (AREA)
Abstract
The invention provides a high-precision low-voltage oscillator. The high-precision low-voltage oscillator comprises a first current source, a capacitor, a first transistor, a control signal generation circuit and a discharging control circuit, wherein the first current source, the capacitor and the first transistor are connected in series in sequence, the first current source provides first currents to the capacitor for charging so that the charging voltage can be obtained, the control signal generation circuit comprises an inverter, a second current source, a second transistor and a resistor, the second current source, the second transistor and the resistor are connected in series in sequence, the second current source provides second currents to enable the second currents to flow through the second transistor and the resistor when the second transistor is turned on, then reference voltage is generated on a node between the source electrode of the second transistor and the resistor, the grid electrode of the second transistor is connected with a node between the first current source and the capacitor, a node between the second transistor and the second current source is connected with the input end of the inverter, the output end of the inverter outputs control signals, and the discharging control circuit is used for controlling discharging of the capacitor based on the control signals. Compared with the prior art, the high-precision low-voltage oscillator has the advantages that the minimum working voltage is low and the circuit structure is simple.
Description
[technical field]
The present invention relates to field of oscillators, particularly a kind of high precision low pressure oscillator.
[background technology]
Oscillator (oscillator) is a kind of energy conversion device, and it can be converted to direct current energy the AC energy with certain frequency, be in electronic circuit, be used for produce repeating electric signal (such as, sinusoidal wave, sawtooth waveforms or square wave etc.) electronic component.In the prior art, oscillator is widely used in the DC-DC Switching Power Supply, in the systems such as lithium battery protection circuit, lithium battery charging circuit, restorer.
Please refer to shown in Fig. 1 its circuit diagram that is a kind of oscillator of the prior art.Along with the reduction of input supply voltage VDD, this oscillator is because the input voltage restriction quits work.The minimum operating voltage that this oscillator needs is Max{V
gSN1+ V
gSN2+ V
dSP1, V
gSN1+ V
dSN2+ V
gSP2.Wherein, V
gSN1for NMOS(N-Channel Metal Oxide Semiconductor) gate source voltage of transistor MN1, at the CMOS(Complementary Metal Oxide Semiconductor of general 5V) in technique, generally be greater than 0.7V; V
gSN2for the gate source voltage of nmos pass transistor MN2, consider body bias effect (Body Effect), generally be greater than 0.8V; V
dSP1for PMOS(P-Channel Metal Oxide Semiconductor) drain-source voltage of transistor MP1, generally be greater than 0.1V; V
dSN2for the drain-source voltage of nmos pass transistor MN2, generally be greater than 0.1V; V
gSP2for the gate source voltage of PMOS transistor MP2, generally be greater than 0.8V.So the minimum operating voltage of this oscillator will be greater than 1.6V.If can further reduce the minimum operating voltage of oscillator, be obviously very favorable.
Therefore, be necessary to provide a kind of improved technical scheme to overcome the problems referred to above.
[summary of the invention]
The object of the present invention is to provide a kind of high precision low pressure oscillator, it has lower minimum operating voltage, and circuit structure is simple.
In order to address the above problem, the invention provides a kind of high precision low pressure oscillator, it comprises: successively the series connection the first current source, electric capacity and the first transistor, described the first current source provide the first electric current to described capacitor charging to obtain charging voltage, control signal produces circuit, it comprises inverter and second current source of connecting successively, transistor seconds and resistance, described the second current source provides the second electric current to make when described transistor seconds conducting described the second electric current flow through described transistor seconds and resistance, produce reference voltage with the source electrode at described transistor seconds and the node between resistance, the grid of described transistor seconds is connected with the node between described the first current source and electric capacity, node between described transistor seconds and the second current source is connected with the input of described inverter, the output output control signal of described inverter, charge/discharge control circuit carries out control of discharge based on described control signal to electric capacity.
Further, when the difference between described charging voltage and described reference voltage is less than the threshold voltage of described transistor seconds, described transistor seconds cut-off, the output of described inverter is exported invalid control signal; When the difference between described charging voltage and described reference voltage is greater than the threshold voltage of described transistor seconds, described transistor seconds conducting, the output of described inverter is exported effective control signal; Described control of discharge control circuit is discharged to described electric capacity when described control signal is effective, when described control signal is invalid, forbids described electric capacity is discharged.
Further, described the first transistor and described transistor seconds are nmos pass transistor, and the drain electrode of described the first transistor is connected with described electric capacity, and its grid is connected with drain electrode, its source ground; The source electrode of described transistor seconds is connected with an end of described resistance, the other end ground connection of resistance.
Further, described the first transistor and described transistor seconds are the PMOS transistor, and the drain electrode of described the first transistor is connected with described electric capacity, and its grid is connected with drain electrode, and its source electrode connects power supply; The source electrode of described transistor seconds is connected with an end of described resistance, another termination power of resistance.
Further, described charge/discharge control circuit comprises the 3rd transistor or the 3rd triode, the control signal receiving terminal that described the 3rd transistorized grid is described charge/discharge control circuit, described the 3rd transistorized source electrode is connected with the two ends of drain electrode respectively at described electric capacity.
Further, the substrate of described transistor seconds is connected with its source electrode.
Further, the threshold voltage of described the first transistor is identical with the threshold voltage of transistor seconds, and the width of two transistorized raceway grooves is also identical with length.
Further, the node between described the first current source and electric capacity is connected with the output of described oscillator.
Compared with prior art, the invention provides a kind of high precision low pressure oscillator, it has lower minimum operating voltage, and circuit structure is simple.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, in below describing embodiment, the accompanying drawing of required use is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.Wherein:
The circuit diagram that Fig. 1 is a kind of oscillator of the prior art;
The circuit diagram that Fig. 2 is the present invention's high precision low pressure oscillator in one embodiment;
The schematic diagram of the sawtooth waveforms RAMP that Fig. 3 is the oscillator output in Fig. 2 and corresponding CLK signal;
The circuit diagram that Fig. 4 is the present invention's high precision low pressure oscillator in another embodiment;
Fig. 5 adopts the circuit diagram of the transistorized high precision low pressure oscillator of PMOS in the present invention;
The schematic diagram of the sawtooth waveforms RAMP that Fig. 6 is the oscillator output in Fig. 5 and corresponding CLK signal.
[embodiment]
For above-mentioned purpose of the present invention, feature and advantage can be become apparent more, below in conjunction with the drawings and specific embodiments, the present invention is further detailed explanation.
Alleged " embodiment " or " embodiment " refers to special characteristic, structure or the characteristic that can be contained at least one implementation of the present invention herein.Different local in this manual " in one embodiment " that occur not all refer to same embodiment, neither be independent or the embodiment mutually exclusive with other embodiment optionally.Unless stated otherwise, the word that connection herein, the expression that is connected, joins are electrically connected all means directly or indirectly to be electrical connected.
Please refer to shown in Fig. 2, it is the circuit diagram of the present invention's high precision low pressure oscillator in one embodiment.Described oscillator comprises the first current source I1, capacitor C 1 and the first nmos pass transistor MN1 of series connection successively, and control signal produces circuit 210 and charge/discharge control circuit 220.
Described the first current source I1 of series connection successively, capacitor C 1 and the first nmos pass transistor MN1 are connected between power vd D and ground node, and wherein, the drain electrode of described the first nmos pass transistor MN1 is connected with an end of described capacitor C 1, its grid is connected with drain electrode, its source ground; Connected node VC between described the first current source I1 and capacitor C 1 is connected with the output RAMP of described oscillator; Described the first current source I1 provides the first electric current to charge to obtain the voltage that charging voltage VC(is node VC to described capacitor C 1).
Described control signal produces circuit 210 and comprises inverter INV1 and be series at successively the second current source I2 between power vd D and ground node, the second nmos pass transistor MN2 and resistance R 1, wherein, the source electrode of described the second nmos pass transistor MN2 is connected with an end of described resistance R 1, the other end ground connection of resistance R 1.Described the second current source I2 provides the second electric current to make when described the second nmos pass transistor MN2 conducting described the second electric current flow through described the second nmos pass transistor MN2 and resistance R 1, produce reference voltage VR with the node between the source electrode at described the second nmos pass transistor MN2 and resistance R 1, described reference voltage VR=I2.R1, the grid of described the second nmos pass transistor MN2 is connected with the node VC between described the first current source I1 and capacitor C 1, node A between described the second nmos pass transistor MN2 and the second current source I2 is connected with the input of described inverter INV1, the output output control signal CLK of described inverter INV1.
Described control signal produces circuit 210 and produces and export described control signal CLK based on described charging voltage VC.Be specially: during due to described the second nmos pass transistor MN2 conducting, can produce reference voltage VR=I2.R1 by the node between described the second nmos pass transistor MN2 and resistance R 1, therefore, when the difference between the source voltage (it equals described reference voltage VR=I2.R1) when the grid voltage (it equals described charging voltage VC) of described the 2nd MNOS transistor MN2 and its conducting is less than the threshold voltage of described the second nmos pass transistor MN2, described the second nmos pass transistor MN2 cut-off, node A output high level signal is given the input of described inverter INV1, the control signal CLK of the output output of described inverter INV1 is low level (being invalid control signal), when the difference between described charging voltage VC and described reference voltage VR is greater than the threshold voltage of described the second nmos pass transistor MN2, described the second nmos pass transistor MN2 conducting, node A output low level signal is given the input of described inverter INV1, and the control signal CLK of the output output of described inverter INV2 is high level (being effective control signal).
Described charge/discharge control circuit 220 carries out control of discharge based on described control signal CLK to capacitor C 1.Described charge/discharge control circuit 220 is discharged to described capacitor C 1 when described control signal CLK is effective, when described control signal CLK is invalid, forbids capacitor C 1 is discharged.In the embodiment shown in Figure 2, described charge/discharge control circuit 220 comprises the 3rd nmos pass transistor MN3, the control signal receiving terminal that the grid of described the 3rd nmos pass transistor MN3 is described charge/discharge control circuit 220, the source electrode of described the 3rd nmos pass transistor MN3 and drain electrode are connected to the two ends of described capacitor C 1, the substrate ground connection of described the 3rd nmos pass transistor MN3.Described the 3rd nmos pass transistor MN3 also can replace with other equivalent electrons switching devices, such as, NPN(Negative-Positive-Negative) triode.
Below elaborate the course of work of the high precision low pressure oscillator shown in Fig. 2.
In the embodiment shown in Figure 2, the threshold voltage that described the first nmos pass transistor MN1 is set is identical with the second nmos pass transistor MN2 threshold voltage, and the width of both raceway grooves and length also identical.
During initial condition, the voltage difference at described the first capacitor C 1 two ends is zero, because the voltage (it equals the voltage of node VC) of described capacitor C 1 equals the gate source voltage V of the first nmos pass transistor MN1
gSN1, and the voltage of capacitor C 1 equals the voltage of output RAMP, and therefore, during initial condition, the voltage of output RAMP also equals V
gSN1.Again because the difference between described charging voltage VC and described reference voltage VR now (being the difference of the source voltage of described the 2nd NMOS crystal while hanging the grid voltage of MN2 and its conducting) equals V
gSN1-I2.R1, it is less than the threshold voltage of the second nmos pass transistor MN2, therefore, described the second nmos pass transistor MN2 cut-off, described the first current source I1 is charged to capacitor C 1, and node A output high level signal gives the input of described inverter INV1, and the control signal CLK of the output output of described inverter INV1 is low level, described CLK signal is transferred to the grid of described the 3rd nmos pass transistor MN3, makes the 3rd nmos pass transistor MN3 cut-off.That is to say, initial condition, the voltage of described the first capacitor C 1 equals the gate source voltage V of the first nmos pass transistor MN1
gSN1, the 3rd transistor MN3 cut-off, the first current source I1 starts capacitor C 1 charging.
According to formula, Q=CV is known, in the situation that electric capacity is certain, charge volume is directly proportional to voltage, and wherein Q is charge capacity, the capacitance that C is electric capacity, the voltage that V is the electric capacity two ends.That is to say, from initial condition, along with 1 pair of the first capacitor C 1 of the first electric current I is charged gradually, output RAMP current potential raises gradually, until described charging voltage VC(is the voltage of output RAMP) and described reference voltage VR between difference be less than or equal to the threshold voltage of the second nmos pass transistor MN2, the voltage of described output RAMP surpasses V
gSN1during+I2.R1, described bi-NMOS transistor MN2 conducting, node A is low level by the high level upset, the control signal CLK of the output output of described inverter INV1 is high level, described CLK signal is transferred to the grid of described the 3rd nmos pass transistor MN3, make the 3rd nmos pass transistor MN3 conducting, by described the 3rd transistor MN3, described the first capacitor C 1 is discharged rapidly.
Because metal-oxide-semiconductor is very fast to capacitor discharge speed, therefore, be far smaller than the charging interval discharge time of the first capacitor C 1, when electric discharge finishes, the voltage difference at described the first capacitor C 1 two ends is zero, the voltage of capacitor C 1 is discharged to V
gSN1.When the voltage of described the first capacitor C 1 is discharged to V
gSN1the time, as mentioned above, the 3rd transistor MN3 cut-off, the first current source I1 is again to capacitor C 1 charging ... go round and begin again, the first capacitor C 1 repeatedly is recharged and discharges, and causes the voltage of the output RAMP of this oscillator to raise gradually and reduces rapidly, and then form the waveform of sawtooth waveforms at the RAMP end.
Please refer to shown in Fig. 3 the schematic diagram of the CLK signal of its sawtooth waveforms RAMP that is the oscillator output in Fig. 2 and correspondence.This figure abscissa means the time, and ordinate means voltage, wherein, and the charging interval that the ascent stage of sawtooth waveforms RAMP is the first capacitor C 1, the discharge time that the decline stage is the first capacitor C 1.And the peak value of easily being learnt described sawtooth waveforms RAMP by above-mentioned analysis is | V
gSN1|+I2.R1, peak valley is | V
gSN1|.
In sum, the oscillator shown in Fig. 2 also can realize exporting sawtooth waveforms RAMP signal.But its minimum operating voltage needed is V
gSN1+ I1.R1+V
dS_I1, V wherein
dS_I1be the voltage drop of the first current source I1, be generally a source-drain voltage in saturation region PMOS pipe, can design V
dS_I1for 0.1V, V
gSN1be the gate source voltage of the first nmos pass transistor MN1, in the CMOS technique for general 5V, V
gSN1 is 0.7V,, if design I1.R1=0.1V, the minimum working power voltage of the oscillator shown in Fig. 2 is 0.7V+0.1V+0.1V=0.9V.Minimum working power voltage 1.6V than the oscillator of prior art in Fig. 1 is much lower.In addition, the oscillator shown in this Fig. 2 is simpler than the circuit structure of the oscillator of the prior art shown in Fig. 1, and its chip area taken is less, thereby reduces chip cost.
It should be noted that, the current value of the first current source I1 becomes predetermined ratio with the current value of the second current source I2, the current value I 1 that can design the first current source equals the current value I 2 of the second current source, and the current value I 1 that also can design the first current source equals N.I2, and N is natural number.For the impact on the first current source I1 and the second current source I2 of charging interval of reducing capacitor C 1, can take matching technique commonly used in integrated circuit to the first current source I1 and the second current source I2, like this, the ratio of the current value of the current value of described the first current source I1 and the second current source I2 can be designed as one and is not subject to temperature, the constant of supply voltage and process variations influence, thereby precision cycle of oscillation of raising oscillator.
In order to improve precision cycle of oscillation of the oscillator shown in Fig. 2, can also improve as follows.Please refer to shown in Fig. 4, it is the circuit diagram of the present invention's high precision low pressure oscillator in another embodiment.The difference of the oscillator shown in itself and Fig. 2 is, is to be connected with its source electrode by the lining structural reform of described the second nmos pass transistor MN2.Can eliminate like this impact of body bias effect on the second nmos pass transistor MN2 threshold voltage, make the gate source voltage V of the second nmos pass transistor MN2
gSN2gate source voltage V with the first nmos pass transistor MN1
gSN1more the coupling, thereby make non-ideal factor on oscillator cycle of oscillation precision impact less.
Please refer to shown in Fig. 5, it is for adopting the circuit diagram of the transistorized high precision low pressure oscillator of PMOS in the present invention; Please refer to shown in Fig. 6 the schematic diagram of the CLK signal of its sawtooth waveforms RAMP that is the oscillator output in Fig. 5 and correspondence.Because its flesh and blood is identical with the oscillator of above-mentioned employing nmos pass transistor, therefore, be not repeated introduction.
In the present invention, " connection ", be connected, word that the expressions such as " company ", " connecing " are electrical connected, if no special instructions, mean direct or indirect electric connection.
It is pointed out that being familiar with any change that the person skilled in art does the specific embodiment of the present invention does not all break away from the scope of claims of the present invention.Correspondingly, the scope of claim of the present invention also is not limited only to previous embodiment.
Claims (8)
1. a high precision low pressure oscillator, is characterized in that, it comprises:
Successively the series connection the first current source, electric capacity and the first transistor, described the first current source provide the first electric current to described capacitor charging to obtain charging voltage;
Control signal produces circuit, it comprises inverter and second current source of connecting successively, transistor seconds and resistance, described the second current source provides the second electric current to make when described transistor seconds conducting described the second electric current flow through described transistor seconds and resistance, produce reference voltage with the source electrode at described transistor seconds and the node between resistance, the grid of described transistor seconds is connected with the node between described the first current source and electric capacity, node between described transistor seconds and the second current source is connected with the input of described inverter, the output output control signal of described inverter,
Charge/discharge control circuit carries out control of discharge based on described control signal to electric capacity.
2. high precision low pressure oscillator according to claim 1, is characterized in that,
When the difference between described charging voltage and described reference voltage is less than the threshold voltage of described transistor seconds, described transistor seconds cut-off, the output of described inverter is exported invalid control signal; When the difference between described charging voltage and described reference voltage is greater than the threshold voltage of described transistor seconds, described transistor seconds conducting, the output of described inverter is exported effective control signal;
Described control of discharge control circuit is discharged to described electric capacity when described control signal is effective, when described control signal is invalid, forbids described electric capacity is discharged.
3. high precision low pressure oscillator according to claim 2, is characterized in that,
Described the first transistor and described transistor seconds are nmos pass transistor,
The drain electrode of described the first transistor is connected with described electric capacity, and its grid is connected with drain electrode, its source ground;
The source electrode of described transistor seconds is connected with an end of described resistance, the other end ground connection of resistance.
4. high precision low pressure oscillator according to claim 2, is characterized in that,
Described the first transistor and described transistor seconds are the PMOS transistor,
The drain electrode of described the first transistor is connected with described electric capacity, and its grid is connected with drain electrode, and its source electrode connects power supply;
The source electrode of described transistor seconds is connected with an end of described resistance, another termination power of resistance.
5. according to claim 3 or 4 described high precision low pressure oscillators, it is characterized in that,
Described charge/discharge control circuit comprises the 3rd transistor or the 3rd triode,
The control signal receiving terminal that described the 3rd transistorized grid is described charge/discharge control circuit, described the 3rd transistorized source electrode is connected with the two ends of drain electrode respectively at described electric capacity.
6. high precision low pressure oscillator according to claim 5, is characterized in that, the substrate of described transistor seconds is connected with its source electrode.
7. high precision low pressure oscillator according to claim 6, is characterized in that, the threshold voltage of described the first transistor is identical with the threshold voltage of transistor seconds, and the width of two transistorized raceway grooves is also identical with length.
8. high precision low pressure oscillator according to claim 1, is characterized in that, the node between described the first current source and electric capacity is connected with the output of described oscillator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310442919.1A CN103475338B (en) | 2013-09-25 | 2013-09-25 | A kind of High-precision low-voltage oscillator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201310442919.1A CN103475338B (en) | 2013-09-25 | 2013-09-25 | A kind of High-precision low-voltage oscillator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103475338A true CN103475338A (en) | 2013-12-25 |
| CN103475338B CN103475338B (en) | 2016-06-15 |
Family
ID=49800067
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201310442919.1A Active CN103475338B (en) | 2013-09-25 | 2013-09-25 | A kind of High-precision low-voltage oscillator |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN103475338B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103746347A (en) * | 2014-01-28 | 2014-04-23 | 无锡中星微电子有限公司 | Battery protection chip and battery system |
| CN104993701A (en) * | 2015-07-22 | 2015-10-21 | 无锡中星微电子有限公司 | PWM/PFM control circuit |
| CN109474260A (en) * | 2019-01-11 | 2019-03-15 | 成都信息工程大学 | A kind of adjustable oscillator of number |
| CN114448386A (en) * | 2022-02-09 | 2022-05-06 | 无锡市晶源微电子有限公司 | Time delay device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999026334A1 (en) * | 1997-11-14 | 1999-05-27 | Seiko Epson Corporation | Low-voltage oscillation amplifier circuit and portable electronic device comprising the same |
| CN102088278A (en) * | 2010-11-17 | 2011-06-08 | 无锡中星微电子有限公司 | Oscillator |
| CN102790601A (en) * | 2012-08-08 | 2012-11-21 | 电子科技大学 | RC (resistance-capacitance) oscillator |
-
2013
- 2013-09-25 CN CN201310442919.1A patent/CN103475338B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1999026334A1 (en) * | 1997-11-14 | 1999-05-27 | Seiko Epson Corporation | Low-voltage oscillation amplifier circuit and portable electronic device comprising the same |
| CN102088278A (en) * | 2010-11-17 | 2011-06-08 | 无锡中星微电子有限公司 | Oscillator |
| CN102790601A (en) * | 2012-08-08 | 2012-11-21 | 电子科技大学 | RC (resistance-capacitance) oscillator |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103746347A (en) * | 2014-01-28 | 2014-04-23 | 无锡中星微电子有限公司 | Battery protection chip and battery system |
| CN103746347B (en) * | 2014-01-28 | 2016-09-28 | 无锡中感微电子股份有限公司 | Battery protection chip and battery system |
| CN104993701A (en) * | 2015-07-22 | 2015-10-21 | 无锡中星微电子有限公司 | PWM/PFM control circuit |
| CN104993701B (en) * | 2015-07-22 | 2017-05-24 | 无锡中感微电子股份有限公司 | PWM/PFM control circuit |
| CN109474260A (en) * | 2019-01-11 | 2019-03-15 | 成都信息工程大学 | A kind of adjustable oscillator of number |
| CN109474260B (en) * | 2019-01-11 | 2024-05-24 | 成都信息工程大学 | Digital adjustable oscillator |
| CN114448386A (en) * | 2022-02-09 | 2022-05-06 | 无锡市晶源微电子有限公司 | Time delay device |
| CN114448386B (en) * | 2022-02-09 | 2023-03-24 | 无锡市晶源微电子股份有限公司 | Time delay device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN103475338B (en) | 2016-06-15 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108390556B (en) | Charge pump circuit | |
| CN102088278B (en) | Oscillator | |
| CN109039059B (en) | A kind of efficient multi-mode charge pump | |
| CN102394608B (en) | Oscillator circuit | |
| CN103716023A (en) | Power-on reset circuit with ultra-low power consumption | |
| CN104113211B (en) | Low-power-dissipation hysteresis voltage detection circuit applied to energy acquisition system | |
| CN102130666A (en) | Duty ratio regulation circuit and method | |
| CN103490726A (en) | Low-voltage oscillator | |
| CN103633974A (en) | Power-on reset circuit with fixed resistance-capacitance time delay characteristic | |
| CN103475338B (en) | A kind of High-precision low-voltage oscillator | |
| CN106655757A (en) | Capacitor charge pump | |
| CN106100293A (en) | It is applied to current detection circuit and the piezoelectric rectifier of piezoelectric rectifier | |
| CN108055024B (en) | Compact delay circuit | |
| CN105099184A (en) | Light-load switching power supply chip | |
| CN102594299B (en) | Square-wave generator circuit | |
| CN203813657U (en) | Power supply self-adaptive charge pump device | |
| CN112583355B (en) | High-precision relaxation oscillator | |
| CN103532521B (en) | Modified low voltage oscillator | |
| CN103973227A (en) | Low-voltage oscillator | |
| CN203491975U (en) | Low-voltage oscillator | |
| CN201854256U (en) | Oscillator | |
| CN203522645U (en) | Improved low-voltage oscillator | |
| CN104113331A (en) | Novel annular oscillator for electronic tags | |
| CN203883674U (en) | Light-load switching power supply chip | |
| CN103825555B (en) | A kind of oscillating circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| CB02 | Change of applicant information |
Address after: 214028 Jiangsu Province, Wuxi City District Qingyuan Road No. 18 Taihu International Science Park sensor network university science and Technology Park 530 building A1001 Applicant after: WUXI ZHONGGAN MICROELECTRONIC CO., LTD. Address before: A 530 Taihu international science and Technology Park building 214028 Qingyuan Road in Jiangsu province Wuxi City District 10 layer Applicant before: Wuxi Vimicro Co., Ltd. |
|
| COR | Change of bibliographic data | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant |