CN102064827A - Rubidium oscillator-based standard frequency and time adjusting method - Google Patents

Rubidium oscillator-based standard frequency and time adjusting method Download PDF

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CN102064827A
CN102064827A CN2010105435228A CN201010543522A CN102064827A CN 102064827 A CN102064827 A CN 102064827A CN 2010105435228 A CN2010105435228 A CN 2010105435228A CN 201010543522 A CN201010543522 A CN 201010543522A CN 102064827 A CN102064827 A CN 102064827A
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frequency
signal
time
rubidium
fpga
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CN102064827B (en
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黄杰
焦群
何迎利
冯宝英
陈军
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State Grid Corp of China SGCC
Nari Technology Co Ltd
State Grid Electric Power Research Institute
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Nanjing NARI Group Corp
State Grid Electric Power Research Institute
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/26Automatic control of frequency or phase; Synchronisation using energy levels of molecules, atoms, or subatomic particles as a frequency reference

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Abstract

The invention discloses a rubidium oscillator-based standard frequency and time adjusting method. After a rubidium atomic oscillator is selected as a reference frequency source, a field programmable gate array (FPGA) performs frequency doubling and frequency division operations on the reference frequency source to obtain a locally generated second pulse signal. The FPGA performs phase difference measurement operation on the intrinsic second signal by using an external input second pulse signal as a reference. The measured phase difference value is endowed to an internal specified register of the FPGA and transmitted to an advanced RISC machine (ARM) through a data bus. The RAM calculates the variation value of the phase difference of the intrinsic second signal and the external input second signal along the time, and calculates the frequency difference of the rubidium atomic oscillator and the external standard frequency according to the difference value. The frequency difference value calculated by the ARM is fed back to the FPGA through the data bus. The FPGA performs frequency modulation operation on the rubidium atomic oscillator according to the received frequency difference value so that the output frequency source of the rubidium atomic oscillator is synchronized to the superior time frequency reference. The method has the advantage of providing high-performance, high-stability and high-precision time signals.

Description

Standard frequency and time adjusting method based on rubidium oscillator
Technical field
The present invention relates to the high accuracy frequency of technical fields such as synchronous communication in the electric power system, synchronous phasor measurement, travelling wave ranging, wide area dynamic monitoring and analysis, stabilization of power grids control, failure wave-recording and the building technology of time source.
Background technology
At present, high performance standard frequency source mainly sample caesium atomic oscillator and rubidium atomic oscillator, caesium atomic oscillator best performance wherein, but price is high and be difficult to buying, and the rubidium atomic oscillator performance is lower than the caesium atomic oscillator.This product is by designing appropriate algorithm, adopting effectively applicable technology, makes its demand to high-precision frequency and time source at electric power system (accuracy height, long-time stability height, long term drift are little), obtains the performance near the caesium atomic oscillator.Algorithm and technology that this product relates to comprise: the comprehensive selection technology of mulitple frequency source, the generation algorithm of the taming algorithm of high accuracy rubidium atomic clock, the reception technique of UTC time, split-second precision signal, the adjustment algorithm, the big saltus step treatment technology of second signal phase etc. of clock phase place second voluntarily.
Summary of the invention
Goal of the invention
The objective of the invention is to, high-precision rubidium atomic oscillator and high accuracy frequency measurement technology and time simultaneous techniques are organically combined, the frequency signal that makes rubidium atomic oscillator output and time signal be taming simultaneously to be synchronized with more high-grade temporal frequency benchmark (the Chinese UTC(NTSC of national time service central service), autonomous time centre time of electrical network, big-dipper satellite time, gps satellite time etc.), improve the long-time stability and the accuracy of frequency and time signal, reduce drift.
Technical scheme
The frequency standard that power industry is general is 10MHz and 2.048MHz frequency signal, and electric power rubidium clock equipment receives the frequency standard from higher level's time centre by the frequency input port.
Frequency selects module when the foreign frequency input is arranged, and preferentially uses external frequency source, and the frequency time signal that electric power rubidium clock equipment is exported is direct and higher level's time centre is synchronous.
When the foreign frequency input was interrupted, electric power rubidium clock equipment relied on the rubidium atomic oscillator of self, continued the stable frequency signal of output.
After rubidium atomic oscillator was chosen as reference frequency source, FPGA carried out frequency multiplication and frequency division work to reference frequency source, obtained the local pps pulse per second signal that produces.FPGA as benchmark, carries out phase difference measurements computing to intrinsic signal second with the pps pulse per second signal of outside input.
The phase difference that records is given FPAG the register of inner appointment by assignment, by data/address bus, sends ARM to.ARM calculates the value over time that differs of intrinsic signal second and outside input second signal, calculates the frequency difference of rubidium atomic oscillator and external perimysium reference frequency according to difference.
The frequency difference value that ARM calculates feeds back to FPGA by data/address bus.FPGA carries out the frequency modulation operation according to the frequency difference value received to rubidium atomic oscillator, the output frequency of rubidium atomic oscillator is traced to the source be synchronized to higher level's temporal frequency benchmark.
Through the pps pulse per second signal of the rubidium atomic clock outputting standard behind the frequency modulation, wherein one road pps pulse per second signal is given the outside satellite comparison equipment or the equipment of tracing to the source, and calculates time difference message value.FPGA resolves time difference message and obtains the phase difference value that will adjust, and an output second signal is carried out the phase modulation operation, and the Phase synchronization that makes intrinsic signal second is in the standard second signal.Intrinsic signal second behind the frequency modulation phase modulation is used to drive this locality clock module voluntarily, produces the standard time message.
The time message of outside input be used for to this locality voluntarily clock carry out to the time operation, make the time message of output be synchronized with higher level's time standard.The time value of clock generation is composed to ARM voluntarily, and ARM control panel display screen shows the value of output time message.
Beneficial effect
Beneficial effect of the present invention is to take the preferential principle of selecting to be imported, come from by the outside higher level temporal frequency reference signal, frequency and time standard after the distribution of time service network layer is through polynary comparison (outside input source and the comparison of inner rubidium atomic oscillator) are for electric power networks provides high-performance, high stable and high precision time signal.
Description of drawings
Fig. 1 is an electric power rubidium clock design;
Fig. 2 is a second signal phasing technique;
Fig. 3 is the generation of time message;
Fig. 4 is two rubidium clock time centre stations execution modes.
Embodiment
The design of electric power rubidium clock as shown in Figure 1, according to the actual requirements, its major function that need realize is as follows:
The input interface of multiple high-precision frequency source is provided, inserts the external perimysium reference time source, follow the tracks of split-second precision;
The frequency selected cell, electric power rubidium clock total outside 10MHz, 2.048MHz and three frequency sources of inner rubidium atomic clock 10MHz are preferentially selected external frequency source;
Frequency modulation unit is according to the frequency stability characteristics of rubidium atomic oscillator self, with the more high-grade time reference resonance of local frequency with outside input;
Time difference message receiving element receives the phase difference that comes from comparison equipment, adjusts phase place in real time, makes output synchronous with standard second second;
The phase measurement unit, differing between the second of the time reference of measurement intrinsic second and outside input;
The phase modulation unit receives the phase place adjustment that comes from time difference message, webmaster and synchronous button;
The big saltus step processing unit of signal phase second is to carrying out smoothing processing by various second phase hits that cause unusually;
The panel button unit provides the manual trigger mechanism synchronous with external time reference;
Provide standard time message and second signal input interface, synchronously the external perimysium reference time signal;
The converting unit of Coordinated Universal Time(UTC) UTC time to Beijing time is finished the time adjusting function of different time zone;
The time signal output unit, output pin-point accuracy, high stable.The time signal of no saltus step;
The management information serial interface unit, system provides communication interface for united net management.
The frequency standard that power industry is general is 10MHz and 2.048MHz frequency signal, and electric power rubidium clock equipment receives the frequency standard from higher level's time centre by the frequency input port.Frequency selects module when the foreign frequency input is arranged, and preferentially uses external frequency source, and the frequency time signal that electric power rubidium clock equipment is exported is direct and higher level's time centre is synchronous.When the foreign frequency input was interrupted, electric power rubidium clock equipment relied on the rubidium atomic oscillator of self, continued the stable frequency signal of output.After rubidium atomic oscillator was chosen as reference frequency source, FPGA carried out frequency multiplication and frequency division work to reference frequency source, obtained the local pps pulse per second signal that produces.FPGA as benchmark, carries out phase difference measurements computing to intrinsic signal second with the pps pulse per second signal of outside input.The phase difference that records is given FPAG the register of inner appointment by assignment, by data/address bus, sends ARM to.ARM calculates the value over time that differs of intrinsic signal second and outside input second signal, calculates the frequency difference of rubidium atomic oscillator and external perimysium reference frequency according to difference.The frequency difference value that ARM calculates feeds back to FPGA by data/address bus.FPGA carries out the frequency modulation operation according to the frequency difference value received to rubidium atomic oscillator, the output frequency of rubidium atomic oscillator is traced to the source be synchronized to higher level's temporal frequency benchmark.Through the pps pulse per second signal of the rubidium atomic clock outputting standard behind the frequency modulation, wherein one road pps pulse per second signal is given the outside satellite comparison equipment or the equipment of tracing to the source, and calculates time difference message value.FPGA resolves time difference message and obtains the phase difference value that will adjust, and an output second signal is carried out the phase modulation operation, and the Phase synchronization that makes intrinsic signal second is in the standard second signal.Intrinsic signal second behind the frequency modulation phase modulation is used to drive this locality clock module voluntarily, produces the standard time message.The time message of outside input be used for to this locality voluntarily clock carry out to the time operation, make the time message of output be synchronized with higher level's time standard.The time value of clock generation is composed to ARM voluntarily, and ARM control panel display screen shows the value of output time message.
At the function that electric power rubidium clock equipment will be realized, the summary of the invention of electric power rubidium clock mainly is summed up as:
With the height of priority, the selective system frequency source;
To the accurate measurement of rubidium atomic clock frequency, rubidium atomic clock is carried out frequency modulation, its frequency is tamed be synchronized with on the more high-grade time reference;
Generate clock (second signal and time message) voluntarily based on frequency source;
The reception of time difference message, time message;
According to time difference message value, webmaster value an output second phase place is adjusted;
The big phase hit of signal phase modulation second is handled;
By the manual setting of webmaster to frequency source, time data and phase parameter;
For whole time centre station provides standard 10MHz frequency, standard second signal and standard time message.
The functional module of system comprises that frequency selects module, phase modulation module, clock module, frequency modulation module, processor interface module, alarm and quantity of state acquisition module, panel display design module and webmaster design module voluntarily.The circuit of system mainly is made up of time signal drive circuit, frequency frequency multiplier, rubidium atomic clock, battery unit, field programmable gate array and microprocessor.
Each functions of modules is as follows:
Frequency is selected module: select one tunnel work clock as system from outside input 10MHz frequency source or rubidium atomic clock 10MHz frequency source.The back acquiescence that powers on is outside preferential, if no outside then selects local rubidium oscillator as frequency source, can select frequency source by webmastering software;
Phase modulation module: resolve the time difference message come from satellite comparison equipment and obtain the phase difference value that to adjust, an output second signal is carried out phase modulation; Support the webmaster program that the phase modulation value manually is set, an output second phase place is carried out phase modulation; Support or manual outside synchronously input signal second of direct button; In the phase modulation algorithm phase modulation value is limited, to carrying out smoothing processing by the various second phase hits that cause unusually, when the phase modulation value surpasses critical value, the upper limit of getting the phase modulation value to second signal carry out phase modulation, prevent the generation of the big saltus step of phase place that causes owing to abnormal conditions.Fig. 2 sees Appendix.
Clock module voluntarily: intrinsic signal second that produces according to system clock is the clock of operation automatically, can the outside synchronously time message of importing, perhaps time data directly is set by webmaster; System is the external output time message of benchmark with clock time data voluntarily.Figure three sees Appendix.
Frequency modulation module: when clock signal of system is provided by rubidium atomic oscillator, with an outside input second signal is benchmark, measured local second and the periodic inequality of outside input reference between second,, calculate the frequency modulation value rubidium atomic oscillator frequency modulation according to frequency modulation algorithm based on rubidium atomic oscillator stability curve;
Processor interface module: be responsible for Data transmission between FPGA and the ARM, these data comprise: the state parameter of frequency modulation value, time data, phase modulation value, network management configuration;
Alarm and quantity of state acquisition module: this module is mainly gathered the quantity of state parameter of various input terminals, rubidium atomic clock, power supply, battery and is given webmaster;
Panel display design module: come the display device temporal information by LCD display.The equipment time is operated the synchronous outside input reference time by panel button.
The webmaster design module: the function of webmaster part comprises: Long-distance Control, status monitoring two parts.Status monitoring comprises: various outside terminal collection capacities, power-supply battery alarm amount, rubidium atomic clock state, current frequency modulation value and current frequency source etc.Long-distance Control comprises: settings of time newspaper, phase place adjustment, frequency adjustment, frequency source selection are provided with etc.
Rubidium atomic clock frequency modulation algorithm
Operations such as the rubidium atomic clock that the electric power rubidium clock adopts can reset by serial ports, frequency modulation.When not having the foreign frequency input, system clock is provided by rubidium atomic clock, and this moment, circuit control unit can send reset command by webmaster, and the rubidium atomic clock output frequency is locked in about 10MHz.Importing a second signal with the outside that comes from the gps satellite cesium-beam atomic clock is benchmark, the rubidium atomic clock output frequency is carried out frequency measurement calculate, and the utilization least square method calculates the frequency difference value.The frequency modulation algorithm is according to the frequency difference value that obtains, and the frequency stability curve in conjunction with rubidium atomic oscillator calculates the frequency modulation value.The frequency modulation algorithm carries out filter operation to frequcny modulation data, casts out the big frequcny modulation data that causes owing to unusually.Frequency modulation value according to the frequency modulation algorithm obtains sends the frequency modulation order, and rubidium atomic clock is carried out frequency modulation, and the output frequency that can realize rubidium atomic oscillator is traced to the source and is synchronized on the frequency time standard signal of higher level, finally exports stable 10MHz frequency signal.
The frequency modulation order is as follows:
(1) FPGA with the form of ASICII character, sends reset command ' RST ' according to the RS232 serial communication protocol, with " carriage return " bond bundle, can realize resetting;
(2) can realize frequency modulation function by sending FRExxxxxxxx order+carriage return; Xxxxxxxx highest order is-symbol position wherein: ' 0 ' increases, and ' 1 ' reduces.The back 7 bit data be decimal system frequency modulation value X, unit be millihertz now.Its computing formula is:
Figure 815301DEST_PATH_IMAGE001
Wherein,
Figure 147187DEST_PATH_IMAGE002
Expression frequency difference value.
Rubidium atomic clock sees Table one accepting the frequency modulation order needed stabilization time.
Tuning range (Hz) Time (s) (reference value)
X*10 -7 X*5
X*10 -8 X*0.5
X*10 -9 X*0.05
Table one, rubidium atomic clock frequency modulation tracking time
Among the present invention, by the classification of multiple time source is selected to handle, make full use of the frequency stability of rubidium atomic oscillator self excellence, tame and to be synchronized to more high-grade temporal frequency benchmark (the Chinese UTC(NTSC of national time service central service), autonomous time centre time of electrical network, big-dipper satellite time, gps satellite time etc.), for whole time system main website provides stable frequency (10MHz) benchmark, second phase reference and time newspaper benchmark.
In view of the growth requirement of intelligent grid, the electric power rubidium clock adopts the design of two rubidium clock central stations as the execution mode at time centre station as shown in Figure 4 usually: configuration two cover electric power rubidium clocks are as frequency reference, active and standby frequency division clock and distribute multiplying arrangement.Electric power rubidium clock equipment after the frequency calibration can be used as the highest frequency standard at time centre station, the time service network and equipment composition electrical network timing systems such as PTP master clock, clock expanding unit formed by transmission mediums such as optical fiber, Ethernets.Two rubidium clock equipment backup each other, and have improved the reliability at time centre station, and the transition that also can break away from this way GPS relies on.

Claims (2)

1. based on the standard frequency and the time adjusting method of rubidium oscillator, it is characterized in that, may further comprise the steps:
Frequency selects module when the foreign frequency input is arranged, and preferentially uses external frequency source, and the frequency time signal that electric power rubidium clock equipment is exported is direct and higher level's time centre is synchronous;
When the foreign frequency input was interrupted, electric power rubidium clock equipment relied on the rubidium atomic oscillator of self, continued the stable frequency signal of output;
After rubidium atomic oscillator was chosen as reference frequency source, FPGA carried out frequency multiplication and frequency division work to reference frequency source, obtained the local pps pulse per second signal that produces; FPGA as benchmark, carries out phase difference measurements computing to intrinsic signal second with the pps pulse per second signal of outside input;
The phase difference that records is given FPAG the register of inner appointment by assignment, by data/address bus, sends ARM to; ARM calculates the value over time that differs of intrinsic signal second and outside input second signal, calculates the frequency difference of rubidium atomic oscillator and external perimysium reference frequency according to difference;
The frequency difference value that ARM calculates feeds back to FPGA by data/address bus; FPGA carries out the frequency modulation operation according to the frequency difference value received to rubidium atomic oscillator, the output frequency of rubidium atomic oscillator is traced to the source be synchronized to higher level's temporal frequency benchmark;
Through the pps pulse per second signal of the rubidium atomic clock outputting standard behind the frequency modulation, wherein one road pps pulse per second signal is given the outside satellite comparison equipment or the equipment of tracing to the source, and calculates time difference message value; FPGA resolves time difference message and obtains the phase difference value that will adjust, and an output second signal is carried out the phase modulation operation, and the Phase synchronization that makes intrinsic signal second is in the standard second signal; Intrinsic signal second behind the frequency modulation phase modulation is used to drive this locality clock module voluntarily, produces the standard time message.
2. standard frequency and time adjusting method based on rubidium oscillator according to claim 1 is characterized in that, described FPGA carries out the frequency modulation operating procedure according to the frequency difference value of receiving to rubidium atomic oscillator, calculate frequency modulation value X according to following formula:
X=
Figure 134820DEST_PATH_IMAGE001
Wherein,
Figure 801424DEST_PATH_IMAGE002
Expression frequency difference value.
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BR112013011079-1A BR112013011079B1 (en) 2010-11-11 2011-11-09 STANDARD FREQUENCY AND TIME-BASED ADJUSTMENT METHOD ON THE RUBY OSCILLATOR
PCT/CN2011/081992 WO2012062207A1 (en) 2010-11-11 2011-11-09 Standard frequency and time adjusting method based on rubidium oscillator

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