CN102054787B - 堆栈式封装结构及其制造方法 - Google Patents

堆栈式封装结构及其制造方法 Download PDF

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CN102054787B
CN102054787B CN2010105280212A CN201010528021A CN102054787B CN 102054787 B CN102054787 B CN 102054787B CN 2010105280212 A CN2010105280212 A CN 2010105280212A CN 201010528021 A CN201010528021 A CN 201010528021A CN 102054787 B CN102054787 B CN 102054787B
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crystal grain
projections
protective layer
wafer
several
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CN102054787A (zh
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陈仁川
张惠珊
赖宥丞
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Advanced Semiconductor Engineering Inc
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Advanced Semiconductor Engineering Inc
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Abstract

本发明关于一种堆栈式封装结构及其制造方法，该方法包括以下步骤：形成且固化一第一保护层以覆盖一第一晶圆的第一凸块；切割该第一晶圆，以形成数个第一晶粒；形成一第二保护层以覆盖一第二晶圆的第二凸块；利用一接合头通过该第一保护层吸附该第一晶粒，且将这些第一晶粒接合于该第二晶圆上；移除该接合头，且移除部分该第一保护层；切割该第二晶圆，以形成数个第二晶粒；形成一第三保护层于一基板上；及将该第一晶粒及该第二晶粒接合于该基板上。藉此，该第一保护层可以保护这些第一凸块，而且该第一保护层还具有增加厚度及平坦化的作用，以利后续第一晶粒的吸附。

Description

堆栈式封装结构及其制造方法
技术领域
本发明关于一种封装结构及其制造方法，详言之，关于一种堆栈式封装结构及其制造方法。
背景技术
堆栈式封装结构将二颗晶粒(下晶粒及上晶粒)堆栈在一基板上以形成的三维封装结构，其中位于下方的下晶粒会具有数个连通柱(Through Silicon Via，TSV)结构，这些连通柱会突出于该下晶粒的一表面，而且该下晶粒另一表面会具有数个凸块结构。因此，制造该堆栈式封装结构的工艺中会遭遇如下问题。
首先，在工艺中，利用接合头(Bonding Head)吸附该下晶粒时会伤害这些连通柱结构或这些凸块结构。再者，目前该上晶粒及该下晶粒为超薄，因此，如何吸附这些薄晶粒并且进行薄晶粒的覆晶堆栈是一项重大的挑战。最后，由于该接合头在高温环境下进行热压，因此这些连通柱结构或这些凸块结构可能会因受热软化而沾黏到该接合头。
因此，有必要提供一种堆栈式封装结构及其制造方法，以解决上述问题。
发明内容
本发明提供一种堆栈式封装结构的制造方法，其包括以下步骤：(a)提供一第一晶圆，该第一晶圆包括一第一晶圆本体、数个第一连通柱(Through Silicon Via，TSV)及数个第一凸块，该第一晶圆本体包括一第一表面及一第二表面，这些第一连通柱突出于该第一表面，这些第一凸块邻接于该第二表面且电性连接这些第一连通柱；(b)形成且固化一第一保护层于这些第一凸块上，以覆盖这些第一凸块；(c)切割该第一晶圆，以形成数个第一晶粒；(d)提供一第二晶圆，该第二晶圆包括一第二晶圆本体及数个第二凸块，该第二晶圆本体包括一第三表面及一第四表面，这些第二凸块邻接于该第三表面，且该第四表面相对于该第三表面；(e)形成一第二保护层于这些第二凸块上，以覆盖这些第二凸块；(f)利用一接合头(Bonding Head)通过该第一保护层吸附这些第一晶粒，且将这些第一晶粒接合于该第二晶圆上，其中这些第一连通柱电性连接这些第二凸块；(g)移除该接合头，且移除部分该第一保护层以显露这些第一凸块；(h)切割该第二晶圆，以形成数个第二晶粒；(i)提供一基板，该基板具有一上表面；(j)形成一第三保护层于该基板上表面；及(k)将该第一晶粒及该第二晶粒接合于该基板上表面，其中这些第一凸块电性连接该基板上表面。
本发明另提供一种堆栈式封装结构的制造方法，其包括以下步骤：(a)提供一第一晶圆，该第一晶圆包括一第一晶圆本体、数个第一连通柱及数个第一凸块，该第一晶圆本体包括一第一表面及一第二表面，这些第一连通柱突出于该第一表面，这些第一凸块邻接于该第二表面且电性连接这些第一连通柱；(b)形成且固化一第一保护层于这些第一连通柱上，以覆盖这些第一连通柱；(c)切割该第一晶圆，以形成数个第一晶粒；(d)提供一基板，该基板具有一上表面；(e)形成一第三保护层于该基板上表面；(f)利用一接合头通过该第一保护层吸附该第一晶粒，且将该第一晶粒接合于该基板上，其中该第一凸块电性连接该基板上表面；(g)移除该接合头，且移除部分该第一保护层以显露这些第一连通柱；(h)提供一第二晶粒及一第二保护层，该第二晶粒包括一第二晶粒本体及数个第二凸块，该第二晶粒本体包括一第三表面及一第四表面，这些第二凸块邻接于该第三表面，该第二保护层位于这些第二凸块上，以覆盖这些第二凸块；及(i)将该第二晶粒接合于该第一晶粒上，其中这些第二凸块电性连接这些第一连通柱。
藉此，该第一保护层可以保护这些第一凸块或这些第一连通柱，而且该第一保护层还具有增加厚度及平坦化的作用，以利后续第一晶粒的吸附。
本发明另提供由上述方法所制得的封装结构。
附图说明
图1至14显示本发明堆栈式封装结构的制造方法的第一实施例的示意图；及
图15至22显示本发明堆栈式封装结构的制造方法的第二实施例的示意图。
具体实施方式
参考图1至14，显示本发明堆栈式封装结构的制造方法的第一实施例的示意图。参考图1，提供一第一晶圆1及一胶带(Tape)18。该第一晶圆1包括一第一晶圆本体10、数个第一连通柱(Through Silicon Via，TSV)12及数个第一凸块13。该第一晶圆本体10包括一第一表面101及一第二表面102。这些第一连通柱12贯穿该第一晶圆本体10，且这些第一连通柱12的一端121突出于该第一表面101。这些第一凸块13邻接于该第二表面102且电性连接这些第一连通柱12，在本实施例中，这些第一凸块13为铜柱(Copper Pillar)及焊料(Solder)的堆栈结构。在其它实施例中，这些第一凸块13可仅为铜柱亦或是焊料。该胶带18邻接该第一表面101以覆盖且保护这些第一连通柱12的一端121。
较佳地，该第一晶圆1为一处理器晶圆(Processor Wafer)，其更包括一绝缘层(Passivation Layer)14、一重布层(RDL)15、一表面处理层(Surface Finish Layer)16及数个第一焊垫17。该绝缘层14位于该第一表面101，其材质例如苯环丁烯(Benzocyclobutene，BCB)、聚酰亚胺(polyimide，PI)等高分子材料；亦或是无机绝缘层，如：二氧化硅(SiO2)。该重布层15位于该第二表面102。这些第一焊垫17位于该重布层15上，且这些第一凸块13位于这些第一焊垫17上。该表面处理层16位于这些第一连通柱12突出的一端121。
参考图2，形成且固化一第一保护层19于这些第一凸块13上，以覆盖且保护这些第一凸块13。在本实施例中，该第一保护层19为一非导电膜(Non Conductive Film，NCF)，其为B阶段材料(B-stage material)。该非导电膜在低温下是硬的，在B阶段温度(B-stage temperature)时会变软，而在超过B阶段温度后会固化(curing)。因此，该第一保护层19(此时该该第一保护层19为一片材)先贴附于该第一晶圆本体10第二表面102，之后加热至B阶段温度使得该第一保护层19软化而完全包覆住这些第一凸块13，再持续加热使得该第一保护层19固化。藉此，该第一保护层19除了可以保护这些第一凸块13，而且该第一保护层19还具有增加厚度及平坦化的作用，以利后续的吸附。
参考图3，切割该第一晶圆1，以形成数个第一晶粒11。每一第一晶粒11包括一第一晶粒本体20、这些第一连通柱12及这些第一凸块13。该第一晶粒本体20包括一第一表面201及一第二表面202。此时，该第一保护层19一起被切割，而切割后的该第一晶粒11及该第一保护层19仍附着于该胶带18上。
参考图4，提供一第二晶圆2及一载体3。该第二晶圆2包括一第二晶圆本体21及数个第二凸块23。该第二晶圆本体21包括一第三表面211及一第四表面212。这些第二凸块23邻接于该第三表面211，且该第四表面212贴附该载体3。在本实施例中，该第二晶圆2为一内存晶圆(Memory Wafer)，这些第二凸块23为焊料(Solder)。此外，该第二晶圆本体21更包括数个第二焊垫22，其邻接于该第三表面211，且这些第二凸块23位于这些第二焊垫22上。该第四表面212利用一黏胶层31贴附于该载体3上。
参考图5，形成一第二保护层32于这些第二凸块23上，以覆盖这些第二凸块23。在本实施例中，该第二保护层32为一非导电膜或一底胶(Underfill)。
参考图6，利用一接合头24吸附该第一晶粒11，由于该第一晶粒11上有该第一保护层19，因此该接合头24通过该第一保护层19吸附该第一晶粒11，而且这些第一凸块13被该第一保护层19保护住而不会直接接触到该接合头24。
参考图7，将这些第一晶粒11接合于该第二晶圆2上，其中这些第一连通柱12接触且电性连接这些第二凸块23。详言之，在此接合步骤中，加热且施力于这些第一晶粒11，而将部分该第二保护层32从接合区域挤开，最后这些第一连通柱12直接接触这些第二凸块23而形成电性连接。之后，移除该接合头24，且移除部分该第一保护层19以显露这些第一凸块13。在本实施例中，以灰化(Ashing)方式移除部分该第一保护层19，使得该第一保护层19变薄并显露这些第一凸块13。
参考图8，移除该载体3及该黏胶层31。参考图9，切割该第二晶圆2，以形成数个第二晶粒25。该第二晶粒25包括一第二晶粒本体26及这些第二凸块23。该第二晶粒本体26包括一第三表面261及一第四表面262，这些第二凸块23邻接于该第三表面261。
参考图10，提供一基板4，例如一有机基板(Organic Substrate)。该基板4具有一上表面41。之后，形成一第三保护层42于该基板4上表面41。在本实施例中，该第三保护层42为一非导电膜或一底胶(Underfill)。
参考图11，将图9中已堆栈的该第一晶粒11及该第二晶粒25再接合于该基板4上表面41，其中这些第一凸块13接触且电性连接该基板4上表面41。
在其它实施例中，亦可先将已堆栈的该第一晶粒11及该第二晶粒25接合于该基板4上表面41后再形成一第三保护层42于该基板4及该第一晶粒11间。
接着，切割该基板4以形成数个堆栈式封装结构5。或者，如图12所示，可先形成一封胶材料51于该基板4上表面41以包覆该第一晶粒11及该第二晶粒25，之后再切割该基板4以形成数个堆栈式封装结构5。
参考图13，其显示当图4的该第二晶圆2为数个时，最终堆栈式封装结构6的示意图，其中每一第二晶圆2具有数个第二连通柱263。这些第二晶圆2堆栈在一起，且利用这些第二连通柱263、这些第二凸块23及这些第二焊垫22彼此电性连接。这些堆栈第二晶圆2切割后形成数个堆栈第二晶粒25。此外，该堆栈式封装结构6更包括数个焊球61，位于该基板4下表面。或者，如图14所示，可先形成一封胶材料62于该基板4上表面41以包覆该第一晶粒11及这些堆栈第二晶粒25，之后再切割该基板4以形成数个堆栈式封装结构6。
参考图11，显示本发明堆栈式封装结构的第一实施例的示意图。该堆栈式封装结构5包括一基板4、一第一晶粒11、一第一保护层19、一第三保护层42、一第二晶粒25及一第二保护层32。
该基板4(例如一有机基板)具有一上表面41。该第一晶粒11接合于该基板4。该第一晶粒11包括一第一晶粒本体20、数个第一连通柱12及数个第一凸块13。该第一晶粒本体20包括一第一表面201及一第二表面202。这些第一连通柱12贯穿该第一晶粒本体20，且这些第一连通柱12的一端121突出于该第一表面201。这些第一凸块13邻接于该第二表面202且电性连接这些第一连通柱12，且这些第一凸块13电性连接该基板4上表面41。在本实施例中，这些第一凸块13为铜柱。
较佳地，该第一晶粒11为一处理器晶粒(Processor Die)，其更包括一绝缘层14、一重布层15、一表面处理层16及数个第一焊垫17。该绝缘层14位于该第一表面201，其材质例如是苯环丁烯(Benzocyclobutene，BCB)、聚酰亚胺(polyimide，PI)等高分子材料；亦或是无机绝缘层，如：二氧化硅(SiO2)。该重布层15位于该第二表面202。这些第一焊垫17位于该重布层15上，且这些第一凸块13位于这些第一焊垫17上。该表面处理层16位于这些第一连通柱12突出的一端121。
该第一保护层19邻接于该第二表面202，且这些第一凸块13突出于该第一保护层19之外。该第三保护层42位于该基板4上表面41及该第一保护层19之间，以保护这些第一凸块13。在本实施例中，该第一保护层19及该第三保护层42为非导电膜。在其它实施例中，该第一保护层19为非导电膜而该第三保护层42为一底胶(Underfill)。
该第二晶粒25接合于该第一晶粒11。该第二晶粒25包括一第二晶粒本体26及数个第二凸块23。该第二晶粒本体26包括一第三表面261及一第四表面262，这些第二凸块23邻接于该第三表面261，且这些第二凸块23电性连接这些第一连通柱12。
在本实施例中，该第二晶粒25为一内存晶粒(Memory Die)，这些第二凸块23为焊料。此外，该第二晶粒本体26更包括这些第二焊垫22，其邻接于该第三表面261，且这些第二凸块23位于这些第二焊垫22上。
该第二保护层32位于该第一晶粒11第一表面201及该第二晶粒25第三表面261之间，以保护这些第二凸块23。在本实施例中，该第二保护层32为一非导电膜或一底胶(Underfill)。
参考图12，该堆栈式封装结构5更包括一封胶材料51，位于该基板4上表面41，以包覆该第一晶粒11及该第二晶粒25。
参考图13，显示本发明堆栈式封装结构的第一实施例的另一种方面示意图。在该堆栈式封装结构6中，该第二晶粒25为数个，每一第二晶粒25具有数个第二连通柱263。这些第二晶粒25堆栈在一起，且利用这些第二连通柱263、这些第二凸块23及这些第二焊垫22彼此电性连接。
参考图14，该堆栈式封装结构6更包括一封胶材料62，位于该基板4上表面41，以包覆该第一晶粒11及这些堆栈第二晶粒25。
参考图15至22，显示本发明堆栈式封装结构的制造方法的第二实施例的示意图。参考图15，提供一第一晶圆1及一胶带18。该第一晶圆1包括一第一晶圆本体10、数个第一连通柱12及数个第一凸块13。该第一晶圆本体10包括一第一表面101及一第二表面102。这些第一连通柱12贯穿该第一晶圆本体10，且这些第一连通柱12的一端121突出于该第一表面101。这些第一凸块13邻接于该第二表面102且电性连接这些第一连通柱12，在本实施例中，这些第一凸块13为铜柱。该胶带18邻接该第二表面102以覆盖这些第一凸块13。
较佳地，该第一晶圆1更包括一绝缘层14、一重布层15、一表面处理层16及数个第一焊垫17。该绝缘层14位于该第一表面101，其材质例如是苯环丁烯(Benzocyclobutene，BCB)、聚酰亚胺(polyimide，PI)等高分子材料；亦或是无机绝缘层，如：二氧化硅(SiO2)。该重布层15位于该第二表面102。这些第一焊垫17位于该重布层15上，且这些第一凸块13位于这些第一焊垫17上。该表面处理层16位于这些第一连通柱12突出的一端121。
参考图16，形成且固化一第一保护层19于这些第一连通柱12突出的一端121上，以覆盖这些第一连通柱12。在本实施例中，该第一保护层19为一非导电膜。
参考图17，切割该第一晶圆1，以形成数个第一晶粒11。每一第一晶粒11包括一第一晶粒本体20、这些第一连通柱12及这些第一凸块13。该第一晶粒本体20包括一第一表面201及一第二表面202。此时，该第一保护层19一起被切割，而切割后的该第一晶粒11及该第一保护层19仍附着于该胶带18上。
参考图18，提供一基板4，该基板4具有一上表面41。接着，形成一第三保护层42于该基板4上表面41。在本实施例中，该第三保护层42为一非导电膜或一底胶(Underfill)。接着，利用一接合头24通过该第一保护层19吸附该第一晶粒11，并分离该第一晶粒11及该胶带18，且将该第一晶粒11接合于该基板4上，其中该第一凸块13接触且电性连接该基板4上表面41。
在其它实施例中，亦可先将该第一晶粒11接合于该基板4上表面41后再形成一第三保护层42于该基板4及该第一晶粒11间。
参考图19，移除该接合头24，且移除部分该第一保护层19使该第一保护层19变薄，以显露这些第一连通柱12突出的一端121。
参考图20，提供一第二晶粒25及一第二保护层32。该第二晶粒25包括一第二晶粒本体26及数个第二凸块23。该第二晶粒本体26包括数个一第三表面261及一第四表面262。这些第二凸块23邻接于该第三表面261。该第二保护层32位于这些第二凸块23上，以覆盖这些第二凸块23。在本实施例中，这些第二凸块23为焊料。此外，该第二晶粒本体26更包括数个第二焊垫22，其邻接于该第三表面261，且这些第二凸块23位于这些第二焊垫22上。该第二保护层32位于这些第二凸块23上，以覆盖这些第二凸块23。在本实施例中，该第二保护层32为一非导电膜或一底胶。
在其它实施例中，亦可先将该第二保护层32覆盖于第一晶粒11的该第一保护层19上。
参考图21，将该第二晶粒25接合于该第一晶粒11上，其中这些第二凸块23接触且电性连接这些第一连通柱12。接着，切割该基板4以形成数个堆栈式封装结构7。或者，如图22所示，可先形成一封胶材料71于该基板4上表面41以包覆该第一晶粒11及该第二晶粒25，之后再切割该基板4以形成数个堆栈式封装结构7。
同样地，在图21中，该第二晶粒25也可以为数个，每一第二晶粒具有数个第二连通柱，且这些第二晶粒25堆栈在一起。
参考图21，显示本发明封装结构的第二实施例的示意图。本实施例的封装结构7与第一实施例的封装结构5(图11)大致相同，其中相同的组件赋予相同的编号。本实施例与第一实施例不同处在于该第一保护层19的位置。在本实施例中，该第一保护层19邻接于该第一晶粒本体20第一表面201，且这些第一连通柱12突出于该第一保护层19之外。该第二保护层32位于该第一保护层19及该第二晶粒26第三表面261之间，以保护这些第二凸块23。第三保护层42位于该基板4上表面41及该第一晶粒本体20第二表面202之间，以保护这些第一凸块13。
在本发明中，该第一保护层19可以保护这些第一凸块13(第一实施例)或这些第一连通柱12(第二实施例)，而且该第一保护层19还具有增加厚度及平坦化的作用，以利后续第一晶粒11的吸附。
惟上述实施例仅为说明本发明的原理及其功效，而非用以限制本发明。因此，习于此技术的人士对上述实施例进行修改及变化仍不脱本发明的精神。本发明的权利范围应如权利要求书所列。

Claims (13)

1.一种堆栈式封装结构的制造方法，包括：
(a)提供一第一晶圆，该第一晶圆包括一第一晶圆本体、数个第一连通柱及数个第一凸块，该第一晶圆本体包括一第一表面及一第二表面，这些第一连通柱突出于该第一表面，这些第一凸块邻接于该第二表面且电性连接这些第一连通柱；
(b)形成且固化一第一保护层于这些第一凸块上，以覆盖这些第一凸块；
(c)切割该第一晶圆，以形成数个第一晶粒；
(d)提供一第二晶圆，该第二晶圆包括一第二晶圆本体及数个第二凸块，该第二晶圆本体包括一第三表面及一第四表面，这些第二凸块邻接于该第三表面，且该第四表面相对于该第三表面；
(e)形成一第二保护层于这些第二凸块上，以覆盖这些第二凸块；
(f)利用一接合头通过该第一保护层吸附这些第一晶粒，且将这些第一晶粒接合于该第二晶圆上，其中部分该第二保护层被挤开，使得这些第一连通柱接触且电性连接这些第二凸块；
(g)移除该接合头，且移除部分该第一保护层以显露这些第一凸块；
(h)切割该第二晶圆，以形成数个第二晶粒；
(i)提供一基板，该基板具有一上表面；
(j)形成一第三保护层于该基板上表面；及
(k)将该第一晶粒及该第二晶粒接合于该基板上表面，其中这些第一凸块电性连接该基板上表面。
2.如权利要求1的方法，其中该步骤(a)中，这些第一连通柱突出的一端具有一表面处理层。
3.如权利要求1的方法，其中该步骤(a)中，该第一晶圆更包括一绝缘层及一重布层，该绝缘层位于该第一表面，且该重布层位于该第二表面。
4.如权利要求1的方法，其中这些第一凸块包含铜柱，这些第二凸块为焊料。
5.如权利要求1的方法，其中该第一保护层为一非导电膜，该第二保护层及该第三保护层为一非导电膜或一底胶。
6.如权利要求1的方法，其中该步骤(d)中，该第二晶圆为数个，每一第二晶圆具有数个第二连通柱，且这些第二晶圆堆栈在一起。
7.如权利要求1的方法，其中该步骤(k)之后更包括一形成一封胶材料于该基板上表面以包覆该第一晶粒及该第二晶粒的步骤。
8.一种堆栈式封装结构，包括：
一基板，具有一上表面；
一第一晶粒，接合于该基板，该第一晶粒包括一第一晶粒本体、数个第一连通柱、数个第一凸块、一绝缘层及一重布层，该第一晶粒本体包括一第一表面及一第二表面，这些第一连通柱突出于该第一表面，这些第一凸块邻接于该第二表面且电性连接这些第一连通柱，且这些第一凸块电性连接该基板上表面，该绝缘层位于该第一表面，且该重布层位于该第二表面；
一第一保护层，邻接于该第二表面，且这些第一凸块突出于该第一保护层之外；
一第三保护层，位于该基板上表面及该第一保护层之间，以保护这些第一凸块；
一第二晶粒，接合于该第一晶粒，该第二晶粒包括一第二晶粒本体及数个第二凸块，该第二晶粒本体包括一第三表面及一第四表面，这些第二凸块邻接于该第三表面，且这些第二凸块分别接触且电性连接于这些第一连通柱突出于该第一表面的一端；及
一第二保护层，位于该第一晶粒第一表面及该第二晶粒第三表面之间，以保护这些第二凸块。
9.如权利要求8的堆栈式封装结构，其中这些第一连通柱贯穿该第一晶粒本体。
10.如权利要求8的堆栈式封装结构，其中这些第一连通柱突出的一端具有一表面处理层。
11.如权利要求8的堆栈式封装结构，其中这些第一凸块包含铜柱，这些第二凸块为焊料。
12.如权利要求11的堆栈式封装结构，其中该第一保护层为一非导电膜，该第二保护层为一非导电膜或一底胶，且该第三保护层为一非导电膜或一底胶。
13.如权利要求11的堆栈式封装结构，其中该第二晶粒为数个，每一第二晶粒具有数个第二连通柱，且这些第二晶粒堆栈在一起。
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