CN102037371B - Frontside illuminated is used to strengthen the defects detection of display panel - Google Patents
Frontside illuminated is used to strengthen the defects detection of display panel Download PDFInfo
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- CN102037371B CN102037371B CN200980118535.6A CN200980118535A CN102037371B CN 102037371 B CN102037371 B CN 102037371B CN 200980118535 A CN200980118535 A CN 200980118535A CN 102037371 B CN102037371 B CN 102037371B
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/302—Contactless testing
- G01R31/308—Contactless testing using non-ionising electromagnetic radiation, e.g. optical radiation
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/006—Electronic inspection or testing of displays and display drivers, e.g. of LED or LCD displays
Abstract
Provide frontside illuminated device and method, generally speaking make the defect that can detect a-Si residue before unit number of assembling steps in array test step.When not being exposed to light, a-Si has high resistivity, makes to be difficult to detect in conventional tft array test process.On the other hand, when penetrating a-Si residue with illumination, its resistivity reduces, and this changes the electrical characteristics of tft array unit then, and this can utilize voltage imaging optical system (VIOS) to detect.In one embodiment, under making tft array unit be exposed to the irradiation of light pulse, with at the test period utilizing VIOS to carry out, affect the top side of TFT panel.In one embodiment, frontside illuminated is advanced along with VIOS for the path that the irradiation of voltage imaging is identical.In another embodiment, the position near near the modulator of VIOS is positioned at for (multiple) light source of frontside illuminated.
Description
The cross reference of related application
The application is the U.S. Provisional Patent Application NO.61/055 based on submitting on May 21st, 2008,031, and the rights and interests requiring its right of priority under 35U.S.C119, be incorporated to its whole disclosure by reference at this.
Technical field
The present invention relates to the defect detected in flat-panel monitor, more specifically, relate to and utilize frontside illuminated (frontsideillumination) to detect defect in flat-panel monitor.
Background technology
In the manufacture process of flat panel Liquid Crystal (LC) display, the thin glass plate of large light is used as the substrate of deposit film transistor (TFT) array.Usually, some independently tft array are included in a glass lined base plate, and are commonly called TFT panel.Alternatively, thin film transistor，Bao Mojingtiguan (or AMLCD) contains this class display of transistor or the diode utilizing each pixel or sub-pixel place, and therefore this glass lined base plate also can be described as AMLCD panel.Also organic LED (OLED) fabrication techniques flat-panel monitor can be utilized, although and carry out typically manufacturing on glass, also can manufacture on plastic lining base plate.
TFT pattern (pattern) deposition is carried out in multiple stage, wherein in each stage, according to deposited on top certain material (such as metal, the tin indium oxide (indiumtinoxide of predetermined pattern at layer (or glass) before; ITO), crystalline silicon, amorphous silicon etc.).Each stage typically comprises multiple step, such as deposition, mask, etching, stripping etc.
In each step during each stage in these stages and within each stage, may occur many production defects, these defects are by the electrical property of the final LCD product of impact and/or optical property.These defects include but not limited to the metal protuberance (protrusion) 110 in ITO112, the ITO projection 114 in metal 116, so-called breach (mousebite) 118, open circuit 120, the short circuit 122 in transistor 124, foreign particles 126, and the residue 128 under pixel, as shown in Figure 1.Amorphous silicon (a-Si) residue 128 under pixel may cause because of undercut (under-etching) or photoetching (lithography) problem.Other defect comprises mask problems, crosses etching (overetching) etc.
Although TFT depositing operation is strictly controlled, defect be unavoidable.Which has limited output capacity and adversely affect production cost.Typically, after the deposition process step of key, utilize the optical check of one or more robotization (AOI) system to check tft array, and utilize electrical-optical checking machine (such as by California, USA 95138SanJose, the PhotonDynamics company (Orbotech company) of 5970OpticalCourt produces, and is also called array tester or array testing technologies instrument (arraychecker; AC) tft array) tested.
A-Si defect is particularly troublesome defect, this is because it is to photaesthesia; That is, a-Si shows as insulator in dark state; But when it is exposed to light, then show as conductor.In fact, its electrical sheet resistance (sheetresistance) R
sias light intensity function and reduce.Fig. 4 illustrates this dependence.To the dependence of light intensity, electrical sheet resistance means that the change of the pixel voltage caused because of defect also can change when change is exposed to the degree of light thus.Therefore, if defect do not detected before final FPD has assembled, then final user will be easy to notice this defect, this is because when during normal FPD operation, it is exposed to the backlight of display.Therefore, there is strong motivation to detect such defect.
Regrettably, routine techniques fails to provide a kind of appropriate method effectively detecting a-Si residue LCD being formed defect during each stage in panel manufacture.
Summary of the invention
The inventive method is for following methods and system, and it essence can eliminate one or more the problems referred to above and other problems of being associated with the detection of the a-Si residue forming defect in LCD display.
According to the present invention on the one hand, a kind of system for detecting the defect in the panel of test is provided.This system is incorporated to frontside illuminated subsystem, is configured to transmit frontside illuminated light beam on the panel of test.This frontside illuminated light beam has the ability that the electrical characteristics changing these defects are beneficial to detect this defect.This system is also incorporated to detection subsystem, and the electrical characteristics changed be configured to based on defect detect defect.Frontside illuminated light beam used in this system by chopping and its duration and intensity be optimized, maximize to make the detection of defect and make the minimized detection of false defect.In addition, this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of defect.
According to the present invention on the other hand, a kind of system for detecting the defect in the panel of test is provided.This system is incorporated to frontside illuminated subsystem, is configured to transmit frontside illuminated light beam on the panel of this test.This frontside illuminated light beam has the ability that the electrical characteristics changing defect are beneficial to detect defect.This system is also incorporated to detection subsystem, and the electrical characteristics be configured to based on the change of defect detect defect.This aforementioned detection subsystem comprises voltage imaging optical device, is configured to the image of the space voltage distribution of the panel creating this test of instruction.The defect in the panel of test is detected based on the image created.Within the system, frontside illuminated subsystem is integrated in the optical path of voltage imaging optical device.In addition, frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of defect.
According to the present invention on the other hand, a kind of system for detecting the defect in the panel of test is provided.This system is incorporated to frontside illuminated subsystem, is configured to transmit frontside illuminated light beam on the panel of this test.Frontside illuminated light beam has the ability that the electrical characteristics changing defect are beneficial to detect defect.This system is also incorporated to detection subsystem, and the electrical characteristics changed be configured to based on defect detect defect.Aforesaid detection subsystem comprises voltage imaging optical device, is configured to the image of the space voltage distribution of the panel creating this test of instruction.The defect in the panel of test is detected based on the image created.Aforesaid frontside illuminated subsystem is disposed in outside the optical path of this voltage imaging optical device.In addition, this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of defect.
Additional aspect related to the present invention partly will be mentioned in hereafter describing, and will be in part apparent according to this description, or know by putting into practice the present invention.Aspect of the present invention by hereafter describe in detail and the element specifically noted of claims and various element and aspect combination and realize and obtain.
Should be understood that above and following description be only exemplary and illustrative, and not intended to be limit by any way claimed the present invention or its application.
Accompanying drawing explanation
That be incorporated in this manual and the accompanying drawing forming its part illustrates embodiments of the invention, and describe one with this and be used from the principle explained and the technology of the present invention is described.Specifically:
Fig. 1 illustrates various acyclic defect in the top view of a part for the medium of the large flat patterning with periodic transistor arrays.
Fig. 2 illustrates the exemplary sectional view of amorphous silicon residue.
Fig. 3 illustrates the exemplary equivalent circuit diagram of a-Si residue relative to TFT pixel.
Fig. 4 is the dependent sampling curve map of electrical sheet resistance for lambda1-wavelength.
Fig. 5 is the dual wavelength irradiation unit (dualwavelengthilluminator of the embodiment according to the present invention's design; DWI) illustrative diagram.
Fig. 6 is the modulator seat irradiation unit (modulatormountilluminator of another embodiment according to the present invention's design; MMI) illustrative diagram.
Fig. 7 diagram is for detecting the exemplary schematic block diagram of the present system of the defect in flat-panel monitor.
Fig. 8 is the exemplary graph of the typical absorption curve representing amorphous silicon.
Fig. 9 is the example of possible front side light and pattern of pixels driver timing diagram.
Figure 10 is another example of possible front side light pattern, and the pulse wherein for each frame of given driving pattern is different.
Figure 11 A and Figure 11 B be when changing the initial time of pulse and pulse strength under, as the flaw detection sensitivity (DDS) of the function of front side light pulse end time and the figure of signal to noise ratio (S/N ratio) (SNR).
Embodiment
In the following detailed description, with reference to (multiple) accompanying drawing, wherein the key element of identical function will be designated identical label.To illustrate mode, non-limiting way illustrates the specific embodiment consistent with the principle of the invention and embodiment in above-mentioned accompanying drawing system.These embodiments are described in detail fully, the present invention can be implemented to make those skilled in the art, and should be understood that and also can utilize other embodiment and can structural change be made to various key element and/or substitute, and do not deviate from scope of the present invention and spirit.Therefore, the following detailed description should do not explained with the implication of restriction.In addition, described of the present invention various embodiment can be implemented with the form of the combination of special hardware or software and hardware.
Those skilled in the art also will understand, array tester can by utilization as at such as United States Patent (USP) 4,983,911,5,097,201 and 5,124, voltage imaging proving installation described in 635 and method, with the defect in identification LC display, these United States Patent (USP)s are incorporated to its full content with way of reference at this.Utilize the pixel that specific pattern comes in electric drive LC display, such as, as at United States Patent (USP) 5,235,272 and 5,459, described in 410, be incorporated herein by reference in its entirety.Because LC display is made up of pel array, therefore when electric drive LC display, some pixel be associated from defect may show different with normal pixel in electric, and voltage imaging sensors and the image processing software that is associated thus can be utilized to detect such difference.By utilizing the combination of different driving pattern, deducibility goes out type and the position of the many defects illustrated in Fig. 1.
But, there is be very difficult to detect ITO in the array test utilizing standard array method of testing under the defect pixel of a-Si residue 128.The cut-open view with the example of the TFT pixel 200 of a-Si defect shown in Figure 2.Glass plate 202 is formed TFT dot structure 200.Gate insulator 204 is placed on glass, then can apply data wire lines 206, then the pixel characteristic of deposit transparent conductive material (such as tin indium oxide (ITO) 210) form.Finally, deposit passivation layer, such as silicon nitride (siliconnitride; SiNx) 208.Amorphous silicon or data metal residue 212 may retain, and are represented as the extension of the line features (linefeature) fallen into subsequently under ITO layer to graphically.Overlapping region 214 between residue 212 and pixel (ITO) 210 forms the capacitor 216 with stray capacitance Cp.
Fig. 3 is the isoboles of the a-Si residue under pixel.In this case:
C
p=k
siN* ε
0* Area
residue/ d
gateSiNequation 1
C
st=k
siN* ε
0* W
pixelw
st/ d
passSiNequation 2
Wherein, C
pstray capacitance, K
siNthe electric medium constant of SiN, ε
0the specific inductive capacity (permittivityconstant) in air, W
pixelthe width of pixel, and W
stthat (electric capacity is C for the width of reservior capacitor
st), d
passSiNand d
gateSiNpassivation layer and the gate pole thickness to SiN layer respectively, and Area
residueit is the area of discussed residue defect.
In array test, apply driving voltage to LC plate, and can be observed pixel response by voltage imaging sensors.For the defect of such as data metal residue and a-Si and so on, n-negative (PN) can be used to drive pattern, and wherein data voltage dropped to negative value before Image Acquisition.In this pattern, the decline of data voltage causes the voltage drop in the pixel with ITO-data line overlap.If it is Δ V that this data voltage falls
d, then Δ V falls in pixel voltage
pcan following formula be expressed as:
Wherein, C
pthe stray capacitance of ITO-data line residue overlap, C
stthe electric capacity of reservior capacitor, and R
siit is the electrical sheet resistance of amorphous silicon.
Equation 1 and 3 discloses two key points about a-Si defect.First, stray capacitance is the size (Area of defect
residue) function.Secondly, be to electrical sheet resistance R
siexponential dependency.Under insulator state (there is not light), R
simay very high (being in the order of magnitude of hundreds of lucky ohm-sq), therefore according to equation 3, when not being exposed to light, Δ V
pbe approximately equal to Δ V
d* (C
p/ C
st), and it has maximal value.Because C
p< C
st, therefore when not being exposed to light, maximum Δ V
pmay be very little, therefore, when there is not light, these defects may be not easy to be detected.Depend on overlapping area, under 64 gray scale drive scheme of routine, this change may cause the skew of minority gray level.Voltage step size between two continuous gray-scales is approximately 50mV.This is very little and defect and normal pixel cannot be distinguished.
In addition, but, due to size-dependent (equation 1), so even when being exposed to light, also possibly very little a-Si defect may cannot be detected.
Although utilize AOI can find some a-Si defect, and normal defect detection technique can be utilized, AC is used to detect some defect, but the larger proportion that cannot pick out in early days in these defects, and after the assembling of TFT-LCD unit completes, really can only be detected after LC plate has been divided into panel and has been assembled into module.In unit testing, backlight module is provided for the light source of the TFT-LCD plate showing image when being electrically driven.The light-sensitive characteristic of a-Si makes it may detect this defect under these conditions.But, really capture these defects before being desirably in unit number of assembling steps, and more preferably in array checking procedure, capture these defects, this is because use laser repair system can relatively easily removal of residue.In addition, at the commitment of manufacturing process and detected that before unit assembling these defects have been saved and packaging technology and the cost that associates with required color filter glassy phase.
LCD array inspection machine does not generally have external light source, and thus the detection of a-Si residue may be very difficult.The array tester of the AC47xx product line manufactured by PhotonDynamics company (being purchased by OrbotechLtd.) comprises short wavelength's backlight, this short wavelength's backlight is combined with the transparent chuck (chuck) of point spindle-type system (splitaxis-typesystem), wherein Examination region and therefore this chuck be limited in single modulator capable (row).But, cover in the door frame type system (gantrytypesystem) of whole glass size at chuck, also the backlight be associated by needs is to pass through to move (such as, single line) or statically (such as, cover completely) cover the size of whole glass, thus may be both unrealistic also not cost-effective.
Wherein a-Si residue is covered to some situation of the gate metal in TFT, backlight cannot pass this gate features, thus be difficult to the a-Si residue on detection grid.Have in the Pixel Design of redundancy TFT at some, specifically, be electrically isolated from each other and be not connected in these situations of pixel at redundancy TFT, this is defect frequently.As a-Si residue bridge joint pixel TFT and redundancy TFT, it affects performance, is thus regarded as defect.A-Si residue increases C
gd(gate-drain parasitic electric capacity).Due to gate-drain capacitor coupling effect, when gate turn-off, pixel voltage reduces (voltage swing: Δ V
g).This is called as recoil effect (kick-backeffect).Δ V falls in pixel voltage
pcan be expressed as:
ΔV
p＝ΔV
g*C
gd/(C
gd+C
st+C
lc)。[equation 4]
Wherein, C
lccell capacitance (existing only in unit drives situation).A-Si residue pixel TFT be connected on the grid of redundancy TFT adds gate drain capacitor, this in turn increases pixel voltage and falls.
Other non-voltage imaging array tester, such as, utilize the tester of electron beam, by with electrospray defect, then make electron accumulation detect a-Si residue in this defect area.This of electronics gathers increase a-Si conductance, makes the formation method be associated defect to be detected.
According to one of the present invention embodiment, frontside illuminated device and method is provided, certain before unit step to make usually, a-Si residue defect can be detected in array test step, specifically, the a-Si residue on the gate insulator of tft array unit is detected.It will be understood by those skilled in the art that when not being exposed to light, a-Si has high resistivity in tft array test.On the other hand, when a-Si residue is irradiated by light, its resistivity will reduce, this changes the electrical characteristics of tft array unit then, this can utilize voltage imaging optical system (VIOS) to detect, the voltage imaging optical system that this optical system is such as produced by the PhotonDynamics company (Orbotech company) of California, USA 95138SanJose, 5970OpticalCourt.The example embodiment of such system is specified in aforesaid U.S. Patent 4,983, and 911,5,097,201 and 5,124, in 635, these United States Patent (USP)s are incorporated to its full content with way of reference at this.Correspondingly, in one embodiment of this invention, tft array unit is made to be exposed in the irradiation of light pulse, at the test period utilizing VIOS to carry out, the top side of impact (impact) this TFT panel.
According to an embodiment, this frontside illuminated is advanced along with in VIOS for the path that the irradiation of voltage imaging is identical.In one embodiment, in the RED sector of visible wavelength region, perform VIOS irradiate.In one embodiment, exemplary optical wavelength is 630nm.According to another embodiment, this frontside illuminated comprises one or both wavelength, and transmits in the periphery of the voltage video modulator of VIOS.
In one of the present invention embodiment, according to VIOS proving installation and function thereof, realize the embodiment of top side to flat plate array tester or frontside illuminated.This causes the cost savings of overall test macro and efficiency to improve, this is because some assemblies of VOIS post are both for frontside illuminated, also for VIOS imaging.Specifically, because the ability detecting interested defect (a-Si) is the function of light intensity, therefore the frontside illuminated of this TFT unit must suitably evenly and can repeat in interested surveyed area.In addition, VIOS tester must not be disturbed to search the function of other type flaw that may occur in TFT unit for the irradiation and optical devices detecting a-Si, wherein some defect has been set forth in above.
In one of the present invention embodiment, a kind of system being configured to the frontside illuminated produced during LCD array test the LCD structure on the panel of test is provided, object is to be beneficial to and detects photosensitive manufacturing defect, the structure of such as LCD pixel (such as grid structure or be attached to data line) upper remaining a-Si residue.In present system one embodiment, be different from the front side for the photoirradiated surface plate of the wavelength of the light of voltage imaging in VIOS with wavelength.Do at least For several reasons like this.First, in VIOS irradiates, light used may have the wavelength of not allowing and effectively detecting a-Si residue and/or other photosensitive defect.The design of the second, VIOS modulator makes almost to be reflected by the film of preceding modulator (pellicle) completely for the light of voltage imaging in VIOS, thus can not arrive this panel.Correspondingly, the light chosen for frontside illuminated makes its electrical characteristics activating (change) a-Si residue and by this film transmission.
Finally, whole system comprises (utilizing the difference of each optical wavelength aforementioned) for separating of these two light beams and prevents the parts (low-pass filter 510 shown in Fig. 5) of the light interference VIOS imaging for frontside illuminated.
Represent the figure of the example embodiment of dual wavelength optical irradiation system 500 of the present invention in Figure 5.This exemplary plot only supplies for illustrating object, and should not be regarded as the scope limiting the present invention by any way.As shown in Figure 5, in order to check with the array based on voltage imaging optical system (VIOS) and test macro is combined, dual wavelength irradiation unit (DWI) 512 is placed in the optical column of VIOS irradiation unit.The structure of this VIOS irradiation unit such as at United States Patent (USP) 5,124, be described in 635, be incorporated to the full content of this United States Patent (USP) at this.
As shown in Figure 5, the blue light 504 that blue light illumination device 502 produces by dual wavelength irradiation unit 512 (such as, have the wavelength of 455nm, a-Si defect is especially responsive to this wavelength) be coupled to by the red light irradiation device 501 for defect imaging in the identical optical path of the visible ray 505 (such as wavelength is 630nm) that produces.Specifically, Fig. 8 illustrates the typical light absorption curve 801 of a-Si, and the light (802) that its instruction has wavelength 455nm has the highest absorption coefficient for a-Si.
The coupling of two light beams of aforementioned different wave length in dual wavelength irradiation unit 512 by utilizing dichronic mirror (beam splitter) 503 to realize, dichronic mirror 503 essence transmitting blue light beam 504 is essence reflection Red light beam 505 also, to produce the beam combination with two wavelength.As will be understood by those skilled, the coupling of the light beam of different wave length can realize by many alternate manners, and wherein some mode will described below with reference to other embodiments of the invention.Therefore, the specific design of the irradiation unit of dual wavelength shown in Fig. 5 512 should not be regarded as limiting by any way.
Forward Fig. 5 shownschematically system to, after passing dichronic mirror (beam splitter) 503, the blueness of conllinear and red beam are reflected by beam splitter 506 and pass lens subassembly 507, irradiation distribution patterns desired on the panel 509 providing lens subassembly 507 to realize optical modulator 508 and test.
As mentioned above, of the present invention various in addition or in alternate embodiment, can by some different modes realize modulator 508 and test panel 509 dual wavelength conllinear irradiate.Such as, in one embodiment, multi-wave length illuminating diode (LED) can be adopted, wherein can limit the wavelength chooses of these multi-wavelength diodes.In this kind of configuration, only need employing one to utilize the irradiation unit of this aforementioned multi-wave length illuminating diode to replace such as light source 502, secondary light source 501 and dichronic mirror 503 can be removed from this irradiation system simultaneously.
In another alternate embodiment, can be used for equally replacing in the single light source of light source 502, make together with Single wavelength red LED spatially intersperses among with Single wavelength blue led.Equally, in this kind of configuration, need in this irradiation system, remove secondary light source 501 and dichronic mirror 503.But, it should be noted that, in this configuration of the LED interspersed utilizing two different wave lengths, the uniformity coefficient of this irradiation may be damaged to some extent.
In one embodiment, VIOS modulator 508 is equipped with film 515, and film 515 is located at the surface of the modulator 508 of the tested LCD structure of the panel of spatially network topology testing.Film 515 have special select make irradiation unit 501 the ruddiness that produces just by its reflection irradiation unit 502 the blue light that produces just by the optical characteristics of film 515 transmission.Modulator 508 based on the distribution of electromotive force on the end face (Fig. 5) of the panel 509 of test, modulation film 515 the intensity of ruddiness that reflects, the panel 509 wherein tested is placed on the film of spatially contiguous modulator 508.After by film reflector, modulated ruddiness is through lens subassembly 507, beam splitter 506 and low-pass filter 510.After passing wave filter 510, the ruddiness of reflection clashes into (impinge) on the photo-sensitive cell of CCD device 511, and this photo-sensitive cell is used to the image of the panel creating test.For preventing the ccd image sensor 511 of any blue light interference VIOS for irradiating a-Si residue, CCD device 511 is equipped with low-pass filter 510.This wave filter has and is designed to significantly decay blue light and allow the optical transmission property that this ruddiness passes undampedly.This can prevent the blue light of frontside illuminated arrival CCD device 511 from also disturbing the image of the electromotive force on the end face of the panel 509 of the test created.It should be noted that in one of the present invention embodiment, this blue light, only for changing the electrical characteristics of this a-Si residue, being easier to make it be detected by such as VIOS, and not producing the image of defect itself.
Utilize voltage source 513 to apply bias voltage to the tested LCD structure on the surface of the panel 509 of test, and utilize the end face 516 (Fig. 5) of voltage source 514 pairs of modulators 508 to apply bias voltage.In one of the present invention embodiment, all optical modules of this system are all equipped with applicable optical coating, to carry out best Transmission light and reflection.It should be noted that the irradiation uniformity coefficient of the light (blue and red) of two wavelength is by similar, and typically in one of the present invention embodiment, poorer unlike being similar to 25%.The scope of typical irradiation uniformity coefficient is between 10% and 15%.Therefore, Fig. 5 shownschematically dual wavelength of the present invention irradiates design and configuration allows with the most responsive wavelength illumination a-Si defect of a-Si defect, but does not reduce or the function of interference voltage imaging test (VIOS) hardware.
It should be noted that the panel that the invention is not restricted to only with ruddiness and this modulator of blue light illumination and this test.As the skilled person will appreciate, another can be selected to irradiate optical wavelength to realize the appropriate absorption by a-Si residue, to change its electrical characteristics fully to make it possible to detect, and reduce the interference of frontside illuminated to VIOS operation (it re-creates voltage's distribiuting pattern on the panel in test).
Irradiate the second alternate embodiment of design according to the illustrated dual wavelength of the present invention of Fig. 6, and also in order to check with the array based on VIOS and test macro is combined, annular illumination device 601 is incorporated in modulator seat 600.Annular illumination device 601 is arranged on modulator 508, and the Single wavelength wavelength of approximate 455nm (blue or) light source 603 (such as multiple LED) be positioned at VIOS irradiation unit optical path beyond to prevent image from cutting.In the first embodiment as described in the preceding, the film (not shown) transmit blue of modulator 508 reflection Red irradiation unit 501 produce the light of visible wavelength, it is needed for the function of voltage imaging modulator 508.Light source 603 creates irradiation pattern 604.In an exemplary embodiment of the invention, every side of installing ring 601 carries 4 LED603.But, it will be understood by those skilled in the art that and the LED of other the applicable quantity any separated on installing ring 601 in any appropriate mode can be utilized to realize desired intensity and irradiate uniformity coefficient.Therefore, the invention is not restricted to the shown layout of irradiation unit ring 601, modulator seat 600 and light source 603.In the various embodiments of the present invention, irradiation unit ring 601 has square, rectangle, octagon, circle, ellipse or other suitable shape.The light that light source 603 produces through modulator 602, and irradiates the front side of the panel of test, so that the electrical characteristics of a-Si residue on the panel affecting this test.
As the skilled person will appreciate, depend on the size of modulator 508, in some cases, particularly when the quantity of LED603 is relatively little, compare with reference to the dual wavelength irradiation unit (DWI) described in Fig. 5, may more be difficult in the present embodiment realize good uniformity coefficient.But, with comparing achieved by the embodiment with reference to the dual wavelength irradiation unit (DWI) described in Fig. 5, the quantity of LED603 is increased to every side and is beneficial to the larger irradiation uniformity coefficient of realization and uniformity characteristic more than 10 (altogether more than 40).For the best uniformity coefficient in modulator region gamut, must the emission angle of control LED.As known in the art, some LED has lambert (Lambertian) and launches profile (profile), thus launch with very large solid angle, this is unfavorable for realizing the high expectation target irradiating uniformity coefficient, this is because more light is unevenly sent to the central authorities of modulator.There is some alternative solutions to can be used for overcoming this deficiency.In one embodiment, utilize special multiple directed LED as light source 603 and guide it to irradiate the innermost part of modulator 508.
In an alternative em bodiment, add collimation lens (collimatinglens) or be preferably optically coupled to each Universal LED, to comprise the expansion of lambert's profile.Various methods for collimation lens being coupled to optically LED are well known in the art.In one embodiment, each LED is equipped with the collimation lens of himself.These collimation lenses are conducive to the uniformity coefficient strengthening frontside illuminated.In another embodiment, directional attenuation is applied by adding neutral density filter (neutraldensityfilter) in LED side.In addition, diffuser can be used: (1) eliminates the spatial non-uniformity of each LED; And (2) improve the TBI uniformity coefficient of combination LED distribution.Such as, in one embodiment, can utilize and manufactured and the diffuser sold by the Luminit of California, USA Torrance (PhysicalOpticsCorporation company).
In one embodiment, the beam-shaping diffuser producing oval radiation profiles can be used to improve frontside illuminated uniformity coefficient.In identical or different embodiment, also by utilizing bendingof light or turning film to improve frontside illuminated uniformity coefficient.
The major advantage of the multiple light courcess configuration shown in Fig. 6 to be in existing door frame type system to formation renovates (retrofit) will be more easy and cheap, wherein the light source 603 of frontside illuminated is provided to be installed on independent installing ring to the a-Si residue on panel 509 surface of test, this installing ring is disposed near the modulator 508 on the dual wavelength irradiation system of Fig. 5, and wherein secondary light source is integrated in VIOS post self.In addition, the inventive concept that Fig. 6 is illustrated can be applicable to need the evenly peripheral defect detecting technique (such as based on the detecting device of electron beam, and may be full-contact test instrument probe) irradiated.But it should be noted that as previously described, electron beam is not compatible with blue ray radiation.
It will be understood by those skilled in the art that can by being different from all multimode realizations embodiment illustrated in fig. 6 for providing the system configuration of frontside illuminated (be included near modulator and arrange light source).Therefore, the particular design of irradiation system shown in Fig. 6 should not be regarded as limiting by any way.
Fig. 7 diagram is for detecting the exemplary schematic block diagram of the system 700 of the defect in flat-panel monitor, one of its embodiment adopting the present invention to conceive.The system of the present invention is incorporated to VIOS702, and it comprises dual wavelength irradiation unit 703, and the exemplary embodiment of dual wavelength irradiation unit 703 is described above (element 512) with reference to Fig. 5.The light beam (such as blue light) of the first wave length that irradiation unit 703 produces is directed to the LCD 701 be arranged on glass supporter.The light beam (such as red visible) of the second wave length that irradiation unit 703 produces is directed on modulator 705, modulator 705 is operatively for being transformed into spatial modulation light signal via electrical-optical sensor (modulator) by the electric field born in the LCD of the test of bias voltage, and the film (not shown) of this optical signals modulator 705 reflects.The light of reflection is focused in CCD device 711 by lens combination 704, is created the image in region of the LCD of test by CCD device 711 with the ruddiness of reflection, the distribution of electromotive force on the panel 701 that the image created just is indicating test.Example system 700 can comprise Image Acquisition/image procossing PC709 further, it is configured to receive view data from CCD device 711, utilize institute to receive view data produces the image of panel tested and also processes the image that produces with the defective LCD cell of identification tool, comprises the position of such defective unit on the panel tested.The positional information of these defects can be recorded for further process, such as, to correct the defect detected.
In one embodiment of this invention, VIOS702 is installed on moveable X/Y/Z platform assembly 706, and X/Y/Z platform assembly 706 can be mobile under platform/IO control module 707 controls.In the embodiment of the present invention, more than one VIOS702 is installed on same X/Y/Z platform 706, makes to utilize different VIOS702 to check the zones of different of the panel of this test simultaneously.
Finally, arrange test signal pattern generator 710, to provide driving voltage pattern to the LCD of test, trigger and provide required be biased into modulator to control irradiation unit.
It should be noted that, in the embodiment of the present invention, frontside illuminated system can be fully integrated in VIOS subsystem, and never in any form by the restriction of above-mentioned detection technique, it provides optimum absorption efficiency and radiation uniformity coefficient.Front lit sideways technology illustrated in Fig. 6 is also applicable to the detection system based on electron beam.But radiation uniformity coefficient should be especially good for mentioned above and illustrated in Fig. 5 dual wavelength irradiation unit design, and the blue light wherein activated for a-Si is followed and irradiated with main VIOS the identical optical path that light arrives modulator.
In a specific embodiment of the present invention, frontside illuminated is by chopping, and its duration and intensity are maximized by the photosensitive defects detection being optimized to make relative to TFT pixel.Specifically, frontside illuminated light has the wavelength matched with the absorption maximum optical characteristics of photosensitive defect.In one embodiment, wavelength is utilized to be less than the frontside illuminated of blue light for a-Si residue of 470nm.
In the embodiment of the present invention, for the front side optical efficiency of optimum, select the wavelength of the conductance for increasing amorphous silicon residue, match to make the absorption characteristic of itself and material.Typically, a-Si has absorbing boundary (edge) in low wavelength (blue light) scope, see the curve 801 in Fig. 8.For larger wavelength (more low-yield), absorbability sharply declines, and for shorter wavelength, absorbability does not then more or less change.It should be noted that based on the defects detection of electron beam and the use of blue light incompatible, this be due to its for measure pixel voltage secondary (secondary) electronic detectors in introduce significant noisiness.Two reasons are existed to this.First, the photon (such as blue light) of short wavelength has larger energy than the photon with red wavelength, therefore can produce more unwanted noise signal when it hits scintillater-photomultiplier cell (scintillator-photomultiplier) detecting device needed for detected electrons.Secondly, the energy entering detecting device due to electronic secondary may be subject to the impact of electronics and photon collision, therefore can there is larger signal intensity, and it contributes to global noise.
Amorphous silicon is responsive to short-wavelength light, thus produces the photoelectron of movement after irradiation, causes the conductance of a-Si defect to increase.In certain embodiments, choose the blue light with 470nm (or shorter) wavelength, this part ground is because it has by the relatively higher power more effectively absorbed in a-Si, and has lower electrical sheet resistance.Fig. 4 diagram is for two kinds of different wave lengths (470nm (curve 401) and 530nm (curve 402)), and electrical sheet resistance is as the curve map of the function of light intensity.From these curve maps, along with intensity increases, in two wavelength, shorter one (401) makes resistance reduce quickly.Because may be stronger corresponding to the signal of the light with shorter wavelength, therefore the use of shorter-wavelength light also can make it possible to the defect (equation 1 and 3) detecting reduced size.
A shortcoming of penetrating front panel surface with the illumination of a-Si to the wavelength of its sensitivity is, TFT channel is also exposed to identical illumination and hits.Because TFT structure is also be made up of a-Si material, therefore shock frontside illuminated also will increase the conductivity of a-Si material in TFT in the mode identical with the residue forming defect.When being exposed to light, the off state conductivity of TFT will increase, and therefore the leakage current of TFT by higher than the respective value in dark state.This causes the decay of pixel voltage to increase, and this can be utilized TFT to the voltage responsive of defects detection, be detected by voltage imaging tester or other similar method of testing.In fact and zero defect therefore, even if TFT channel, but depend on that the attenuation tester of pixel voltage also can be regarded as mistakenly and has defect.That is, frontside illuminated illumination is utilized to penetrate good TFT pixel or channel may cause observing false defect.
The pixel voltage minimizing attenuation that TFT leakage current is caused but simultaneously make the detection of a-Si residue respond a maximized mode is the duration and the intensity that make this frontside illuminated light pulse and change light pulse.Fig. 9 illustrates that front side light timing drives the illustrated exemplary graphical user 900 of pattern signal timing relative to LCD.Signal 901 (odd data), 902 (even data), 903 (odd number gatings), 904 (even number gatings) form LCD Test driver pattern.Frontside illuminated pulse 905 is characterized by its intensity, duration, initial time and end time.
Figure 10 is another example of possible front side light pattern 1000, and the parameter of wherein frontside illuminated pulse 905 is neither identical for each frame of given driving pattern.Specifically, in first (A) frame, frontside illuminated pulse 905 has the duration of 3 milliseconds, and initial time is 3.5 milliseconds, and intensity is 50%.In second (B) frame, frontside illuminated pulse 905 turns off.In the 3rd (C) frame, frontside illuminated pulse 905 has the duration of 7 milliseconds, and initial time is 0 millisecond, and intensity is 25%.Finally, in the 4th (D) frame, frontside illuminated pulse 905 has the duration of 3 milliseconds, and initial time is 3.5 milliseconds, and intensity is 50%.Modulator bias voltage 906 is identical for each frame.
The voltage pixel voltage that caused by a-Si residue is reduced maximize, simultaneously TFT being leaked to cause reduces and minimizes, and this is corresponding to making flaw detection sensitivity (DDS) maximize to make on-the-spot standard deviation (sitestandarddeviation) little or make signal to noise ratio (S/N ratio) (SNR) height simultaneously.Specifically, the value of DDS is measuring of defect contrast, and is defined as comparing between the pixel voltage of normal pixel and the pixel voltage of defect, i.e. DDS=(1-V
defect/ v
site-av), and typically for the detection with 30% threshold value (it is the value typically used in defects detection), DDS should be greater than 0.3.On-the-spot standard deviation should keep being less than 0.4V, and signal to noise ratio snr=(V
site-av/ standard deviation) can 25 be greater than.
Figure 11 A and Figure 11 B illustrates the defect (spurious signals-pixel capacitance type defect) for a kind of particular type, utilizes the test result 1100 and 1200 that an exemplary embodiment of present system obtains.These illustrate DDS (Figure 11 A) and SNR (Figure 11 B) dependence to the front side light end time.Particularly, the data and curves 1101-1109 of Figure 11 A is shown for 9 pairs of intensity and Start Time value.Particularly: 10% intensity, 1 millisecond of initial time (curve 1101); 10% intensity, 7 milliseconds of initial times (curve 1102); 10% intensity, 9 milliseconds of initial times (curve 1103); 50% intensity, 1 millisecond of initial time (curve 1104); 50% intensity, 7 milliseconds of initial times (curve 1105); 50% intensity, 9 milliseconds of initial times (curve 1106); 90% intensity, 1 millisecond of initial time (curve 1107); 90% intensity, 7 milliseconds of initial times (curve 1108); And 90% intensity, 9 milliseconds of initial times (curve 1109).Curve 1201-1209 shown in Figure 11 B corresponds to the intensity/initial time pair identical with the response curve 1101-1109 of Figure 11 A.It should be noted that duration of pulse, intensity and initial time can be different because of panel, and can be different because of different defect types.
First, be can be observed by institute offer curves 1101-1109, DDS increases with pulses ending time and duration (because front side light is on the impact of a-Si residue), and SNR reduces with pulses ending time and duration (because front side light is on the impact of this TFT).Secondly, between 10% and the intensity of 50%, the value of DDS increases and the value of SNR reduces, but does not then change for higher intensity.There is saturation effect in this instruction.3rd, for Tend > 14 milliseconds (getting T=0 in positively-modulated device cycle beginning), the value of DDS and SNR seems saturated.4th, when not carrying out pixel driver, the pulse being limited to the negatively-modulated device bias voltage cycle does not have impact.
Indicated by Figure 11 A and Figure 11 B, be 50% or higher for intensity, and the situation of the pulse (i.e. pulse and overlapping 1 to 3 millisecond of the retention time just terminated after data voltage declines) that t=8 to 11 millisecond is terminated after starting for the positive half period in the modulator bias voltage cycle, in the specific embodiment of the present invention's design, meet optimum detection, i.e. DDS > 0.3 and SNR > 25%.It should be noted that the TFT caused due to light leaks, therefore have and cause unacceptable large SNR to reduce compared with the pulse of long duration.For comparing, in Figure 11 B, the SNR value 1210 corresponding with the defects detection when not having front side light is also shown.
Finally, it should be understood that said process is not relevant to any specific device inherently with technology, and can be implemented by any applicable assembly combination.In addition, according to said teachings, various types of fexible unit can be used.Building special purpose device is favourable to perform said method step also provable.Describe the present invention together with particular example, these examples are all intended to illustratively property and non-limiting in all respects.It will be understood by those skilled in the art that many various combinations of hardware, software and firmware also will be applicable to implement the present invention.
In addition, after considering this instructions and having put into practice the present invention disclosed herein, for those skilled in the art, other embodiment of the present invention will be apparent.The various aspects of described embodiment and/or assembly can be used alone or use in any combination in defect detecting system of the present invention.Be intended to only be considered as exemplary by this instructions and these examples, true scope of the present invention and spirit are indicated by claims and equivalent thereof.
Claims (36)
1., for detecting a system for the amorphous silicon residue defect in the flat plate panel of test, this system comprises:
A. frontside illuminated subsystem, be configured to transmit frontside illuminated light beam on the panel of test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity; And
B. detection subsystem, the electrical characteristics changed be configured to based on described defect detect described defect, wherein this frontside illuminated light beam by chopping and its duration and intensity be optimized to make the detection of described defect to maximize and made the minimized detection of false defect, and wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect.
2. the system as claimed in claim 1, also comprise voltage signal source, be configured to apply the panel of voltage signal to this test, the voltage signal applied causes the space voltage on the panel of this test to distribute, wherein this detection subsystem comprises voltage imaging optical system, be configured to the image of the space voltage distribution created on the panel of this test of instruction, and wherein detect described defect based on the image created.
3. system as claimed in claim 2, wherein this frontside illuminated subsystem is integrated in the optical path of this voltage imaging optical system.
4. system as claimed in claim 3, wherein the optical path of this voltage imaging optical system comprises dichronic mirror, is configured to combination voltage imaging beam and this frontside illuminated light beam.
5. system as claimed in claim 3, wherein this voltage imaging optical system comprises imaging device and low-pass filter, this imaging device is configured to the image of the space voltage distribution created on the panel of this test of instruction, and this low-pass filter is configured to prevent this frontside illuminated light beam from arriving this imaging device.
6. system as claimed in claim 3, wherein this voltage imaging optical system comprises modulator, be configured to according to the space voltage distributed modulation voltage imaging light beam on the panel of this test, this modulator has and is configured to reflected voltage imaging beam and the film of transmission frontside illuminated light beam.
7. system as claimed in claim 2, wherein this frontside illuminated light beam is in blue wavelength region, and wherein this voltage imaging optical system has for the voltage imaging light beam creating image the wavelength being different from this frontside illuminated light beam.
8. the system as claimed in claim 1, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
9., for detecting a system for the amorphous silicon residue defect in the flat plate panel of test, this system comprises:
A. frontside illuminated subsystem, be configured to transmit frontside illuminated light beam on the panel of this test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity; And
B. detection subsystem, the electrical characteristics changed be configured to based on described defect detect described defect, this detection subsystem comprises voltage imaging optical system, be configured to the image of the space voltage distribution created on the panel of this test of instruction, wherein detect described defect based on the image created, wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect, and wherein this frontside illuminated subsystem is integrated in the optical path of this voltage imaging optical system.
10. system as claimed in claim 9, wherein the optical path of this voltage imaging optical system comprises dichronic mirror, is configured to combination voltage imaging beam and this frontside illuminated light beam.
11. systems as claimed in claim 9, wherein this voltage imaging optical system comprises imaging device and low-pass filter, this imaging device is configured to the image of the space voltage distribution created on the panel of this test of instruction, and this low-pass filter is configured to prevent this frontside illuminated light beam from arriving this imaging device.
12. systems as claimed in claim 9, wherein this voltage imaging optical system comprises modulator, be configured to according to this voltage imaging light beam of the space voltage distributed modulation on the panel of this test, this modulator has and is configured to reflect this voltage imaging light beam and the film of this frontside illuminated light beam of transmission.
13. described systems as claimed in claim 9, wherein this frontside illuminated light beam is in blue wavelength region, and wherein this voltage imaging optical system has for the voltage imaging light beam creating image the wavelength being different from this frontside illuminated light beam.
14. systems as claimed in claim 9, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
15. 1 kinds for detecting the system of the amorphous silicon residue defect in the flat plate panel of test, this system comprises:
A. frontside illuminated subsystem, be configured to transmit frontside illuminated light beam on the panel of this test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity; And
B. detection subsystem, the electrical characteristics changed be configured to based on described defect detect described defect, this detection subsystem comprises voltage imaging optical system, be configured to the image of the space voltage distribution created on the panel of this test of instruction, wherein detect described defect based on the image created, wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect, and wherein this frontside illuminated subsystem is disposed in outside the optical path of this voltage imaging optical system.
16. systems as claimed in claim 15, wherein this frontside illuminated subsystem comprises the light emitting diode of the multiple special orientation be positioned on installing ring to optimize the homogeneity of this frontside illuminated light beam.
17. systems as claimed in claim 15, wherein this frontside illuminated subsystem comprises multiple light emitting diode, and at least one light emitting diode in wherein said multiple light emitting diode and collimation lens optical coupled, this collimation lens is positioned on installing ring to optimize the homogeneity of this frontside illuminated light beam.
18. systems as claimed in claim 15, wherein this frontside illuminated subsystem comprises multiple light emitting diodes of being coupled with directional attenuation modular optical to optimize the homogeneity of this frontside illuminated light beam.
19. systems as claimed in claim 18, wherein this directional attenuation module comprises neutral density filter.
20. systems as claimed in claim 15, wherein this voltage imaging optical system comprises imaging device and low-pass filter, this imaging device is configured to the image of the space voltage distribution created on the panel of this test of instruction, and this low-pass filter is configured to prevent this frontside illuminated light beam from arriving this imaging device.
21. systems as claimed in claim 15, wherein this voltage imaging optical system comprises modulator, be configured to modulate this voltage imaging light beam according to the space voltage distribution on the panel of this test, this modulator has and is configured to reflect this voltage imaging light beam and the film of this frontside illuminated light beam of transmission, and wherein this frontside illuminated subsystem system is disposed in the space close vicinity near this modulator.
22. systems as claimed in claim 15, wherein this voltage imaging optical system and this frontside illuminated subsystem are installed on moveable platform assembly, and this moveable platform assembly is configured to the panel scanning this test under the control of platform control module.
23. the system as claimed in claim 22, are also included at least one second voltage imaging optical system and at least one the second frontside illuminated subsystem that this moveable platform assembly is installed.
24. systems as claimed in claim 15, wherein this frontside illuminated light beam is in blue wavelength region, and wherein this voltage imaging optical system has for the voltage imaging light beam creating image the wavelength being different from this frontside illuminated light beam.
25. systems as claimed in claim 15, wherein this frontside illuminated subsystem comprises multiple light emitting diode, and each light emitting diode in wherein said multiple light emitting diode is equipped with the diffuser of each light emitting diode be optically coupled in described multiple light emitting diode, this diffuser is configured to eliminate the spatial non-uniformity of this frontside illuminated light beam and improves the TBI homogeneity of this frontside illuminated light beam.
26. systems as claimed in claim 15, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
27. 1 kinds for detecting the method for the amorphous silicon residue defect in the flat plate panel of test, the method comprises:
A. utilize frontside illuminated subsystem to transmit frontside illuminated light beam on the panel of this test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity; And
B. detection subsystem is utilized to detect described defect based on the electrical characteristics changed of described defect, wherein this frontside illuminated light beam by chopping and its duration and intensity be optimized, maximize to make the detection of described defect and make the minimized detection of false defect, and wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect.
28. methods as claimed in claim 27, also comprise and apply the panel of voltage signal to this test, the voltage signal of this applying causes the space voltage distribution on the panel of this test and creates the image of the space voltage distribution on the panel of this test of instruction, wherein detects described defect based on the image created.
29. methods as claimed in claim 28, the image wherein indicating the space voltage on the panel of this test to distribute utilizes voltage imaging light beam to create, and wherein this frontside illuminated light beam is in the optical path of this voltage imaging light beam.
30. methods as claimed in claim 28, the image wherein indicating the space voltage on the panel of this test to distribute utilizes voltage imaging optical system to create, this voltage imaging optical system comprises imaging device and low-pass filter, and this low-pass filter is configured to prevent this frontside illuminated light beam from arriving this imaging device.
31. methods as claimed in claim 28, wherein this frontside illuminated light beam is in blue wavelength region, and the voltage imaging light beam of the image that the space voltage wherein on the panel creating this test of instruction distributes has the wavelength being different from this frontside illuminated light beam.
32. methods as claimed in claim 27, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
33. 1 kinds for detecting the method for the amorphous silicon residue defect in the flat plate panel of test, the method comprises:
A. utilize frontside illuminated subsystem to transmit frontside illuminated light beam on the panel of this test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity; And
B. detection subsystem is utilized to detect described defect based on the electrical characteristics changed of described defect, this detection subsystem comprises voltage imaging optical system, be configured to the image of the space voltage distribution created on the panel of this test of instruction, wherein detect described defect based on the image created, wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect, and wherein this frontside illuminated subsystem is integrated in the optical path of this voltage imaging optical system.
34. methods as claimed in claim 33, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
35. 1 kinds for detecting the method for the amorphous silicon residue defect in the flat plate panel of test, the method comprises:
A. utilize frontside illuminated subsystem to transmit frontside illuminated light beam on the panel of this test, the electrical characteristics that this frontside illuminated light beam changes described defect are beneficial to detect described defect, and described electrical characteristics are conductance/resistivity;
B. detection subsystem is utilized to detect described defect based on the electrical characteristics changed of described defect, this detection subsystem comprises voltage imaging optical system, be configured to the image of the space voltage distribution created on the panel of this test of instruction, wherein detect described defect based on the image created, wherein this frontside illuminated light beam has the wavelength mated with the absorption maximum optical characteristics of described defect, and wherein this frontside illuminated subsystem is disposed in outside the optical path of this voltage imaging optical system.
36. methods as claimed in claim 35, wherein, the conductance that described frontside illuminated light beam changes described defect is beneficial to detect described defect; And described detection subsystem is configured to detect described defect based on the conductance changed of described defect.
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US5503108P | 2008-05-21 | 2008-05-21 | |
| US61/055,031 | 2008-05-21 | ||
| PCT/US2009/044667 WO2009143237A1 (en) | 2008-05-21 | 2009-05-20 | Enhancement of detection of defects on display panels using front lighting |
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| Publication Number | Publication Date |
|---|---|
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| CN200980118535.6A Active CN102037371B (en) | 2008-05-21 | 2009-05-20 | Frontside illuminated is used to strengthen the defects detection of display panel |
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| Country | Link |
|---|---|
| JP (1) | JP5520289B2 (en) |
| KR (1) | KR101610821B1 (en) |
| CN (1) | CN102037371B (en) |
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| WO (1) | WO2009143237A1 (en) |
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| US8866899B2 (en) * | 2011-06-07 | 2014-10-21 | Photon Dynamics Inc. | Systems and methods for defect detection using a whole raw image |
| JP3185906U (en) * | 2012-03-27 | 2013-09-12 | フォトン・ダイナミクス・インコーポレーテッド | Inspection equipment for electronic equipment |
| KR101902500B1 (en) * | 2012-04-16 | 2018-10-01 | 삼성디스플레이 주식회사 | Organic light emitting diode display |
| CN103940832A (en) * | 2013-01-17 | 2014-07-23 | 北京兆维电子(集团)有限责任公司 | Lighting device for automatic optical detection on flat display screen |
| KR101813784B1 (en) | 2016-02-04 | 2017-12-29 | 연세대학교 산학협력단 | Apparatus and method of controlling optical modulator bias based on eye-amplitude monitoring |
| CN106056608A (en) * | 2016-06-01 | 2016-10-26 | 武汉精测电子技术股份有限公司 | Image dot-line defect detection method and device |
| TWI717670B (en) | 2018-12-21 | 2021-02-01 | 財團法人工業技術研究院 | Method for inspecting light-emitting diodes and inspection apparatus |
| CN109946589B (en) * | 2019-04-08 | 2022-12-27 | 京东方科技集团股份有限公司 | Method and device for detecting bad electricity of display panel |
| TWI739376B (en) * | 2019-12-13 | 2021-09-11 | 南臺學校財團法人南臺科技大學 | A method for detecting a pellicle membrane and a detecting system |
| WO2021168724A1 (en) * | 2020-02-27 | 2021-09-02 | Shenzhen Xpectvision Technology Co., Ltd. | Method of phase contrast imaging |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4999577A (en) * | 1986-10-09 | 1991-03-12 | International Business Machines Corporation | Method for contactless testing of conducting paths in a substrate using photon-assisted tunneling |
| US5124635A (en) * | 1990-02-15 | 1992-06-23 | Photon Dynamics, Inc. | Voltage imaging system using electro-optics |
| US6233217B1 (en) * | 1997-08-30 | 2001-05-15 | Samsung Electronics Co., Ltd. | Optical pickup for recording/reproduction with a light emitting diode light source |
| US6529018B1 (en) * | 1998-08-28 | 2003-03-04 | International Business Machines Corporation | Method for monitoring defects in polysilicon gates in semiconductor devices responsive to illumination by incident light |
| US6833565B2 (en) * | 2002-12-20 | 2004-12-21 | Industrial Technology Research Institute | White-light led with dielectric omni-directional reflectors |
| US7065115B2 (en) * | 2002-10-16 | 2006-06-20 | Eastman Kodak Company | External cavity organic laser |
| CN101051619A (en) * | 2006-04-03 | 2007-10-10 | 三星电子株式会社 | Substrate check device and substrate check method |
| CN101055256A (en) * | 2006-04-10 | 2007-10-17 | 奥林巴斯株式会社 | Defect inspection apparatus |
Family Cites Families (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4527205B2 (en) * | 1997-03-31 | 2010-08-18 | リアル・タイム・メトロジー，インコーポレーテッド | Optical inspection module and method for detecting particles and defects on a substrate in an integrated process tool |
| JP4071331B2 (en) * | 1997-12-12 | 2008-04-02 | フォトン・ダイナミクス・インコーポレーテッド | Liquid crystal drive substrate inspection apparatus and inspection method thereof |
| TWI281079B (en) * | 2004-01-12 | 2007-05-11 | Quanta Display Inc | Method for inspecting defects on a display panel |
| TWI282852B (en) * | 2005-10-26 | 2007-06-21 | Chi Mei Optoelectronics Corp | Detecting system for sensing a defect of a panel |
| TW200725015A (en) * | 2005-12-21 | 2007-07-01 | Chao-Chih Lai | LCD panel defect inspection system |
| KR100788823B1 (en) * | 2006-01-23 | 2007-12-27 | 한국원자력연구원 | Laser-Ultrasonic Apparatus and Method for Extracting Information of Surface-Breaking Crack |
| DE102006015714B4 (en) * | 2006-04-04 | 2019-09-05 | Applied Materials Gmbh | Light-assisted testing of an opto-electronic module |
-
2009
- 2009-05-20 KR KR1020107028192A patent/KR101610821B1/en active IP Right Grant
- 2009-05-20 JP JP2011510678A patent/JP5520289B2/en active Active
- 2009-05-20 CN CN200980118535.6A patent/CN102037371B/en active Active
- 2009-05-20 WO PCT/US2009/044667 patent/WO2009143237A1/en active Application Filing
- 2009-05-20 TW TW098116693A patent/TWI497060B/en active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4999577A (en) * | 1986-10-09 | 1991-03-12 | International Business Machines Corporation | Method for contactless testing of conducting paths in a substrate using photon-assisted tunneling |
| US5124635A (en) * | 1990-02-15 | 1992-06-23 | Photon Dynamics, Inc. | Voltage imaging system using electro-optics |
| US6233217B1 (en) * | 1997-08-30 | 2001-05-15 | Samsung Electronics Co., Ltd. | Optical pickup for recording/reproduction with a light emitting diode light source |
| US6529018B1 (en) * | 1998-08-28 | 2003-03-04 | International Business Machines Corporation | Method for monitoring defects in polysilicon gates in semiconductor devices responsive to illumination by incident light |
| US7065115B2 (en) * | 2002-10-16 | 2006-06-20 | Eastman Kodak Company | External cavity organic laser |
| US6833565B2 (en) * | 2002-12-20 | 2004-12-21 | Industrial Technology Research Institute | White-light led with dielectric omni-directional reflectors |
| CN101051619A (en) * | 2006-04-03 | 2007-10-10 | 三星电子株式会社 | Substrate check device and substrate check method |
| CN101055256A (en) * | 2006-04-10 | 2007-10-17 | 奥林巴斯株式会社 | Defect inspection apparatus |
Non-Patent Citations (1)
| Title |
|---|
| 双轴晶体薄膜光学隧道效应;张为权;《光子学报》;19990430;第28卷(第4期);360-363 * |
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