CN101964333B - 引线接合结构 - Google Patents

引线接合结构 Download PDF

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Publication number
CN101964333B
CN101964333B CN2010102289520A CN201010228952A CN101964333B CN 101964333 B CN101964333 B CN 101964333B CN 2010102289520 A CN2010102289520 A CN 2010102289520A CN 201010228952 A CN201010228952 A CN 201010228952A CN 101964333 B CN101964333 B CN 101964333B
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China
Prior art keywords
bond pad
semiconductor element
grafting material
wire
passivation layer
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Expired - Fee Related
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CN2010102289520A
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CN101964333A (zh
Inventor
艾伯特·吴
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Kaiwei International Co
Marvell International Ltd
Marvell Asia Pte Ltd
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Mawier International Trade Co Ltd
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Publication of CN101964333A publication Critical patent/CN101964333A/zh
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Abstract

本申请涉及引线接合结构。本公开的实施例提供了一种装置，该装置包括：半导体管芯；形成在半导体管芯上的接合焊盘，该接合焊盘包括铝(Al)；耦合到接合焊盘的包括金(Au)的接合材料，该接合材料覆盖接合焊盘的至少一部分；以及耦合到接合材料的引线，该引线包括铜(Cu)。可以描述和/或要求其他实施例。

Description

引线接合结构
技术领域
本公开的实施例涉及集成电路领域，更具体地，涉及引线接合结构以及相关制造过程。
背景技术
在集成电路的制造/装配中，铜线是用于引线接合应用的新兴技术。铜线不能与诸如铝之类的某些材料形成可靠的直接接合。例如直接形成在铜线与铝材料之间的引线接合在诸如温度、湿度和/或偏置测试之类的各种可靠性测试下，可能由于材料的很差的粘附性而失效。
在这一部分的描述是相关技术，并且不必包括在37 C.F.R.1.97和37C.F.R.1.98下公开的信息。除非特别申明为现有技术，否则不认为对相关技术的任何描述是现有技术。
发明内容
本公开提供了一种装置，该装置包括：半导体管芯；形成在半导体管芯上的接合焊盘，该接合焊盘包括铝(Al)；连接到接合焊盘的由金(Au)构成的接合材料，该接合材料覆盖接合焊盘的至少一部分；以及连接到接合材料的引线，该引线由铜(Cu)构成。
在各个实施例中，接合材料是形成在接合焊盘上的膜。
在各个实施例中，钝化层被形成在半导体管芯上，该钝化层被安置为覆盖接合焊盘的至少一部分。
本公开还提供了一种方法，该方法包括：在半导体管芯上形成接合焊盘，该接合焊盘由铝(Al)构成；沉积由金(Au)构成的接合材料以覆盖接合焊盘的至少一部分；以及将引线接合到接合材料，该引线由铜(Cu)构成。
在各个实施例中，执行沉积接合材料这一步骤以在接合焊盘上形成膜。
在各个实施例中，所述方法还包括对半导体管芯进行单个化(singulate)，其中沉积接合材料这一步骤是在对半导体管芯进行单个化之前执行的。
本公开还提供了一种半导体封装，该半导体封装包括：半导体管芯；形成在半导体管芯上的接合焊盘，该接合焊盘由铝(Al)构成；连接到接合焊盘的由金(Au)构成的接合材料，该接合材料覆盖接合焊盘的至少一部分；连接到接合材料的引线，该引线由铜(Cu)构成；以及通过引线电连接到半导体管芯的封装基板。
在各个实施例中，钝化层被形成在半导体管芯上，该钝化层被安置为覆盖接合焊盘的至少一部分。
在各个实施例中，形成模制化合物(mold compound)以包封半导体管芯和引线。
附图说明
通过下面结合附图的详细描述，将容易地理解本公开的实施例。为了使该说明简便，相似的标号表示相似的结构要素。在附图的各图中以示例的方式而不是限制的方式图示出这里的实施例。
图1示意性地示出了根据各个实施例的半导体封装。
图2示意性地示出了根据各个实施例的一种引线接合结构。
图3示意性地示出了根据各个实施例的另一引线接合结构。
图4是根据各个实施例的用于制造具有引线接合结构的半导体封装的一种方法的工艺流程图。
图5是根据各个实施例的用于制造具有引线接合结构的半导体封装的另一方法的工艺流程图。
图6是根据各个实施例的用于制造具有引线接合结构的半导体封装的又一方法的工艺流程图。
具体实施方式
本公开的实施例描述了引线接合结构以及相关的技术和配置。在下面的详细描述中，参考构成其一部分的附图，在所有附图中相似的标号表示相似的部分。应当理解的是，可以采用其他实施例，并且可以做出结构或逻辑上的改变，而不脱离本公开的范围。因此，下面的详细描述不是限制意义上的，实施例的范围由所附的权利要求及其等同物来限定。
描述可以使用基于透视的描述，例如上/下、后/前、之上/之下、在……上/在……下、在……下方和顶部/底部。这种说明仅仅用来使讨论简便并不是想要将这里描述的实施例的应用限制为任何特定的方向。
为了本公开的目的，短语“A/B”意味着A或者B。为了本公开的目的，短语“A和/或B”意味着“(A)、(B)或者(A和B)”。为了本公开的目的，短语“A、B和C中的至少一者”意味着“(A)、(B)、(C)、(A和B)、(A和C)、(B和C)或者(A、B和C)”。为了本公开的目的，短语“(A)B”意味着“(B)或者(AB)”，即，A为可选的要素。
以最有利于理解所要求保护的主题的方式，将各种操作依次描述为多个分立的操作。然而，描述的顺序不应当被解释为暗示这些操作必定是依赖于顺序的。具体地，可以不按呈现的顺序执行这些操作。可以按不同于所描述的实施例的顺序执行所描述的操作。在其他实施例中，可以执行各种其他操作和/或可以省略所描述的操作。
本说明书使用短语“在一个实施例中”、“在实施例中”或类似用语，每个短语可以指一个或多个相同或不同实施例。此外，结合本公开的实施例使用的术语“包括”、“包含”、“具有”等是同义的。
图1示意性地示出了根据各个实施例的半导体封装100。半导体封装100包括如图所示地耦合的半导体管芯102和封装基板104。通常使用诸如环氧树脂或银膏(silver paste)之类的粘合剂(未示出)将半导体管芯102物理附接到封装基板104。
半导体管芯102可以包括各种各样的集成电路器件中的任一种(未示出)。这些集成电路器件一般形成在半导体衬底的被称为“有源”侧的表面(例如，半导体管芯102的S1)上，其与“无源”侧(例如半导体管芯102的S2)相反。例如，半导体管芯102可以包括形成在半导体管芯102的有源侧(例如S1)上的晶体管或存储单元。半导体管芯102例如可以用作处理器或存储器。半导体管芯102不限于这些器件并且在其他实施例中可以包括其他器件。在一个实施例中，半导体管芯102包含硅。
封装基板104代表各种各样的封装基板。例如，封装基板104可以是引线框、印刷电路板或柔性电路。封装基板104不限于这些类型的基板并且在其他实施例中可以包括其他合适的封装基板。
一条或多条引线106将半导体管芯102与封装基板104电耦合，以提供去往和/或来自半导体管芯102的各种部件的电通路。例如，该一条或多条引线106可以用来为半导体管芯102提供输入/输出(I/O)信号或电力。该一条或多条引线106通常接合到半导体管芯102的接合焊盘、引脚或迹线，并且还接合到封装基板104的相应的接合焊盘、引脚或迹线。
区域108表示一个示例区域，在该区域，引线接合结构(例如图2的200或图3的300)形成在该一条或多条引线106与半导体管芯102的表面之间。结合图2的引线接合结构200和图3的引线接合结构300，更加详细地描述形成在区域108中的引线接合结构。根据各个实施例，该一条或多条引线106包含铜，例如包括铜合金。
形成诸如基于环氧的材料之类的模制化合物118以包封半导体管芯102，如图所示。模制化合物118通过包封半导体管芯102并将其保持到封装基板104上，保护半导体管芯102使其免于与潮湿或氧化相关联的缺陷并且提供更坚固、更耐用的柔性电路封装100。模制化合物118通常包括诸如环氧树脂之类的聚合物，但是用于模制化合物118的材料不限于此。在其他实施例中，可以使用其他合适的电绝缘材料来形成模制化合物118。
一个或多个结构(例如焊球120)可以用来进一步将封装基板104与诸如主板(未示出)或其他类型的电路板之类的其他电子器件电耦合。在其他实施例中可以使用将封装基板104与其他电子器件电耦合的其他类型的结构。
这里描述的实施例可以包括除了针对半导体封装100所描述的配置之外的引线接合配置。例如，在其他配置中，多个半导体管芯可以被耦合到封装基板104或彼此堆叠。
图2示意性地示出了根据各个实施例的引线接合结构200。引线接合结构200包括形成在半导体管芯202的表面(例如图1的S1)上的接合焊盘214。接合焊盘214通过一个或多个互连结构(例如216和218)电耦合到一个或多个集成电路器件220，例如晶体管。该一个或多个互连结构例如可以包括通孔型结构216和金属线218的交替层，其形成用来提供半导体管芯202的一个或多个集成电路器件220与接合焊盘214之间的电连接。
通过将导电材料沉积到半导体管芯202的表面来形成接合焊盘214。在一个实施例中，接合焊盘214包括铝(Al)。该导电材料可以使用各种沉积技术来沉积，这些沉积技术例如包括电镀、物理气相沉积(PVD)、化学气相沉积(CVD)和/或原子层沉积(ALD)。在其他实施例中，可以使用其他沉积技术来形成接合焊盘214。
接合焊盘214通常是在与制造半导体管芯(例如图1的102)相关的管芯制造工艺期间形成的。该管芯制造工艺包括各种沉积和图案化操作以在半导体晶片(未示出)上形成集成电路器件220和互连结构(例如216和218)。半导体晶片通常包括形成于其上的多个半导体管芯。
形成钝化层210以在半导体管芯202的表面(例如图1的S1)上提供保护涂层。例如沉积用于形成钝化层210的电绝缘材料以基本上覆盖半导体管芯202的表面。选择性地去除钝化层210的一些部分以在形成在半导体管芯202上的接合焊盘(例如接合焊盘214)之上的钝化层210中提供开口，从而允许一条或多条引线(例如引线206)附接到接合焊盘。在一个实施例中，钝化层210被安置为覆盖接合焊盘214的至少一部分，如图所示。钝化层210可以包括各种电绝缘材料，例如聚合物、氧化物或氮化物材料。在其他实施例中可以使用其他电绝缘材料。
接合材料212形成在接合焊盘214上以辅助接合焊盘214与引线206之间的接合。该引线包括诸如铜(Cu)之类的导电材料。根据各个实施例，接合材料212为包括金(Au)的导电材料。在其他实施例中，接合材料212包括钯、镍或其他金属。在一个实施例中，沉积包括金的接合材料212以在包括铝的接合焊盘214上形成膜。由金构成的接合材料212在铜引线与铝接合焊盘之间提供的接合比铜引线与铝接合焊盘之间的直接接合更加可靠。
在一个实施例中，接合材料212为基本上覆盖接合焊盘214而形成的膜，如图所示。接合材料212通常具有基本上均匀的厚度。接合材料212可以根据各种技术来沉积，这些技术包括电镀、物理气相沉积(PVD)、化学气相沉积(CVD)和/或原子层沉积(ALD)。在其他实施例中，可以使用其他沉积技术来形成接合材料212。
在一个实施例中，在沉积钝化层210之前沉积接合材料212。例如，可以在从半导体晶片对半导体管芯进行单个化之前，在与制造半导体管芯(例如图1的102)相关的管芯制造工艺期间沉积接合材料212。在一个实施例中，钝化层210至少部分地覆盖接合材料212和接合焊盘214或者与其交叠，如图所示。
引线206接合到接合焊盘214上的接合材料212以形成引线接合结构200。引线206可以用来将半导体管芯202的一个或多个集成电路器件220与半导体管芯202外部的诸如封装基板(如封装基板104)之类的电子器件电耦合。可以使用各种引线接合工艺(例如包括球形接合或楔形接合)来将引线206接合到接合材料212。在其他实施例中可以使用其他引线接合技术。通常在半导体管芯(例如图1的102)的单个化之后在制造半导体封装(例如100)的装配工艺器件对引线206进行接合。
图3示意性地示出了根据各个实施例的另一引线接合结构300。接合焊盘314形成在半导体管芯302的表面上，如图所示。
接合材料312形成在接合焊盘314上以辅助与引线306的接合。根据各种实施例，接合材料312包括金以辅助包含铝的接合焊盘314与包含铜的引线306之间的接合。在一个实施例中，使用包括金的球形结构(例如金球)形成接合材料312。例如，接合材料312可以是使用任何合适的金球接合或其他凸块产生技术形成的，以在金球与铝接合焊盘314之间形成接合。球接合技术通常提供具有无定形或球形形状(例如凸块)的接合材料312，如图所示。例如，当使用金球形成时，接合材料312可以具有基本上不均匀的厚度。
根据各个实施例，接合材料312例如是在半导体管芯(如图1中的102)的单个化之后的装配工艺期间沉积的。装配工艺通常包括与管芯单个化、管芯到封装基板的附接、引线接合和/或模制相关的操作。在一个实施例中，接合材料312用作缓冲结构，以保护半导体管芯302不受与用于将引线306电耦合到接合焊盘314的引线接合工艺相关的热能的影响。
引线306接合到接合材料312以形成引线接合结构300。形成钝化层310以保护半导体管芯302。根据各个实施例，在沉积接合材料312之前沉积钝化层310。钝化层310可以部分地与接合焊盘314的至少一部分交叠，如图所示。
半导体管芯302通常包括通过一个或多个互连结构(例如316和318)电耦合到接合焊盘314的一个或多个集成电路器件320。在各个实施例中，图3的引线接合结构300包括与针对图2的类似特征所描述的实施例相一致的特征。例如，一个或多个集成电路器件320、一个或多个互连结构(例如316和318)、半导体管芯302、接合焊盘314、钝化层310以及引线306可以与针对图2的相应特征(例如220、216、218、202、214、210和206)所描述的实施例相一致。
图4是根据各个实施例的用于制造具有引线接合结构(例如图2的200)的半导体封装(例如图1的100)的方法400的工艺流程图。在步骤402，方法400包括在半导体管芯(例如图1的102)上形成接合焊盘(例如图2的214)，该接合焊盘包括铝(Al)。接合焊盘例如是通过在半导体管芯的表面(例如图1的S1)上沉积导电材料而形成的。可以使用诸如光刻和/或蚀刻工艺之类的图案化工艺在半导体管芯的表面上提供所需图案以辅助接合焊盘材料的选择性沉积。接合焊盘可以电耦合到一个或多个在下方的互连结构，例如通孔结构或金属线。
在步骤404，方法400还包括沉积包括金(Au)的接合材料(例如图2的212)以覆盖接合焊盘的至少一部分。在一个实施例中，沉积接合材料以在接合焊盘上形成具有基本上均匀的厚度的薄膜。可以根据各种技术来沉积接合材料，这些技术包括电镀、物理气相沉积(PVD)、化学气相沉积(CVD)和/或原子层沉积(ALD)。在其他实施例中，可以使用其他沉积技术来形成接合材料。根据各个实施例，在半导体管芯上形成钝化层(例如在步骤406)和/或对半导体管芯进行单个化(例如在步骤408)之前进行沉积接合材料。
在步骤406，方法400还包括在半导体管芯上形成钝化层(例如图2的210)。可以通过各种技术来沉积钝化层。例如，电绝缘材料可以旋涂在容宿半导体管芯的晶片上，以在半导体管芯上提供基本上均匀厚度的涂层。钝化层可以包括各种材料，例如包括聚合物、氧化物或氮化物材料。钝化层通常被图案化以在接合焊盘上提供开口，从而允许引线耦合到接合焊盘。在一个实施例中，钝化层被形成为至少部分地覆盖形成在接合焊盘上的接合材料或者与形成在接合焊盘上的接合材料交叠。在其他实施例中，可以使用用于钝化层的其他材料和/或沉积技术。
在步骤408，方法400还包括对半导体管芯进行单个化。在多个半导体管芯形成在例如一个晶片衬底上的情况下，该晶片衬底被切割或者以其他方式进行单个化，以提供用于封装/装配的分立半导体管芯。对半导体管芯进行单个化可以使用例如激光或锯来执行，但是不限于这些技术。
在步骤410，方法400还包括将半导体管芯(例如图1的102)附接到封装基板(例如图1的104)。可以使用各种技术和材料来附接半导体管芯。例如，可以使用诸如环氧树脂或银膏之类的粘合剂将半导体管芯的表面(例如图1的S2)附接到封装基板。在其他实施例中，可以使用其他技术和/或材料来附接半导体管芯。
在步骤412，方法400还包括将引线(例如图2的206)接合到所沉积的接合材料，该引线包括铜(Cu)。可以使用任何合适的引线接合技术(例如包括球接合或楔形接合)将引线接合到该接合材料。可以使用氮气来提供如下环境：该环境减少或防止在与铜材料的引线接合期间可能形成的氧化物的形成。通常在引线与接合材料之间通过施加热能、压力和/或超声能量而形成接合或焊接。还可以根据类似的技术在引线与封装基板之间形成接合和焊接。
在步骤414，方法400还包括沉积模制化合物(例如图1的118)以包封半导体管芯。模制化合物可以通过任何合适的技术来沉积，以基本上覆盖半导体管芯(例如图1的102)的暴露区域并且粘附到封装基板(例如图1的104)的表面。模制化合物通常包括诸如环氧树脂之类的聚合物，但是不限于此。在其他实施例中可以使用其他用于模制化合物的材料。
通常，与框402、404和406相关的操作是在制造半导体管芯的管芯制造工艺期间执行的，与框408、410、412和414相关的操作是在使用半导体管芯形成半导体封装的装配工艺期间执行的。主题不限于此，并且方法400的操作和/或动作可以根据用于半导体管芯的工艺流程而在其他时间执行。
图5是根据各个实施例的用于制造具有引线接合结构(例如图3的300)的半导体封装(例如图1的100)的另一方法500的工艺流程图。在步骤502，方法500包括在半导体管芯(例如图3的302)上形成接合焊盘(例如图3的314)，该接合焊盘包括铝(Al)。
在步骤504，方法500还包括在半导体管芯上形成钝化层(例如图3的310)。钝化层被形成为覆盖接合焊盘的至少一部分。在步骤506，方法500还包括对半导体管芯进行单个化。
在步骤508，方法500还包括将半导体管芯(例如图1的102)附接到封装基板(例如图1的104)。可以使用任何合适的技术(包括使用环氧树脂或银膏作为粘合剂)来附接该半导体管芯，以将管芯物理地附接到封装基板。
在步骤510，方法500还包括沉积包括金(Au)的接合材料(例如图3的312)以覆盖接合焊盘的至少一部分。根据各个实施例，接合材料在接合焊盘上被沉积为球形金球。例如，可以使用球接合技术来沉积接合材料，以在接合焊盘上形成金材料的凸块。根据各个实施例，在半导体管芯的单个化(例如在步骤506)之后或在将半导体管芯附接到封装基板(例如在步骤508)之后通过沉积金球而形成接合材料。在另一实施例中，在形成钝化层(例如在步骤504)之后沉积接合材料。
在步骤512，方法500还包括将引线(例如图3的306)接合到所沉积的接合材料，该引线包括铜(Cu)。在一个实施例中，所沉积的接合材料为一缓冲结构，其保护半导体管芯不受与将引线接合到接合材料(例如在步骤512)有关的热能的影响。
在步骤514，方法500还包括沉积模制化合物(例如图1的118)以包封半导体管芯。可以利用任何合适的沉积技术来沉积模制化合物。
图6是根据各个实施例的用于制造具有引线接合结构的半导体封装的又一方法600的工艺流程图。在步骤602，方法600包括在半导体管芯(例如图3的302)上形成接合焊盘(例如图3的314)，该接合焊盘包括铝(Al)。
在步骤604，方法600还包括在半导体管芯上形成钝化层(例如图3的310)。钝化层被形成为覆盖接合焊盘的至少一部分。
在步骤606，方法600还包括沉积包括金(Au)的接合材料(例如图3的312)以覆盖接合焊盘的至少一部分。根据各个实施例，接合材料在接合焊盘上被沉积为球形金球。例如，可以使用球接合技术来沉积接合材料，以在接合焊盘上形成金材料的凸块。在一个实施例中，在半导体管芯的单个化(例如在步骤608)之前通过沉积金球而形成接合材料。例如，半导体管芯仍可以是晶片的一部分。在另一实施例中，在形成钝化层(例如在步骤604)之后沉积接合材料。
在步骤608，方法600还包括对半导体管芯进行单个化。可以使用任何合适的技术(例如包括锯切或者激光切割)对管芯进行单个化。
在步骤610，方法600还包括将半导体管芯(例如图1的102)附接到封装基板(例如图1的104)。可以使用任何合适的技术(包括使用环氧树脂或银膏作为粘合剂)来附接该半导体管芯，以将管芯物理地附接到封装基板。
在步骤612，方法600还包括将引线(例如图3的306)接合到所沉积的接合材料，该引线包括铜(Cu)。在一个实施例中，接合材料为一缓冲结构，其保护半导体管芯不受与将引线接合到所沉积的接合材料(例如在步骤612)有关的热能的影响。
在步骤614，方法600还包括沉积模制化合物(例如图1的118)以包封半导体管芯。可以利用任何合适的沉积技术沉积模制化合物。结合方法500和600所描述的操作可以与结合方法400所描述的实施例相一致。
虽然在这里示出并描述了某些实施例，但是预计可以获得相同目的的各种可供替换的和/或等效的实施例或实施方式可以代替所示出并描述的实施例，而不脱离本公开的范围。本公开意图覆盖这里讨论的实施例的任何改变和变化。因此，显然的是这里描述的实施例仅由权利要求及其等同物来限定。
本申请要求2009年5月26日递交的美国临时专利申请No.61/181,141的优先权，除了那些与本说明书不一致的部分(如果存在的话)之外，本申请的整个说明书为了各种目的而通过引用全部结合于此。

Claims (18)

1.一种引线接合装置，包括：
半导体管芯；
形成在所述半导体管芯上的接合焊盘，其中所述接合焊盘包括铝(Al)，并且其中所述接合焊盘包括第一部分和第二部分；
耦合到所述接合焊盘的接合材料，其中所述接合材料包括金(Au)，并且其中所述接合材料覆盖所述接合焊盘的第一部分但不覆盖所述接合焊盘的第二部分；
形成在所述半导体管芯上的钝化层，其中所述钝化层被安置为覆盖所述接合焊盘的第二部分；以及
耦合到所述接合材料的引线，其中，所述引线包括铜(Cu)。
2.如权利要求1所述的装置，其中，所述接合材料是形成在所述接合焊盘上的膜。
3.如权利要求2所述的装置，其中，所述接合材料在所述半导体管芯的单个化之前耦合到所述接合焊盘。
4.如权利要求2所述的装置，其中，所述膜至少部分地被形成在所述半导体管芯上的钝化层覆盖。
5.如权利要求2所述的装置，其中，所述膜具有基本上均匀的厚度。
6.如权利要求1所述的装置，其中，所述接合材料是使用球形金球形成的。
7.如权利要求6所述的装置，其中，所述接合材料在所述半导体管芯的单个化之后耦合到所述接合焊盘。
8.如权利要求2所述的装置，其中，所述钝化层不覆盖所述接合焊盘的第一部分。
9.如权利要求1所述的装置，其中，所述接合材料保护所述半导体管芯不受与用于将所述引线电耦合到所述接合焊盘的引线接合工艺有关的热能的影响。
10.一种引线接合方法，包括：
在半导体管芯上形成接合焊盘，其中所述接合焊盘包括铝(Al)，并且其中所述接合焊盘包括第一部分和第二部分；
在所述接合焊盘上沉积接合材料以使得所述接合材料覆盖所述接合焊盘的第一部分但不覆盖所述接合焊盘的第二部分，其中所述接合材料包括金(Au)；
将引线接合到所述接合材料，其中所述引线包括铜(Cu)；以及
在所述半导体管芯上形成钝化层，其中所述钝化层覆盖所述接合焊盘的第二部分。
11.如权利要求10所述的方法，其中，沉积接合材料包括：
沉积所述接合材料以在所述接合焊盘上形成膜。
12.如权利要求11所述的方法，还包括：
对所述半导体管芯进行单个化，其中沉积所述接合材料以形成膜这一步骤是在对所述半导体管芯进行单个化之前执行的。
13.如权利要求11所述的方法，还包括：
在所述半导体管芯上形成钝化层以至少部分地覆盖所述膜，其中沉积所述接合材料以形成膜这一步骤是在形成钝化层之前执行的。
14.如权利要求10所述的方法，其中，沉积接合材料包括在所述接合焊盘上沉积球形金球。
15.如权利要求14所述的方法，还包括：
对所述半导体管芯进行单个化，其中沉积所述球形金球这一步骤是在所述半导体管芯的单个化之后执行的。
16.如权利要求10所述的方法，其中，沉积接合材料这一步骤保护所述半导体管芯不受与将引线接合到所述接合材料有关的热能的影响。
17.一种半导体封装，包括：
半导体管芯；
形成在所述半导体管芯上的接合焊盘，其中所述接合焊盘包括铝(Al)；
耦合到所述接合焊盘的接合材料，其中所述接合材料包括金(Au)并且覆盖所述接合焊盘的至少一部分；
形成在所述半导体管芯上的钝化层，其中所述钝化层被安置为覆盖所述接合焊盘的至少一部分，并且其中所述钝化层在所述接合材料被耦合到所述接合焊盘之前形成在所述半导体管芯上；
耦合到所述接合材料的引线，其中所述引线包括铜(Cu)；以及
通过所述引线电耦合到所述半导体管芯的封装基板。
18.如权利要求17所述的半导体封装，还包括：
包封所述半导体管芯和所述引线的模制化合物。
CN2010102289520A 2009-05-26 2010-05-26 引线接合结构 Expired - Fee Related CN101964333B (zh)

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Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8093106B2 (en) * 2009-09-23 2012-01-10 Chipmos Technologies Inc. Method for manufacturing packaging structure
CN104810331B (zh) * 2015-03-10 2017-11-28 株洲南车时代电气股份有限公司 功率器件和生产其的方法
DE102018106560A1 (de) 2017-10-17 2019-04-18 Infineon Technologies Ag Drucksensorbauelemente und Verfahren zum Herstellen von Drucksensorbauelementen
US10249587B1 (en) * 2017-12-15 2019-04-02 Western Digital Technologies, Inc. Semiconductor device including optional pad interconnect

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1387681A (zh) * 1999-11-05 2002-12-25 爱特梅尔股份有限公司 具有可熔焊区和可细丝压焊区的金属再分布层

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3380155A (en) * 1965-05-12 1968-04-30 Sprague Electric Co Production of contact pads for semiconductors
US3642528A (en) * 1968-06-05 1972-02-15 Matsushita Electronics Corp Semiconductor device and method of making same
JPH0734449B2 (ja) * 1987-11-30 1995-04-12 三菱電機株式会社 半導体装置の電極接合部構造
US5132772A (en) * 1991-05-31 1992-07-21 Motorola, Inc. Semiconductor device having tape automated bonding (TAB) leads which facilitate lead bonding
US5248903A (en) * 1992-09-18 1993-09-28 Lsi Logic Corporation Composite bond pads for semiconductor devices
WO1998033217A1 (en) * 1997-01-24 1998-07-30 Rohm Co., Ltd. Semiconductor device and method for manufacturing thereof
US6329712B1 (en) * 1998-03-25 2001-12-11 Micron Technology, Inc. High density flip chip memory arrays
US6410435B1 (en) * 1999-10-01 2002-06-25 Agere Systems Guardian Corp. Process for fabricating copper interconnect for ULSI integrated circuits
KR100315158B1 (ko) * 2000-08-02 2001-11-26 윤덕용 비솔더 플립 칩 본딩용 고신뢰성 비전도성 접착제 및 이를이용한 플립 칩 본딩 방법
JP3640876B2 (ja) * 2000-09-19 2005-04-20 株式会社ルネサステクノロジ 半導体装置及び半導体装置の実装構造体
US6737353B2 (en) * 2001-06-19 2004-05-18 Advanced Semiconductor Engineering, Inc. Semiconductor device having bump electrodes
EP1367644A1 (en) * 2002-05-29 2003-12-03 STMicroelectronics S.r.l. Semiconductor electronic device and method of manufacturing thereof
US7547975B2 (en) * 2003-07-30 2009-06-16 Tdk Corporation Module with embedded semiconductor IC and method of fabricating the module
US7160797B2 (en) * 2004-05-12 2007-01-09 Kulicke And Soffa Industries, Inc. Method of bumping die pads for wafer testing
US7432536B2 (en) * 2004-11-04 2008-10-07 Cree, Inc. LED with self aligned bond pad
US20080265385A1 (en) * 2007-04-11 2008-10-30 Siliconware Precision Industries Co., Ltd. Semiconductor package using copper wires and wire bonding method for the same

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1387681A (zh) * 1999-11-05 2002-12-25 爱特梅尔股份有限公司 具有可熔焊区和可细丝压焊区的金属再分布层

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