CN101910050B - 相异材料上的纳米线生长 - Google Patents
相异材料上的纳米线生长 Download PDFInfo
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Abstract
本发明涉及在Si衬底(3)上生长III-V半导体纳米线(2)。受控垂直纳米线生长是通过在生长纳米线之前进行的向Si衬底的(111)表面提供III族或V族原子以提供III族或V族5表面终止层(4)的步骤而实现的。还提出了一种纳米结构化器件,其包括依照预定器件布局以有序图案生长在Si衬底(3)的(111)表面上并从Si衬底(3)的(111)表面突出的多个对齐的III-V半导体纳米线(2)。
Description
技术领域
本发明涉及硅上半导体纳米线的生长。具体而言,该发明涉及与Si衬底的表面正交突出的III-V半导体的生长。
背景技术
近几年来,对半导体纳米线的兴趣得到加强。纳米线也被称为纳米须、纳米棒和纳米柱等等。对于本申请来说,术语纳米线要被解释为处于基本处于一维形式并且即在其宽度或直径上具有纳米尺寸的结构。这种结构通常被称为纳米须、一维纳米元件、纳米棒、纳米柱、纳米管等等。尽管这些术语隐含细长形状,但是纳米线可具有例如金字塔形状。往往纳米线被认为具有不大于100nm的至少两个尺寸。然而,可行形成具有大约1μm的直径或宽度的纳米线。在纳米尺度上控制一维生长给组合材料、操纵机械和电磁两者的性能、以及设计新颖器件提供独特的机会。由于纳米线的受控一维生长而可以制作的有用器件之一是发光二极管(LED)。
Si上III-V半导体的外延生长呈现若干困难,诸如晶格失配、晶体结构的差别(III-V具有极性闪锌矿或纤锌矿结构,而Si具有共价金刚石结构)、热膨胀系数的巨大差别以及所谓的反相畴(anti-phasedomain)的形成。大多数工作是针对使用不同办法在Si上平面生长III-V材料以企图生长器件质量结构而完成的,例如参见S.F.Fang等人的Gallium-Arsenide and Other Compound Semicondutor on Silicon,Journal of Applied Physics 68,R31-R58(1990)进行回顾。
认识到从Si衬底生长出来的III-V半导体纳米线将由于纳米线和Si衬底之间的接合的小横截面而可能克服若干上面提及的问题。在许多系统中,纳米线在<111>方向上并且大多数通常在[111]B方向上生长。非垂直线从Si(111)衬底的生长通常被观测到,例如参见A.L.Roest等人的Position-controlled epitaxial III-V nanowires on silicon,Nanotechnology 17,(11),S271-S275(2006),并且造成过程控制方面的问题。从非极性Si(111)衬底可获得四个<111>方向,其中仅一个是竖直的,如图1a所图解的。在工业应用中,这可能妨碍高效的处理并降低有用部件的成品率。
发明内容
在Si衬底上产生III-V半导体的纳米线或纳米结构的现有技术方法需要改进以便可用于半导体器件的大规模生产。
本发明的目标是克服现有技术的缺陷。这是通过如独立权利要求中限定的方法和器件而实现的。
依据发明的一种产生纳米结构化器件的方法包括以下步骤:
-向Si衬底的(111)表面提供III族或V族原子以便提供III族或V族表面终止层(termination);以及
-从Si衬底的(111)表面生长至少一个III-V半导体纳米线。
在依据发明的方法的一个实施例中,该方法包括以下步骤:
-在预定升高的温度下提供III族或V族材料(诸如Ga或In)预流以提供III族或V族材料终止的Si(111)表面从而使得III族或V族材料扩散到生长催化剂粒子/Si界面中,并且在生长催化剂粒子/Si界面中形成III族或V族材料层;
-在高温下的短生长步骤以形成薄成核层;以及
-把温度降低到正常用于纳米线生长和执行轴向纳米线生长的温度状况。
在依据发明的方法的一个实施例中,多个纳米线依照预定器件布局以有序图案生长在(111)表面上。
根据发明的纳米结构化器件包括在Si衬底的(111)表面上生长的优选由III-V材料制成的多个半导体纳米线。纳米结构化器件的基本上所有纳米线与(111)表面正交地突出。优选地,纳米线依照预定器件布局以有序图案生长在Si衬底的(111)表面上。有序图案可为周期性图案。
由于该发明,可以在Si衬底上在仅一个预定方向上提供III-V纳米线。这种结构便于生长具有作为模板的纳米线的单畴聚结层或者便于制造用于电子、光电子、光子、发光二极管应用等等的半导体器件。
发明的实施例被限定在从属权利要求中。发明的其它目标、优点和新颖特征将通过当结合附图和权利要求被考虑时发明的以下详细描述而变得显而易见。
附图说明
现在将参考附图来描述发明的优选实施例,其中:
图1a示意性地图解从FCC(111)表面的四个可用<111>方向,其中在极性III-V(111)B表面的情况下箭头1指示<111>B方向而其它箭头表示<111>A方向;
图1b是根据现有技术方法在Si衬底的(111)表面上生长的GaP纳米线的顶视图;
图2示意性地图解根据发明的a)Si(111)表面、b)GaP(111)B表面(中间图)以及c)Si(111)上的顶部部位上的单层Ga原子如何提供类(111)B表面;
图3示意性地图解根据发明的a)其中催化剂粒子被放置在衬底上并且表面终止层完成的初始阶段以及b)在衬底的表面终止的Si(111)表面上生长的Si衬底上的垂直纳米线;
图4是根据本发明的产生纳米线的方法的流程图;
图5示意性地图解根据发明的导致纳米线从Si(111)表面优先在正交方向上突出的生长循环的示例;
图6是根据发明的包括III族或V族材料的预流和高温生长步骤的方法的实施例的流程图;
图7a是根据发明的从Si(111)表面生长的GaP/GaAs纳米线的扫描电子显微镜(SEM)图像,其中成品率在整个样品上接近100%;以及
图7b是纳米线的SEM图像,其中生长与光刻方法(在这种情况下为电子束光刻)成功地组合以产生与Si衬底的表面垂直突出的部位受控的纳米线阵列;
图8a示意性地图解根据发明的从纳米线生长的聚结层;
图8b是示出根据发明的GaP上且基于Si衬底上垂直纳米线的纳米线LED的SEM图像,其中接触层的边缘是可见的因此可以看到接触和未接触LED两者,示意性地图解器件结构并且在右上插图中的是来自从侧面看到的单个电探测的纳米线LED的光微图EL;
图9是a)GaP上生长的纳米线、b)Si上生长的纳米线、c)Si上生长的GaAs纳米线的有序阵列的SEM图像以及d)第一生长回合(run)的结构的示意图,作为用于光致发光(PL)测量的相同纳米线结构;
图10a-c是根据本发明的Si衬底上生长的纳米线的PL曲线图;以及
图11示出a)在GaP和Si上生长的GaAs LED的电致发光(EL)的功率相关性、b)来自基于GaP和Si的LED纳米结构的EL光谱、c)具有种子粒子的辐射图案、以及d)移除种子粒子的辐射图案。
具体实施方式
在许多半导体衬底上纳米线在<111>方向上并且大多数通常在[111)B方向上生长。然而,非垂直线从Si(111)衬底的生长通常被观测到并且造成过程控制方面的问题。如图1a中示意性地图解的,从非极性Si(111)衬底可获得四个<111>方向,其中仅一个(在图中被标为1)是垂直的,即与衬底成90°角度。为了本申请的目的,所解释的术语垂直被解释为纳米线在正交于衬底的方向上从衬底突出。术语垂直和与...正交、以及术语正交和与...垂直在整个申请中被可互换地使用。期望从衬底突出的垂直纳米线的100%成品率。尽管已论证了在Si上生长的高度对齐的垂直III-V纳米线,参见T.等人的Epitaxial III-V nanowires on silicon,Nano Letters 4,(10),1987-1990,2004,但是需要改进关于生长方向以及尤其是从光刻定义的金纳米粒子或生长催化剂粒子的竖直生长的大面积均匀性。第二挑战是实现纳米线在Si上以预定图案且在预定位置上的明确生长,并且还通过纳米线在与Si衬底的(111)表面垂直的[111]方向上被对齐而实现了这一点。图1b示出根据现有技术方法的在Si(111)上生长的GaP纳米线的典型示例,其中纳米线随机地在四个<111>方向突出。
尽管Si表面是非极性的(缺乏A和B侧),但是用一个单层III族或V族原子就足以分别将其转变成类(111)B或(111)A的表面。图2a和2b分别示意性地图解Si(111)表面和GaP(111)N表面的原子布置。图2c示意性地图解具有束缚到Si悬挂键的Ga原子的Si(111)表面的原子布置。观测到Si上的III族单层提供正常被称作III-V半导体的类B(V族)终止层,这可能有些违反直觉。
在使用金属有机物汽相外延(MOVPE)的生长之前预流金属有机前驱物(precursor)例如III族前驱物(诸如针对Ga的TMGa或针对In的TMIn)可以通过提供Ga原子终止层而提供另外非极性的Si表面“类(111)B”。与强烈优选沿[111]B方向的纳米线生长组合,这种表面将有助于垂直生长。
进一步的优点是纳米线的小横截面,其中生长一般被认为以每层一个单成核事件逐层进行。所谓的反相畴因而预期不会形成,原因在于它们要求每层两个或更多成核事件。而且,当在比如Si的金刚石结构材料的(111)晶面上生长纳米线时,小占位面积(footprint)与(111)B III-V纳米线的独特定向性能组合将抑制形成反相畴边界缺陷,这被认为是实现包括Si衬底的许多半导体器件的主要技术壁垒。
参考图3和图4,根据发明的产生纳米结构化器件的方法的一个实施例包括以下步骤:
-100向Si衬底3的(111)表面提供III族或V族原子以便提供III族或V族表面终止层4;
-110从Si衬底3的(111)表面生长至少一个III-V半导体纳米线2。
图3示意性地图解在纳米结构化器件的产生中的两个阶段。图3a示出在纳米线生长之前具有生长催化剂粒子10、具有表面终止层4的情形,并且图3b图解具有(111)表面的Si衬底3以及优选地从(111)表面在(111)方向上外延生长的垂直纳米线2。最终纳米结构化器件可包括生长催化剂粒子10例如Au粒子,或者可选地生长催化剂粒子10可以被移除。此外,可以使用不要求金属生长催化剂粒子10的生长方法。
根据发明的方法所形成的结构的一个重要特征是如所提及的那样Si(111)表面和纳米线之间的角度α大约为90°,如图3b中所图解的。由于该发明,在与Si衬底正交的方向上生长至少一个纳米线的确定性得以改进。而且,在生长大量纳米线时,该方法提供关于生长方向的高成品率,即基本上所有纳米线都与Si衬底的(111)表面正交地突出。
如本领域的技术人员所明白的,角度α可能由于例如在初始纳米线生长中的无序化、缺陷、应变等等而略微偏离90°。在一个实施例中,所述基本上所有纳米线3的优选至少95%、更优选100%与Si衬底的(111)表面所成的角度α为90°±5。在另一个实施例中,所述基本上所有纳米线(505)的至少90%、优选至少95%、更优选100%与Si衬底的(111)表面所成的角度(550)为90°±2.5。另外,Si衬底可以这样的方式进行切割:该表面不遵循Si材料的(111)平面。从而,从Si衬底的表面突出的纳米线可与表面成不同的角度。
参考图5和图6,依据本发明的方法的一个实施例包括:
-100通过120在预定升高的温度下提供III族或V族材料预流以提供III族或V族材料终止的Si(111)表面从而使得III族或V族材料扩散到生长催化剂粒子/Si界面中并且在生长催化剂粒子/Si界面中形成III族或V族材料层,向Si衬底3的(111)表面提供III族或V族原子以便提供III族或V族表面终止层4;
-130在高温下的短生长步骤以形成薄成核层;
-140把温度降低到正常用于纳米线生长和执行轴向纳米线生长的温度状况(regime);以及
-110从Si衬底3的(111)表面生长至少一个III-V半导体纳米线2。
图5示意性地图解上面概述的被成功用来产生纳米线的生长循环的一种实施方式,其中接近100%在竖直[111]方向上生长,如图7所示。在100毫巴(mbar)氢气气氛下温度斜升到625℃。在退火10分钟后,施加5s TMGa预流以提供类Si(111):B表面并且产生金-镓合金。随后,引入TMGa和PH3长达10s以生长具有(111)B定向的薄GaP成核层。随后,在PH3流下把温度降低到475℃。通过使用与在III-V(111)B衬底上相同的生长条件,可以实现高质量的例如GaP或GaAs的纳米线生长,如图7a所示。使用这种成核方法,也可以使用具有良好结果的光刻图案化,如图7b所示。Si衬底上的III-V纳米线的位置和方向的控制是为在Si上成功制造光学器件以及其中Si衬底有利的大多数其它纳米线应用而所需的关键参数。
在高温下的短生长步骤也被Tateno等人的Vertical GaPnanowires arranged at atomic steps on Si(111)substrate,AppliedPhysics Letters 89,(3),033114(2006)使用,但是其功能没被进一步讨论并且III族预流未被使用。
可通过成核和随后的纳米线生长的以下过程来总结上面的考虑。
(i)在升高的温度下提供Ga预流以提供Ga终止的Si(111)表面。
a.精确温度和时间将针对不同的列III材料而变化,因为需要满足两个不同的机制:
i.Ga(III元素)到生长催化剂粒子/Si界面中的扩散
ii.Ga层在生长催化剂粒子/Si界面中的形成
(ii)在高温下的短生长步骤以形成薄GaP(111)B成核层
(iii)把温度降低到正常用于纳米线生长和执行轴向纳米线生长的温度状况。
该过程也应用于其它III族或V族材料,并且在In的情况下其将包括以下步骤。
(i)在升高的温度下提供In预流以提供In终止的Si(111)表面。
a.精确温度和时间将针对不同的列III材料而变化,因为需要满足两个不同的机制:
i.In(III元素)到生长催化剂粒子/Si界面中的扩散
ii.In层在生长催化剂粒子/Si界面中的形成
(ii)在高温下的短生长步骤以形成薄GaP(111)B成核层
(iii)把温度降低到正常用于纳米线生长和执行轴向纳米线生长的温度状况。
由于仅在要生长纳米线的位置处需要Ga或In,可能期望其仅被注入到金中。这可以通过在一温度下引进金属有机分子来实现,该温度低于分子的裂解(crack)温度但是高得足以使其可以用作为催化剂的金进行高效裂解。气流可以在MOCVD反应器中以很高的精度被控制,使得这个过程完全可复制且均匀的。图3a中的图解示出其中该终止层覆盖整个衬底表面的一个实施例,然而该发明不限于此。
在包括铟的表面终止层过程的示例中,衬底被加热到350℃并且暴露于TMIn流长达2分钟。此后,衬底被加热到650℃并且在所述升高的温度下保持10分钟以通过把In扩散到生长催化剂粒子内来实现Si(111)表面的In终止层。随后,通过引入5秒的TMGa流接着是10秒的TMGa和AsH3两者的流,来生长GaAs成核层。然后,衬底温度被降低到475℃,保持AsH3流。当实现475℃的较低温度时,通过除了AsH3之外引入TMGa长达4到8分钟,启动垂直纳米线的生长。然后该结构在连续的AsH3流中被缓慢冷却到室温。
如本领域的技术人员显而易见的且如上面讨论的,Ga或In以及在生成催化剂粒子/Si界面中Ga或In终止层的形成是关于材料的非限制示例。
利用这种方法,也可以实现在任何蚀刻的或以其它方式制造的(111)表面(例如(001)Si衬底上的蚀刻脊)上的纳米线的明确生长。
该方法可转移到在其它金刚石结构衬底比如Ge和C等等上的III-V纳米线生长。
根据发明的方法可以与各种图案化技术组合,并且提供用于在Si(111)表面上提供精确定位的竖直III-V纳米线的独特办法。
根据本发明的纳米结构化器件包括在Si衬底3的(111)表面上生长的优选地由III-V材料制成的多个半导体纳米线2,其中基本上所有纳米线3与(111)表面正交地突出。优选地,所述基本上所有纳米线2是在(111)B方向上生长的。
如上面指示的,精确定位单独纳米线或多个纳米线的能力在许多应用中必不可少的例如以便能够制造用于电子、光电子、光子、发光二极管应用等等的半导体器件。另外,优选地所有纳米线应当从衬底表面以相同的方向进行定向。在根据本发明的纳米结构化器件的一个实施例中,纳米线依照预定器件布局以有序图案生长在(111)表面上。
每个纳米线2可定位在Si衬底3的(111)表面上的预定位置,其中与预定位置的位置偏差不大于纳米线直径的一半,优选地不大于纳米线直径的20%,更优选地不大于纳米线直径的5%,仍更优选地不大于直径的1%。
图7示出基本上所有纳米线可以在与(111)表面正交的方向上生长。在根据本发明一个实施例的纳米结构化器件中,纳米线的至少90%、优选地至少95%、更优选地99%、仍更优选地100%与(111)表面正交地突出。如上面所指示的,纳米线与衬底表面的角度α可略微偏离90°。
在根据本发明的纳米结构化器件的一个实施例中,纳米线以周期性图案生长在(111)表面上。
在根据本发明的方法的另一个实施例中,纳米结构化器件包括从纳米线2生长的聚结层20。参考图8a,从衬底突出的多个垂直对齐的纳米线2可以被用作用于再生长连续III-V半导体层的模板。在Si上生长的连续III-V半导体层往往展现出大量的反相畴。在本发明中,对于所有纳米线而言单独纳米线的优先(111)B定向生长以及在两个Si fcc子晶格的仅一个上的仅一个子材料的初始成核将确保所有这些纳米线共享相同的晶体方向(或相),以便从若干纳米线聚结的半导体层不展现出反相畴,即聚结层20是基本上单畴的。优选地,聚结层生长在以周期性图案生长的纳米线上。
根据发明的纳米结构化器件的一个实施例是纳米线LED,其中纳米线是包括pn或pin结以便产生光的LED结构的一部分。
在本发明的一种实施方式中,制造基于GaAs纳米线、外延生长的Si衬底的垂直发光二极管(LED)。为了比较起见,在GaP衬底上制造对应的LED。建立了关于这两种衬底的LED功能。这些结构就温度相关的光致发光(PL)、电致发光(EL)和辐射图案方面进行了评价。集成在Si平台上的这种纳米尺度光源可为将来的纳米光子学和芯片上光学通信起主要作用。
每个LED结构是围绕直接生长在GaP或Si上的GaAs NW芯构建的。每个单GaAs NW充当这些单独纳米尺寸的p-i-n发光结构中的有源区。
图8b所示的LED结构是p-i-n二极管结构。衬底3是每个器件的组成部分,因为其用作公共p层。根据纳米线2所生长的衬底3,这更改LED结构中的半导体材料的特定顺序:
-在GaP上结构顺序是:p-GaP(衬底3)/i-GaP(第一纳米线段13)/i-GaAs(第二纳米线段14)/i-InGaP(包层15)/n/InGaP(帽16)。
-在Si上结构是:p-Si(衬底3)/i-GaP(第一纳米线段13)/i-GaAs(第二纳米线段14)/i-InGaP(包层15)/n-InGaP(帽16)。
纳米线基底中的i-GaP(纳米线)层在两个器件中都为大约60nm厚并且用于改进生长质量的成核段和电阻阻挡层的双重目的。使用的金属有机源是TMGa和TMIn以及作为前驱物气体的AsH3、PH3和Si2H6。采用两个生长步骤。首先,使用具有粒子密度1/μm2的随机沉积的60nm直径nm大小的Au气溶胶通过粒子辅助生长而在p型GaP(111)B(p=~1018cm-3)和Si(111)(p≈1015cm-3)衬底上生长2μmGaAs/GaP纳米线。纳米线用标称上与GaAs晶格匹配的40nm厚的径向InGaP包层覆盖。在这个步骤后,卸下样品以进行光致发光表征或纳米线LED的随后制造。80nm厚的SiO2沉积到样品上。SiO2被回蚀刻回到仅覆盖衬底表面并且高达纳米侧的大约1μm。然后样品被再装载到MOVPE反应器中并且径向Si掺杂的InGaP层被选择性地生长在GaAs/InGaP芯结构的上部上。LED结构用150-300nm厚的200×200μm2方形Ni/Ge/Au接触部17完全覆盖,每个接触部17覆盖大约40000个单独纳米线LED结构。图8示出该结构的示意性横截面图和扫描电子显微镜(SEM)图像。这些器件上的不透明接触部17将吸收大部分输出光,原因在于10nm Au在850nm的波长下吸收大约40%。p接触用导电Ag胶被制造在衬底的背面上。其它接触的手段在本领域中是已知的并且容易被采用于本方法和器件。
Si和GaP器件之间的一个重要区别是在纳米线基底中的异质结构顺序,在GaP衬底上为p-GaP(体)/i-GaP(纳米线)/i-GaAs而在Si衬底上为p-Si(体)/i-GaP(纳米线)/i-GaAs(纳米线),其中空穴注入条件和内部电阻两者应当预期在这两个结构之间显著不同。
图9a-c描绘在第一MOVPE步骤后的纳米线LED结构。它们是具有薄InGaP包层和在纳米线基底中的GaP成核段以及具有仍附着到顶部的基于Au的种子粒子的GaAs纳米线。这种结构也被转移到中性衬底以进行PL表征。如图9所示,关于依据本发明的方法的生长方向的成品率在GaP和Si衬底两者上为基本100%,即在Si上这些种类的纳米线结构的制造方法被改进如下程度:基本上所有纳米线是均匀对齐的与衬底垂直的(111)方向并且基本没有纳米线在也从衬底延伸出来的三个倾斜(111)方向上生长。此外,通过利用发明的方法,这是首次实现在Si衬底上以预定有序图案的III-V垂直纳米线的生长阵列,如图9c所看到的。这些衬底生长的纳米线的位置和方向的控制是为成功制造光学器件以及大多数其它应用而所需的关键参数。图9d示意性地图解LED结构,其包括Si(111)/GaP(111)B衬底3、作为第一纳米线段13的GaP成核层、作为第二纳米线段14的GaAs纳米线芯、InGaP包层15和Au种子粒子10。
在根据发明的作为纳米线LED的纳米结构化器件的一个实施例中,pn或pin结的p或n区之一至少部分地在衬底3中。
在根据发明的作为纳米线LED的纳米结构化器件的一个实施例中,每个纳米线2至少部分地被包围在帽层16中并且pn或pin结的n或p区至少部分地在帽层16中。
在根据发明的作为纳米线LED的纳米结构化器件的一个实施例中,纳米结构化器件包括形成在纳米线2之间的公共p区和n区。
光致发光(PL)测量是在室温下和在10K的温度下实施的。以473nm发射的激光器被用作激发源。PL由光学显微镜收集、通过光谱仪被分散并且通过由液氮冷却的CCD照相机检测。
为研究来自纳米线的没有衬底影响的PL,纳米线被折断并且从它们所生长的衬底中被转移,并然后沉积在图案化的Au表面上。以此方式,纳米线也可以被单独地研究。在10K下从刚生长的纳米线中采集的PL光谱对于从Si衬底生长的纳米线和从Si衬底生长的纳米线以及从GaP衬底生长的纳米线而言是类似的。来自单独纳米线的光谱示出较大差别,其中从GaP衬底生长的纳米线被更多结构化。来自从Si生长的纳米线的平均PL强度大约是从GaP生长的对应纳米线的平均PL强度的1/20。这与所看到的Si-LED的EL是GaP-LED相1/30-1/10相当吻合。在室温下,光谱宽且无特征并且在来自这两个样品的纳米线之间存在很小的光谱差别。
在GaAs纳米线中的相对低的发光效率先前已被报导并且归因于堆垛层错。减小GaAs芯和径向生长的InGaP层之间的晶体晶格应变对于图10的PL强度非常重要。在GaP和Si表面上的寄生生长和In和Ga材料的单独扩散长度有很大不同,要求在衬底之间的、在这个研究中不能完全执行的单独制造优化。
在GaP上和在Si上的LED两者都展示了在施加正向偏压时的电致发光。光的光谱峰值与GaAs带隙能量相当吻合。
如图10a和b中所看到的,示出基于Si和基于GaP的LED的光功率/电流相关性。GaP上的LED在Si(40mA)的一半电流负载(20mA)时点亮并且在60mA时在GaP衬底上功率输出为大约30倍。然而,在100mA时功率比下降到基于Si的LED的功率比的10倍。示出了这两个器件的80mA负载的EL光谱峰值。与GaP衬底器件相比,Si LED峰值示出略微红移以及具有可能在1.35eV周围的额外峰值的尾部。峰值的偏移可以通过GaP和Si上的不同In和Ga扩散而导致不同的InGaP组分进行解释。通过使器件变到更大电流,对于GaP器件可以看到大约140mA的峰值功率。这在Si器件上从未看到并且可为非辐射复合或竞争泄露机制在这些电流水平下仍然主导EL的指示。
图11a示出在GaP和Si上生长的GaAs LED的电致发光的功率相关性的图示并且图11b示出在80mA下来自基于GaP和Si的二极管的EL光谱。
在分别如图11c和d的图示中示出的、其中种子粒子仍然被附着的器件的辐射图案和在顶部没有Au粒子的器件的辐射图案之间存在明显的区别。这是有意义的,因为这些结构具有厚度是种子粒子大小的两倍的金属接触部。这明显示出种子粒子的移除可为优选的,在其中光的垂直提取是重要的器件中尤其如此。
虽然关于当前认为是最切合实际且优选的实施例描述了发明,但是要理解,发明不限于所公开的实施例,相反其旨在覆盖所附权利要求内的各种修改和等效布置。
Claims (15)
1.一种从Si表面生长至少一个III-V半导体纳米线(2)的方法,其中III-V半导体纳米线(2)是通过粒子辅助生长而生长的,其中该方法包括以下步骤:
-(120)在预定升高的温度下提供III族材料预流以使得III族材料扩散到生长催化剂粒子(10)中从而提供类(111)B的III族材料终止的Si表面;
-(130)在高温下引入III族材料和V族材料前驱物以生长具有(111)B定向的薄III-V成核层;以及
-(140)把温度降低到正常用于纳米线生长的温度状况;以及
-(110)从该成核层生长所述至少一个III-V半导体纳米线(2)。
2.根据权利要求1的方法,其中该方法包括以下步骤:
-在预定升高的温度下提供Ga材料预流以使得Ga扩散到生长催化剂粒子(10)中从而提供类(111)B的Ga终止的Si表面;以及
-在高温下引入Ga材料和P材料前驱物以生长薄GaP(111)B成核层;
-把温度降低到正常用于纳米线生长的温度状况;以及
-(110)从该成核层生长所述至少一个III-V半导体纳米线(2)。
3.根据权利要求1的方法,其中该方法包括以下步骤:
-在预定升高的温度下提供In材料预流以使得In扩散到生长催化剂粒子(10)中从而提供类(111)B的In终止的Si表面;以及
-在高温下引入Ga材料和As材料前驱物以形成薄GaAs(111)B成核层;
-把温度降低到正常用于纳米线生长的温度状况;以及
-(110)从该成核层生长所述至少一个III-V半导体纳米线(2)。
4.根据权利要求1的方法,其中多个III-V半导体纳米线(2)从成核层生长,并且该方法还包括(150)从多个III-V半导体纳米线(2)生长半导体聚结层(20)以致该聚结层(20)基本上是单畴的步骤。
5.根据权利要求1-4中任一项的方法,其中Si表面是Si(111)表面。
6.一种纳米结构化器件,包括在Si衬底(3)的Si(111)表面上生长的多个III-V半导体纳米线(2),其特征在于基本上所有III-V半导体纳米线(2)与Si(111)表面正交地突出,其中每个III-V半导体纳米线(2)包括在纳米线基底处的具有(111)B定向的III-V成核层。
7.根据权利要求6的纳米结构化器件,其中所述基本上所有III-V半导体纳米线(2)在(111)B方向上生长。
8.根据权利要求7的纳米结构化器件,其中纳米线(2)依照预定器件布局以有序图案生长在(111)表面上。
9.根据权利要求7的纳米结构化器件,其中所述基本上所有III-V半导体纳米线(2)与Si衬底的(111)表面所成的角度α为90°±5°。
10.根据权利要求9的纳米结构化器件,其中所述基本上所有III-V半导体纳米线(2)与Si衬底(3)的(111)表面所成的角度α为90°±2.5°。
11.根据权利要求6的纳米结构化器件,还包括从III-V半导体纳米线(2)生长的聚结层,其中该聚结层基本上是单畴。
12.根据权利要求6的纳米结构化器件,其中成核段是大约60nm厚。
13.一种电子或光电子器件,包括根据权利要求6的纳米结构化器件。
14.一种光子器件,包括根据权利要求6-12中任一项的纳米结构化器件。
15.一种LED器件,包括根据权利要求6-12中任一项的纳米结构化器件,其中纳米线(2)是包括pn或pin结的以便产生光的LED结构的一部分。
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KR20100087727A (ko) | 2010-08-05 |
CN101910050A (zh) | 2010-12-08 |
KR101541560B1 (ko) | 2015-08-03 |
US20120145990A1 (en) | 2012-06-14 |
US9012887B2 (en) | 2015-04-21 |
WO2009054804A1 (en) | 2009-04-30 |
US8084337B2 (en) | 2011-12-27 |
EP2200934A1 (en) | 2010-06-30 |
EP2200934A4 (en) | 2012-10-17 |
US20100252808A1 (en) | 2010-10-07 |
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