CN101872748B - 半导体装置以及半导体装置的制造方法 - Google Patents

半导体装置以及半导体装置的制造方法 Download PDF

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CN101872748B
CN101872748B CN201010170101.5A CN201010170101A CN101872748B CN 101872748 B CN101872748 B CN 101872748B CN 201010170101 A CN201010170101 A CN 201010170101A CN 101872748 B CN101872748 B CN 101872748B
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fastener
semiconductor device
semiconductor
semiconductor chip
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CN101872748A (zh
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芳我基治
安永尚司
糟谷泰正
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Rohm Co Ltd
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Rohm Co Ltd
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Abstract

本发明涉及半导体装置以及半导体装置的制造方法，半导体装置包含：半导体芯片；与上述半导体芯片接合的固体板；以及介于上述半导体芯片与上述固体板之间、并由BiSn系材料构成的接合件，其中，上述接合件具有用于提高上述半导体芯片与上述固体板之间的热传导性的由Ag构成的热传导通路。

Description

半导体装置以及半导体装置的制造方法
技术领域
本发明涉及半导体装置以及其制造方法。
背景技术
一直以来，从环境负荷的观点出发，需要降低半导体装置中铅的使用量。例如，在2006年7月施行的RoHS(Restriction of Hazardous Substances)指令等中进行了倡导。
在半导体装置中，例如，SOP(Small Outline Package，小外形封装)、QFP(Quad Flat Package，方型扁平式封装)中的外引线的外装电镀、BGA(Ball Grid Array，球栅阵列)中的焊球等在装置外部使用的外部构成件、以及封装内部中的半导体芯片的接合件等在装置内部使用的内部构成件要使用铅。
关于外部构成件，通过代替材料的研究，已大致实现了铅含有量为一定比率以下的无铅化。与此相对，关于内部构成件还没有适合代替的材料。因此，例如使用95Pb-5Sn(铅含有量95wt％)等铅含有率高的金属。
在作为内部构成件的代替材料而评价各种组成的金属材料的过程中，关注于将环境负荷小的铋作为代替材料的选择之一。铋例如满足在装置内部使用的接合件所需的熔点及接合性，此外还满足环境负荷的各种特性。
但是，铋的热传导率(约9W/m·K)低于铅的热传导率(约35W/m·K)。因此，如果仅使用铋，则会发生难以放出在半导体芯片中产生的热这样的不便。
发明内容
本发明的目的是提供既能够充分确保半导体芯片的放热性、又能够实现半导体芯片接合件的无铅化的半导体装置以及其制造方法。
本发明一实施方式的半导体装置包含：半导体芯片、接合上述半导体芯片的固体板、以及介于上述半导体芯片和上述固体板之间并由BiSn系材料构成的接合件，上述接合件具有用于使上述半导体芯片与上述固体板之间的热传导性提高的由Ag构成的热传导通路。
根据此结构，接合半导体芯片和固体板的接合件由BiSn系材料构成，所以能够实现接合件的无铅化。
此外，半导体芯片与固体板之间能够通过由Ag构成的热传导通路来可热传导地连接。由此，在半导体芯片与固体板之间容易传递热。因此，在半导体芯片中产生的热可经由热传导通路以Ag的热传导率传递到固体板上。因此，能够充分确保半导体芯片的放热性。
另外，在上述接合件中的与上述半导体芯片以及/或上述固体板的界面附近，优选形成由Sn-Ag合金构成的金属层。
在该结构中，在结合件中的与半导体芯片和/或上述固体板的界面附近，形成有由Sn-Ag合金构成的金属层。Sn-Ag合金对金属的润湿性比BiSn系材料的润湿性优异。因此，通过该金属层，可以使结合件与半导体芯片和/或固体板的结合强度提高。
此外，所述结合件中的Sn的含有量优选超过0wt％且在4wt％以下。
虽然Sn是容易与Ag合金化的金属，但是如上所述，若结合件中的Sn的含有量在上述范围，则能够抑制有助于形成热传导通路的Ag的不需要的合金化。其结果，能够高效地形成热传导通路。
此外，因为含有Bi(熔点：约270℃)比Sn(熔点：约232℃)多，所以可以使结合件保持比较高的熔点。因此，在安装半导体装置时的软熔(reflow)时，能够发挥优异的耐软熔性。
这样的半导体装置例如可通过如下的半导体装置制造方法来制造，该半导体装置具有半导体芯片以及与该半导体芯片接合的固体板，该制造方法包含以下工序：在上述半导体芯片以及上述固体板的至少一方的与另一方接合的接合面上形成由Ag构成的镀层的工序；在上述镀层形成后，在上述半导体芯片与上述固体板之间夹着由Sn含有量超过0wt％并在4wt％以下的BiSn构成的接合件的工序；以及通过热处理经由上述接合件接合上述半导体芯片与上述固体板的工序。
根据此方法，在半导体芯片的接合面以及/或固体板的接合面上形成由Ag构成的镀层后，在半导体芯片与固体板之间夹着由Sn含有量超过0wt％并在4wt％以下的BiSn构成的接合件，之后进行热处理。通过执行上述工序，可以在结合材料上形成从镀层到另一接合面的Ag网(网状组织)。通过该Ag网可提高半导体芯片与固体板之间的热传导性。
并且，根据利用此制造方法获得的半导体装置，因为接合件由BiSn系材料构成，所以能够实现接合件的无铅化。
此外，半导体芯片和固体板之间由Ag网连接，所以在它们之间容易传递热。因此，能够将在半导体芯片上发生的热经由Ag网以Ag的热传导率传递到固体板上。从而能够充分确保半导体芯片的放热性。
另外，形成上述镀层的工序优选是在上述半导体芯片的上述接合面以及上述固体板的上述接合面双方形成上述镀层的工序。
在此方法中，在半导体芯片的接合面以及固体板的接合面双方形成镀层。因此与仅在某一个接合面上形成镀层的情况相比，能够扩大Ag网的密度。结果，能够提高半导体芯片的放热性。
另外，在上述半导体装置中，上述固体板可以是由金属构成的引线框架(lead frame)的岛(island)。
在此结构中，因为固体板是由金属构成的岛，所以能够容易地实施Ag电镀，并能够根据该Ag电镀来形成热传导通路。
参照附图，利用下面叙述的实施方式的说明，使本发明中的上述目的或其他目的、特征以及效果更加清楚。
附图说明
图1是本发明一实施方式的半导体装置的示意剖视图。
图2A～图2D是按照工序顺序示出图1所示的半导体装置的制造方法的图。
图3是本发明变形例的半导体装置(QFN类型)的示意剖视图。
图4是实施例1的半导体装置的SEM照片。
图5是实施例2的半导体装置的SEM照片。
图6是实施例3的半导体装置的SEM照片。
图7是实施例4的半导体装置的SEM照片。
图8是比较例1的半导体装置的SEM照片
图9是比较例2的半导体装置的SEM照片。
图10是比较例3的半导体装置的SEM照片。
具体实施方式
以下，参照附图对本发明的实施方式进行详细说明。
图1是本发明一实施方式的半导体装置的示意剖视图。
半导体装置1是应用了QFP的半导体装置1。半导体装置1具备：半导体芯片2、作为与半导体芯片2接合的固体板的裸片焊盘(die pad)3、与半导体芯片2电连接的多个引线4以及将它们密封的树脂封装5。
在半导体芯片2的内部装备有多个功能元件。半导体芯片2例如形成为300～400μm厚的四角板状，与功能元件电连接的布线焊盘(未图示)朝厚度方向的一个面21露出。另外，在半导体芯片2的另一面22上例如形成含有Au、Ni、Ag等的背面金属(13)。
在该背面金属13上形成由Ag构成的芯片镀层6。芯片镀层6的厚度例如是0.1～2.0μm。
裸片焊盘3例如由0.1～5.0mm厚的Cu薄板构成，形成为四角状。在裸片焊盘3厚度方向的一个面31上形成有由Ag构成的焊盘镀层7。焊盘镀层7的厚度例如是1.0～10.0μm。
并且，半导体芯片2以及裸片焊盘3在另一面22和一个面31作为接合面相互对置的状态下，通过接合件8介于另一面22和一个面31之间来相互接合。即，半导体芯片2以一个面21朝上的姿势支持在裸片焊盘3上。
接合件8由BiSn系材料构成。BiSn系材料是主要含有BiSn的材料。为了传递半导体芯片2裸片焊盘3间的热、提高接合件8的机械物性、提高接合件8的熔点调节以及接合件8的润湿性等这样的目的，BiSn系材料除了主成分BiSn之外，例如还可以含有Ag、Sn、Co、Cu、Au、Ni、Zn等副成分。这些副成分可单独含有，或者以多个金属合金化后的状态含有。
如上所述，在接合件8中一定含有Sn，BiSn成分中Sn的含有量例如超过0wt％，为4wt％以下，优选为1～3wt％，最好为1.5～2.5wt％。
作为上述副成分，接合件8具有作为与芯片镀层6以及焊盘镀层7双方接触的热传导通路的Ag网9。在Ag网9中，多个Ag细线以蜘蛛网状分布，并达到接合件8的几乎整个区域。理想状态下，在半导体芯片2和裸片焊盘3之间，通过该Ag网9以Ag的热传导率(约425W/m·K)来可热传导地连接。
另外，接合件8在芯片镀层6以及焊盘镀层7的界面附近具有由Sn-Ag合金构成的合金层10来作为副成分。合金层10可以在芯片镀层6以及焊盘镀层7双方的界面附近的整个区域内形成，也可以部分地形成。
并且，如上所述的接合件8的熔点例如是260～270℃，最好是260～263℃。
引线4由与裸片焊盘3相同的Cu薄板(例如，为0.1～5.0mm厚)构成，在与裸片焊盘3的各个侧面垂直的各方向上的两侧分别设置有相同数量的引线。与裸片焊盘3的各侧面对置的引线4在与该对置的侧面平行的方向上以等间隔进行配置。各引线4一体地具备利用树脂封装5来密封的内引线41和从树脂封装5露出的外引线42。
内引线41被配置在与裸片焊盘3相同的平面上，在与裸片焊盘3对置的对置方向上形成为长尺的矩形状。内引线41经由金属线11与半导体芯片2的布线焊盘电连接。
外引线42形成为具有向下方弯曲的弯曲部的近似曲轴(crank)形状。外引线42作为将半导体装置1安装在印刷线路板上时的外部连接部发挥作用。
作为树脂封装5可适用环氧树脂等公知的材料。
在如上所述的半导体装置1中，其容许损失例如是1～10W，最好是4～10W。容许损失为半导体装置1的放热性指标。另外，半导体装置1的外引线42与印刷线路板的焊接区(land)焊接，例如，可通过在240～260℃下软熔来进行安装。
图2A～图2D是按照工序顺序示出图1所示的半导体装置1的制造方法的图。
在半导体装置1的制造工序中，如图2A所示，准备半导体芯片2以及引线框架12。
引线框架12可通过加工Cu薄板来形成。该引线框架12一体地具备：点阵状的框架部(未图示)、作为配置在框架部所包围的各矩形区域内的岛的裸片焊盘3、配置在裸片焊盘3周围的多个引线4以及架设在框架部与裸片焊盘3之间的吊引线(未图示)。
接着，通过电镀法，对半导体芯片2的另一面22(背面金属13)以及裸片焊盘3的一个面31这双方实施Ag电镀。由此，形成芯片镀层6以及焊盘镀层7。此外，这些电镀工序可以利用相同的工序来进行，也可以利用其它工序来进行。
然后，如图2B所示，将由BiSn构成的接合件8涂敷在焊盘镀层7上，并以芯片镀层6与该接合件8对置的姿势，通过半导体芯片2以及裸片焊盘3来夹住接合件8。
然后，如图2C所示，例如，在280～300℃下进行软熔(热处理)。由此，在接合件8上形成Ag网9以及合金层10，来接合半导体芯片2和裸片焊盘3。
然后，如图2D所示，金属线11的一端与半导体芯片2的布线焊盘连接，金属线11的另一端与引线4的内引线41连接。
接着，将引线框架12设于成形模具内，半导体芯片2、裸片焊盘3、内引线41、金属线11以及吊引线的一部分被树脂封装5密封。
然后，切断引线框架12的不需要部分(例如，从吊引线的树脂封装5中露出的部分等)。这样，能获得图1所示的构造的半导体装置1的单片。
根据上述方法，在半导体芯片2的另一面22以及裸片焊盘3的一个面31这双方形成Ag镀层(芯片镀层6以及焊盘镀层7)后，在半导体芯片2与裸片焊盘3之间夹着由BiSn构成的接合件8，然后进行软熔。通过执行上述工序，可在接合件8上形成从各镀层6、7到另一镀层6、7的Ag网9。通过该Ag网9，可以进一步提高半导体芯片2与裸片焊盘3之间的热传导性。
并且，在所获得的半导体装置1中，因为接合件8由BiSn系材料构成，所以能够实现接合件8的无铅化。
此外，通过Ag网9连接半导体芯片2与裸片焊盘3之间，所以能够在它们之间传递热。因此，理想状态下，在半导体芯片2中产生的热可经由Ag网9以Ag的热传导率(约425W/m·K)传递到裸片焊盘3。因此，能够充分确保半导体芯片2的放热性。
另外，在半导体芯片2的另一面22以及裸片焊盘3的一个面31这双方上形成由Ag构成的镀层(芯片镀层6以及焊盘镀层7)，并通过各镀层6、7的Ag来形成蜘蛛网状的Ag网9。因此，与仅在某一个接合面(另一面22或一个面31)上形成镀层的情况相比，可增大Ag网9的密度。结果，能够提高半导体芯片2的放热性。
另外，在芯片镀层6以及焊盘镀层7的界面附近，形成由Sn-Ag合金构成的合金层10。针对芯片镀层6以及焊盘镀层7的Sn-Ag合金的润湿性优于BiSn的润湿性。因此，利用该合金层10，可提高接合件8和半导体芯片2以及裸片焊盘3的接合强度。
另外，Sn是与Ag易于合金化的金属，不过只要接合件8中的Sn的含有量超过0wt％并在4wt％以下，就能够抑制有助于Ag网9形成的Ag的不需要的合金化。结果，可有效活用各镀层6、7的Ag，所以能够高效地形成Ag网9。
另外，因为与Sn(熔点：约232℃)相比大量含有Bi(熔点：约270℃)，所以能够使接合件8保持比较高的熔点(例如，260～270℃)。因此，在安装半导体装置1时的软熔中，能够发挥良好的耐软熔性。
接着，根据实施例以及比较例来说明本发明，但本发明不限于下述的实施例。
<实施例1～4以及比较例1～3>
根据上述制造方法来制作图1所示构造的半导体装置。其中，如下设计了各实施例以及比较例中的接合件的组成。此外，在下述组成中，在Sn的前面所记载的数字表示接合件中的Sn含有量(wt％)。
(接合件的组成)
实施例1：Bi-1Sn实施例2：Bi-2Sn实施例3：Bi-3Sn
实施例4：Bi-4Sn比较例1：Bi-5Sn比较例2：Bi-6Sn
比较例3：Bi-10Sn
(评价试验)
(1)SEM图像的摄影
采用扫描型电子显微镜(SEM)，对在实施例1～4以及比较例1～3中获得的半导体装置的接合件照射电子光束，由此来摄影所作出的像。图4～图10示出所摄影的照片。
根据图4～图10可以确认，在Sn含有量为1～4wt％(实施例1～4)的接合件中，形成有连接半导体芯片和裸片焊盘的Ag网。与其相对确认出，在Sn含有量超过4wt％的(比较例1～3)接合件中未形成Ag网，且Sn在Bi中分散。
(2)熔点的测定
采用示差扫描型热量计(Seiko Instruments Inc公司制造DSC6200)，对在实施例1～4以及比较例1～3中获得的半导体装置的接合件进行熔点测定。此外，测定条件为升温速度：5℃/分，温度范围：115～300℃。由此，针对各接合件可确认以下情况。
实施例1(Bi-1Sn)：接合件全部在263℃熔化。
实施例2(Bi-2Sn)：接合件全部在264.1℃熔化。
实施例3(Bi-3Sn)：接合件在139℃下熔化整个体积的13.2％。
实施例4(Bi-4Sn)：接合件在139℃下熔化整个体积的48.0％。
比较例1(Bi-5Sn)：接合件在139℃下熔化整个体积的81.7％。
比较例2(Bi-6Sn)：接合件在139℃下熔化整个体积的93.2％。
比较例3(Bi-10Sn)：接合件全部在139℃下熔化。
<实施例5以及比较例4～5>
在JEDEC标准基板(114.3×76.2×1.6mm3)上，采用表1所示组成的接合件来安装已装备了晶体管的半导体装置。但是，JEDEC标准基板通过重叠3层74.2mm角的铜箔，来整体构成4层构造。另外，各铜箔间利用热通孔来连接。
(评价试验)
(1)容许损失的测定
针对实施例5以及比较例4～5的半导体装置，采用桑野电机公司制作的TH-156来测定容许损失。表1示出结果。
根据表1能够确认，在接合件中采用Bi-2Sn的实施例5的容许损失虽然未波及采用含有Pb接合件的比较例4，但不是理想的，不过比采用Ag浆料的比较例5高。由此，能够确认实施例5可确保充分的放热性。
【表1】
  接合件   容许损失(W)
  实施例5   Bi-2Sn   4.8
  比较例4   Pb-3Sn-1Ag   5.4
  比较例5   Ag浆料   4.6
以上，对本发明的实施方式进行了说明，但本发明也能够以其它形态来实施。
例如，虽然取得了应用QFP的半导体装置1，但本发明例如也可以适用于如图3所示的应用QFN的半导体装置51(在图3中，52以及53例如是由锡(Sn)、锡-银合金(Sn-Ag)等金属构成的镀层)，还可以适用于应用BGA、SOP等其它种类封装的半导体装置。
本发明的实施方式不过是用于使本发明的技术内容更加清楚的具体例，本发明并非限定于这些具体例来进行解释，本发明的主旨以及范围仅由所附请求范围来限定。
本申请与在2009年4月24日向日本国专利局提出的特愿2009-106906号对应，并通过引用而包括该申请的全部公开内容。

Claims (19)

1.一种半导体装置，其包含：
半导体芯片；
与上述半导体芯片接合的固体板；以及
介于上述半导体芯片与上述固体板之间、并由BiSn系材料构成的接合件，其中，
上述接合件具有用于提高上述半导体芯片与上述固体板之间的热传导性的由Ag构成的热传导通路，
在上述接合件中的与上述半导体芯片和/或上述固体板的界面附近，形成由Sn-Ag合金构成的金属层，
上述接合件中的Sn含有量超过0wt％并在4wt％以下，
上述接合件含有由Co、Cu、Au、Ni、Zn的至少一种构成的副成分，
上述热传导通路从上述固体板连接到上述半导体芯片。
2.根据权利要求1所述的半导体装置，其中，
上述接合件中的Sn含有量超过1wt％并在3wt％以下。
3.根据权利要求1所述的半导体装置，其中，
上述接合件中的Sn含有量超过1.5wt％并在2.5wt％以下。
4.根据权利要求1所述的半导体装置，其中，
上述固体板是由金属构成的引线框架的岛。
5.根据权利要求1所述的半导体装置，其中，
上述半导体芯片形成为300～400μm厚的四角板状。
6.根据权利要求1所述的半导体装置，其中，
上述接合件主要含有BiSn。
7.根据权利要求1所述的半导体装置，其中，
在上述半导体芯片中的与上述接合件的接合面上形成含有Au、Ni、Ag的背面金属。
8.根据权利要求7所述的半导体装置，其中，
在上述背面金属上形成由Ag构成的芯片镀层。
9.根据权利要求8所述的半导体装置，其中，
上述芯片镀层的厚度是0.1～2.0μm。
10.根据权利要求1所述的半导体装置，其中，
上述固体板是芯片键合上述半导体芯片的裸片焊盘，
在上述裸片焊盘上形成具有1.0～10.0μm厚度的焊盘镀层。
11.根据权利要求1所述的半导体装置，其中，
上述接合件含有比Sn多的Bi。
12.根据权利要求1所述的半导体装置，其中，
上述接合件的熔点是260～270℃。
13.根据权利要求12所述的半导体装置，其中，
上述接合件的熔点是260～263℃。
14.根据权利要求1所述的半导体装置，其中，
上述固体板是芯片键合上述半导体芯片的裸片焊盘，
在该裸片焊盘的周围形成与上述半导体芯片电连接的多个引线，
多个上述引线由与上述裸片焊盘相同的Cu薄板构成。
15.根据权利要求14所述的半导体装置，其中，
上述引线由0.1～5.0mm厚度构成。
16.根据权利要求1所述的半导体装置，其中，
上述接合件由Bi-2Sn构成。
17.根据权利要求1所述的半导体装置，其中，
上述热传导通路是在上述接合件内扩展的网状组织。
18.根据权利要求1所述的半导体装置，其中，
上述热传导通路在上述接合件内以蜘蛛网状扩展。
19.根据权利要求18所述的半导体装置，其中，
蜘蛛网状的上述热传导通路达到上述接合件的大致整个区域。
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