CN101847589B - 制造适合高压应用的刚性功率模块的方法 - Google Patents
制造适合高压应用的刚性功率模块的方法 Download PDFInfo
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Abstract
一种制造刚性功率模块的方法,所述模块具有料层,所述料层电气绝缘并且导热良好且作为涂层沉积,所述结构具有以至少一种电气绝缘且导热良好的材料形成的融合在一起的喷涂颗粒,所述方法具有以下步骤:制造一件式引线框架;将半导体设备、可能的无源部件装设于引线框架中,并键合相应连接部;将如此装件的引线框架插入压力模具中,以保证接触引线框架的部分区域;将热成型压力模制化合物压入所述模具,同时闭合上述设置的引线框架:通过热喷涂而涂覆上述装件的引线框架下侧的至少导电区域,并且也覆盖以模制化合物填充的间隔的主要区域。
Description
技术领域
本发明涉及制造适合高压应用的刚性功率模块的方法。功率半导体模块截至目前通常由钎焊料、粘结剂、LTB(低温结合件)或永久挠性的导热焊膏的多重过渡部分形成,所述过渡部分将组成元件例如冷却体、散热器(基板)、基底和半导体彼此连接。在该过程中,半导体必须钎焊到主要由若干料层(绝缘层和金属层)构成的基底上,基底又必须钎焊到导热良好(并且大部分也导电)的金属散热器上,形成热扩散件,并且最后该热扩散件必须连接到冷却体。重要的一点是,用来操作功率半导体的高电流或电压不能到达冷却体。因此,形成安全的电绝缘并仍然保证良好的热传递非常重要。因此,基底传统上形成为厚层基底、DCB等,这种情况下,作为导热良好的绝缘件的陶瓷芯例如Al2O3或AlN等设置有两个导电构造的料层,所述导电构造的料层例如由铜或厚膜焊膏构成。这种结构的问题在于,大量的热量通过因老化而变脆的一个或多个钎焊料或粘结剂过渡部传导,所以热流必须通过相应更小的截面传导,然后老化变得更快。
通过包封来保护刚性功率模块,防止时效和老化的影响。一种制造刚性功率模块的方法例如可以从本申请人的DE 10 2007 020 618 B3中获知,其中压力模具用来在处于已装件(populated)状态的引线框架(借助压力模具中的安装板牙固定在压力模具中)周围形成模具化合物,在成形过程中,凹部保留在预定位置,随后可以利用插入所述凹部中的凸模将引线框架的腹板去除。
申请人名下的DE 2004 005 534 A1已经公开了一种功率半导体模块,知道其构造具有颗粒喷涂层,所述颗粒熔合在一起,作为导电布线平面,在所述喷涂层上与所述层密切连接。利用这种模块,通过金属喷镀而替代了刚性陶瓷基底。因此,追求的方案仅用于模块内侧。
发明内容
因此,本发明能提供一种刚性功率模块,诸如用于汽车应用场合,特别是混合车辆的场合,所述刚性功率模块设置有与模块主体的必要牢固键合(bonded link),准确地说,以导热、电绝缘特别是还防水和不透水的方式提供这种键合。
在上述现有技术的模块中,问题是所能实现的介电强度,即它的电压等级。
在上述方法中,暴露于冷却体的引线框架元件连线到一定的电势,因此必须彼此电气绝缘并且相对于冷却体电气绝缘。
在现有技术中,绝缘焊膏或绝缘膜设置在带有引线框架元件的模块主体和冷却体之间,用于这种目的。引线框架元件通常隔开0.5mm。
常见的导热膜(诸如Keratherm(R)Red)具备4000伏特/毫米的介电强度。但是,在模块和/或引线框架元件之间不存在材料连接部的时候,这种介电强度并不适用。在这种情况下,必须适用引线框架元件之间的漏电路径介电强度,且其量值在非均匀电场中,在0.5mm时仅为250伏特(参见DIN EN60664-1)但是,焊膏并没有与模块主体和引线框架连接的材料连接部。因此,必须采用漏电路径值。
在焊膏和膜这两种情况下,缺陷在于,在最好的情况下,可以实现正向匹配。这样并不能如期望地那样来扩展介电强度。
此外,可以借助适当材料(例如,Kapton(R)膜)来实现引线框架元件相对于冷却体的电绝缘效果,但是同样需要的导热值无法存续。
首先,焊膏的技术缺陷在于,在安装压力下,沿着模块和冷却体的光滑表面,焊膏始终发生流动。在温度循环的情况下,模块变形甚至导致焊膏被抽出模块和冷却体之间的间隙(所谓的抽出效应)。因此,现有技术中采用的两种方案的缺陷在于,随着时间发展,相对于冷却体出现永久的热抗性劣化。
最后,导致的缺陷是,焊膏和膜的热学属性,即使在专用材料的情况下,也限制于大约0.5到5W/mK。因此,仅可能形成较小的热流,而且半导体因操作高温而损坏。
因此,本发明的目标是制造一种不存在上述缺陷的功率模块。
根据本发明,借助具有本发明特征的方法来实现上述目标。在所述过程中,也可以让相应的半导体借助钎焊、粘结、烧结、导线连接等方式导热和导电地连接到引线框架两侧,然后引线框架在转移模制过程中挤压涂覆,以便引线框架元件侧部暴露于冷却体。
为了电气绝缘,该引线框架侧部在额外的步骤中通过热喷涂以电绝缘且导热良好的料层涂覆,因此制作地适合高压应用场合。
因此,利用本发明的特征,一方面通过模块主体上的牢固键合,另一方面通过导热良好地与冷却体电气绝缘,实现了一种热连接。
附图说明
本发明进一步的特征和优势将从下文优选实施例的说明中体现出来。在附图中:
图1借助额外的陶瓷绝缘料层示出了不同于现有技术的创造性新结构;
图2示出了现有技术中的传统结构;和
图3示出了与图1一样且具有喷涂在陶瓷绝缘料层下侧的额外金属料层的结构。
具体实施方式
图中所示模块下侧以电气绝缘但导热良好的料层涂覆,例如氧化物、氮化物或渗碳陶瓷料层(氧化铝、氮化铝或碳化硅)。这些涂覆材料,已经在上述DE 10 2004 005 534 A1中列出,优选通过热喷涂来施加,绝缘件料层厚度取决于期望的介电强度以及所选陶瓷的或者陶瓷复合材料的特性。
通过相对于彼此夹紧粗糙表面,特别是它们的峰值粗糙点,防止了相对于彼此的漏电以及任何形式的抽出效应,同时在粗糙点上,导热焊膏和导热膜彼此夹紧。
因此,焊膏不再因模块的热力机械运动而挤出。喷涂陶瓷层5的粗糙表面提供了二维扩展的残余间隙和毛细管,这些残余间隙和毛细管无法挤压到零间隔,因此完全并永久被导热焊膏填充。
优选实施例1:
在处于完成状态的优选实施方式中,参见图1,带有暴露引线框架迹线4的模制模块进行涂覆,从而借助热喷涂与厚度大约为300μm的氧化铝料层牢固键合。这种喷涂料层绝缘抗性高达6000伏特左右。
这些料层的导热率大约为24W/mK,因此较之焊膏或膜导热性更高。
与此同时,由于氧化铝牢固键合在引线框架4的铜料以及模块主体1的塑料上,所以形成与喷涂陶瓷的牢固键合。
在距离为0.5m的情况下,引线框架迹线之间的绝缘能力提高到10000伏特。这样可以用在线路电压应用场合,在这种情况下,所需的最小介电强度量>2500伏特。
优选实施例2:
在进一步优选实施方式中(图3),带有暴露引线框架迹线4的模制模块,厚度为300μm左右的氧化铝料层5也可以额外进行涂覆,从而通过热喷涂与另外的金属料层牢固结合。
例如以Al、Ag、Cu形成的至少一个额外金属料层例如通过冷气喷涂而施加到氧化铝料层上。因此,形成带有陶瓷-金属序列料层的模制模块,从而能通过钎焊或压力烧结而牢固键连接到金属冷却体6。在这种优选实施方式中,通过这种牢固键连接从模块到冷却体的热流在很多情况下优于通过焊膏层的热流,如果能适用,则为优选方案。
附图标记2指代半导体,而3指代键合在半导体上的导线。
Claims (11)
1.一种制造刚性功率模块的方法,所述模块具有料层,所述料层电气绝缘并且导热良好且作为涂层沉积,所述料层具有以至少一种电气绝缘且导热良好的材料形成的融合在一起的喷涂颗粒,所述方法具有以下步骤:
制造一件式引线框架;
将半导体设备、可能的无源部件装设于引线框架中,并键合相应连接部;
将如此装件的引线框架插入压力模具中,以保证接触引线框架的部分区域;
将热成型压力模制化合物压入所述压力模具,同时闭合上述装件的引线框架:
通过热喷涂所述料层而涂覆上述装件的引线框架下侧的至少导电区域,并且延伸覆盖所述导电区域之间以模制化合物填充的间隔区域的主要部分。
2.如权利要求1所述的方法,其特征在于,所述涂层通过热喷涂进行沉积。
3.如前述权利要求任一项所述的方法,其特征在于,在涂覆过程中,沉积含铝电绝缘物质。
4.如权利要求3所述的方法,其特征在于,所述物质包含氧化铝。
5.如权利要求3所述的方法,其特征在于,所述物质包含氮化铝。
6.如权利要求2所述的方法,其特征在于,
所述涂层包含碳化硅。
7.如权利要求1或2所述的方法,其特征在于,
所述料层的自由外侧保持粗糙。
8.如权利要求1或2所述的方法,其特征在于,一个额外的金属料层沉积在所述绝缘导热喷涂料层的外侧。
9.一种刚性功率模块,带有电绝缘、导热良好且作为涂层沉积的料层,所述料层包括热喷涂在引线框架下侧的氧化铝颗粒,所述颗粒彼此融合并融合到所述引线框架的导电区域而且延伸到所述导电区域之间以模制化合物填充的间隔区域的主要部分,其特征在于,所述氧化铝料层(5)连同额外的铝或银金属料层一起牢固键合连接到冷却体(6)。
10.如权利要求9所述的功率模块,其特征在于,所述额外金属料层利用冷气喷涂沉积在所述绝缘导热喷涂料层的粗糙外侧。
11.一种刚性功率模块,带有电绝缘、导热良好且作为涂层沉积的料层,所述料层包括热喷涂在引线框架下侧的碳化硅颗粒,所述颗粒彼此融合并融合到所述引线框架的至少导电区域而且延伸到所述导电区域之间以模制化合物填充的间隔区域的主要部分,其特征在于,所述料层(5)的导热率为24W/mK,并设置有导热焊膏,所述导热焊膏永久保留在残余间隙和毛细管中,用作与冷却体(6)连接的抗漏电正连接件。
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DE102009014794A DE102009014794B3 (de) | 2009-03-28 | 2009-03-28 | Verfahren zum Herstellen eines für Hochvoltanwendungen geeigneten festen Leistungsmoduls und damit hergestelltes Leistungsmodul |
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102011100255B3 (de) * | 2011-05-03 | 2012-04-26 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen eines Halbleiterbauelements |
EP2665092B1 (de) | 2012-05-16 | 2019-02-27 | Microdul AG | Verfahren zur Herstellung eines Halbleiterelementes auf einem Kupfersubstrat mit dazwischenliegender Isolationsschicht |
US9230889B2 (en) | 2013-01-16 | 2016-01-05 | Infineon Technologies Ag | Chip arrangement with low temperature co-fired ceramic and a method for forming a chip arrangement with low temperature co-fired ceramic |
US9397018B2 (en) * | 2013-01-16 | 2016-07-19 | Infineon Technologies Ag | Chip arrangement, a method for manufacturing a chip arrangement, integrated circuits and a method for manufacturing an integrated circuit |
JP6307832B2 (ja) * | 2013-01-22 | 2018-04-11 | 三菱マテリアル株式会社 | パワーモジュール用基板、ヒートシンク付パワーモジュール用基板、ヒートシンク付パワーモジュール |
KR101943953B1 (ko) * | 2013-09-20 | 2019-01-30 | 에이비비 슈바이쯔 아게 | 세라믹 금속 전이를 위한 세라믹 금속화의 제조 방법 및 세라믹 금속 전이 자체 |
DE102014111930A1 (de) | 2014-08-20 | 2016-02-25 | Rupprecht Gabriel | Thermisch gut leitendes, elektrisch isolierendes Gehäuse mit elektronischen Bauelementen und Herstellverfahren |
JP6590686B2 (ja) * | 2014-12-24 | 2019-10-16 | トーカロ株式会社 | 絶縁軸受、並びに軸受のコーティング方法 |
US9693488B2 (en) * | 2015-02-13 | 2017-06-27 | Deere & Company | Electronic assembly with one or more heat sinks |
WO2017126051A1 (ja) * | 2016-01-20 | 2017-07-27 | オリンパス株式会社 | 手術器具 |
US10457001B2 (en) * | 2017-04-13 | 2019-10-29 | Infineon Technologies Ag | Method for forming a matrix composite layer and workpiece with a matrix composite layer |
WO2019038876A1 (ja) * | 2017-08-24 | 2019-02-28 | 新電元工業株式会社 | 半導体装置 |
DE102019104010A1 (de) | 2019-02-18 | 2020-08-20 | Infineon Technologies Austria Ag | Elektronisches modul mit verbesserter wärmeabfuhr und dessen herstellung |
EP3770956A1 (en) | 2019-07-25 | 2021-01-27 | ABB Schweiz AG | Power semiconductor module |
CN113113315B (zh) * | 2020-01-13 | 2023-03-31 | 珠海零边界集成电路有限公司 | 一种防止智能功率模块溢胶的方法 |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4330975C2 (de) * | 1993-09-13 | 2001-10-25 | Bosch Gmbh Robert | Verfahren zum Aufbringen eines Leistungsbauelements auf einer Leiterplatte |
DE102007020618B3 (de) * | 2007-04-30 | 2008-10-30 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen eines festen Leistungsmoduls und damit hergestelltes Transistormodul |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4099200A (en) * | 1976-03-26 | 1978-07-04 | Raytheon Company | Package for semiconductor beam lead devices |
JPH0255638A (ja) * | 1988-08-22 | 1990-02-26 | Godo Imono Gijutsu:Kk | 精密鋳造用模型材 |
DE8908678U1 (de) * | 1989-07-17 | 1990-11-15 | Siemens AG, 1000 Berlin und 8000 München | Leistungsbaugruppe |
EP0478240A3 (en) * | 1990-09-24 | 1993-05-05 | Texas Instruments Incorporated | Insulated lead frame for integrated circuits and method of manufacture thereof |
US5087962A (en) * | 1991-02-25 | 1992-02-11 | Motorola Inc. | Insulated lead frame using plasma sprayed dielectric |
JP3199963B2 (ja) * | 1994-10-06 | 2001-08-20 | 株式会社東芝 | 半導体装置の製造方法 |
US7061080B2 (en) * | 2001-06-11 | 2006-06-13 | Fairchild Korea Semiconductor Ltd. | Power module package having improved heat dissipating capability |
JP4207592B2 (ja) | 2003-02-13 | 2009-01-14 | 三菱自動車工業株式会社 | 車両のフロア構造 |
JP4023397B2 (ja) | 2003-04-15 | 2007-12-19 | 富士電機機器制御株式会社 | 半導体モジュールおよびその製造方法 |
DE102004055534B4 (de) | 2004-11-17 | 2017-10-05 | Danfoss Silicon Power Gmbh | Leistungshalbleitermodul mit einer elektrisch isolierenden und thermisch gut leitenden Schicht |
EP1833088A1 (de) * | 2006-03-07 | 2007-09-12 | Danfoss Silicon Power GmbH | Verfahren zur Erstellung einer rissarmer Verbindung zwischen einer Wärmesenke und einer Substratplatte |
TWI456707B (zh) * | 2008-01-28 | 2014-10-11 | Renesas Electronics Corp | 半導體裝置及其製造方法 |
-
2009
- 2009-03-28 DE DE102009014794A patent/DE102009014794B3/de not_active Expired - Fee Related
-
2010
- 2010-03-01 EP EP10002042A patent/EP2234156A2/de not_active Withdrawn
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE4330975C2 (de) * | 1993-09-13 | 2001-10-25 | Bosch Gmbh Robert | Verfahren zum Aufbringen eines Leistungsbauelements auf einer Leiterplatte |
DE102007020618B3 (de) * | 2007-04-30 | 2008-10-30 | Danfoss Silicon Power Gmbh | Verfahren zum Herstellen eines festen Leistungsmoduls und damit hergestelltes Transistormodul |
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US20110255246A1 (en) | 2011-10-20 |
US8546923B2 (en) | 2013-10-01 |
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