CN101800215B - 无线通讯模组封装构造 - Google Patents
无线通讯模组封装构造 Download PDFInfo
- Publication number
- CN101800215B CN101800215B CN2009100074790A CN200910007479A CN101800215B CN 101800215 B CN101800215 B CN 101800215B CN 2009100074790 A CN2009100074790 A CN 2009100074790A CN 200910007479 A CN200910007479 A CN 200910007479A CN 101800215 B CN101800215 B CN 101800215B
- Authority
- CN
- China
- Prior art keywords
- substrate
- wireless communication
- communication module
- auxiliary earth
- package structure
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000004891 communication Methods 0.000 title claims abstract description 42
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 239000004020 conductor Substances 0.000 claims description 18
- 230000004308 accommodation Effects 0.000 claims description 10
- 238000012360 testing method Methods 0.000 abstract description 20
- 230000000694 effects Effects 0.000 abstract description 12
- 238000004806 packaging method and process Methods 0.000 description 17
- 230000008859 change Effects 0.000 description 13
- 238000013461 design Methods 0.000 description 12
- 230000002708 enhancing effect Effects 0.000 description 11
- 230000000994 depressogenic effect Effects 0.000 description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 6
- 238000006073 displacement reaction Methods 0.000 description 6
- 239000000084 colloidal system Substances 0.000 description 5
- 238000012856 packing Methods 0.000 description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 229910052802 copper Inorganic materials 0.000 description 4
- 239000010949 copper Substances 0.000 description 4
- 238000005538 encapsulation Methods 0.000 description 4
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 241000218202 Coptis Species 0.000 description 2
- 235000002991 Coptis groenlandica Nutrition 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000005242 forging Methods 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 239000004411 aluminium Substances 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 230000008901 benefit Effects 0.000 description 1
- 230000033228 biological regulation Effects 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000005674 electromagnetic induction Effects 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- 239000010410 layer Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 239000011241 protective layer Substances 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 238000012216 screening Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 238000005728 strengthening Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different main groups of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. forming hybrid circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/162—Disposition
- H01L2924/16251—Connecting to an item not being a semiconductor or solid-state body, e.g. cap-to-substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19043—Component type being a resistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3025—Electromagnetic shielding
Abstract
本发明公开一种无线通讯模组封装构造,其包含一基板、至少一芯片及一遮蔽罩盖。所述基板的上表面具有一承载区,所述承载区的周围具有一环形接地垫,及所述承载区内具有至少一辅助接地垫,所述芯片设于所述承载区并与所述基板电性连接。所述遮蔽罩盖具有一容置空间、一接地端面及至少一辅助接地部。所述容置空间用以容置所述芯片。所述接地端面电性连接于所述基板的环形接地垫。所述辅助接地部电性连接于所述基板的辅助接地垫,以形成至少一辅助接地通路,其用以改变因空腔谐振效应而产生的增强峰值的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,以提高遮蔽测试的成品率。
Description
【技术领域】
本发明是有关于一种无线通讯模组封装构造,特别是有关于一种用以减少空腔谐振(cavity resonance)效应的无线通讯模组封装构造。
【背景技术】
现今,半导体封装产业为了满足各种高密度封装的需求,逐渐发展出各种不同型式的封装构造,其中各种不同的系统封装(system in package,SIP)设计概念常用于架构无线通讯模组的封装构造,以便应用于需要无线通讯功能的各种电子产品上,例如行动电话或全球定位系统装置(global positioningsystem,GPS)等。一般而言,系统封装可分为多芯片模组(multi chip module,MCM)、封装体上堆叠封装体(package on package,POP)及封装体内堆叠封装体(package in package,PIP)等。多芯片模组是在同一基板上布设数个芯片,在设置芯片后,再利用封装胶体包埋所有芯片,且依芯片排列方式又可将其细分为堆迭芯片(stacked die)封装或并列芯片(side-by-side)封装。再者,封装体上堆叠封装体的构造是先完成一具有基板的第一封装体,接着再于第一封装体的封装胶体上表面堆迭另一完整的第二封装体,第二封装体会透过适当的转接元件(例如锡球或金线)电性连接至第一封装体的基板上,因而成为一复合封装构造。相较之下,封装体内堆叠封装体的构造则是更进一步利用另一封装胶体将第二封装体、转接元件及第一封装体的原封装胶体等一起包埋固定在第一封装体的基板上,因而成为一复合封装构造。
对无线通讯模组的封装构造而言,依照功能设计的复杂度,其可能采用单芯片模组或多芯片模组的架构进行设计。再者,为了减少电磁干扰(electromagnetic interference,EMI)现象,单芯片模组或多芯片模组常会在基板上表面设置一遮蔽罩盖(EMI shielding lid)。如此,位于遮蔽罩盖内部的无线通讯芯片因电磁感应效应所产生的电磁波将被遮蔽盖体所限制而无法外传,以避免电磁波对周遭电子设备所造成干扰影响。
请参照图1及2所示,其揭示一种现有的无线通讯模组封装构造,其包含一基板11、至少一芯片12、数个被动元件13、14及一遮蔽罩盖15。所述基板11的上表面用以承载及电性连接所述芯片12及被动元件13、14,且所述基板11的上表面在周围环绕形成一环形接地垫(ground pad)111。所述遮蔽罩盖15是一中空盖体,其具有一接地端面151,可焊接结合于所述基板11的环形接地垫111上,以减少电磁干扰现象。当封装工厂的生产线完成所述无线通讯模组封装构造后,会对其进行电磁干扰的遮蔽效果进行测试,以确定是否产品能减少在一规定频带范围内的电磁波。只有当产品符合一预设标准的规定(例如中国CCC GB4943、中国台湾BSMI CNS13438、日本VCCI、韩国MIC、美国FCC Part15、欧盟CE EN55022、纽澳C-Tick ANS3548等国际认证规范等),才能被视为良品进行出货。
然而,现有的无线通讯模组封装构造的技术问题在于:虽然所述遮蔽罩盖15可将所述芯片12所产生的电磁波限制在其内部以避免对周遭电子设备造成干扰,但是在所述遮蔽罩盖15受到电磁波作用时,所述遮蔽罩盖15的中空构造不可避免的会产生所谓的空腔谐振(cavity resonance)效应,因而降低上述遮蔽测试时的成品率(yield)。也就是,尽管所述规定频带范围内的大多数电磁波都能利用所述遮蔽罩盖15加以减弱,但在某一频率上的电磁波却会因为谐振的关系反而被增强,并产生一增强峰值(peak)。例如,在10×10mm尺寸的无线通讯模组封装构造中,若所述遮蔽罩盖15的材质为铜及厚度介于0.1至0.15mm之间,则所述遮蔽罩盖15产生的增强峰值大约落在6.0GHz的频率处,而6.0GHz为无线产品EMI检验的频率点,因此将会导致大幅降低遮蔽测试时的成品率。
故,有必要提供一种无线通讯模组封装构造,以解决现有技术所存在的问题。
【发明内容】
本发明的主要目的在于提供一种无线通讯模组封装构造,其中基板的上表面在环形接地垫围绕而成的承载区设置辅助接地垫,其可与遮蔽罩盖的辅助接地部电性连接形成辅助接地通路,以改变因空腔谐振(cavity resonance)效应而产生的增强峰值的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,进而有利于提高遮蔽测试的成品率。
本发明的次要目的在于提供一种无线通讯模组封装构造,其中局部改变基板的设计,使其承载区内既有的对位用垫进一步接地,即可用以做为辅助接地垫,进而有利于降低整体设计成本。
为达成本发明的前述目的,本发明提供一种无线通讯模组封装构造,其包含一基板、至少一芯片及一遮蔽罩盖。所述基板的上表面具有一承载区,所述承载区的周围具有一环形接地垫,及所述承载区内具有至少一辅助接地垫,所述芯片设于所述承载区并与所述基板电性连接。所述遮蔽罩盖具有一容置空间、一接地端面及至少一辅助接地部。所述容置空间用以容置所述芯片。所述接地端面电性连接于所述基板的环形接地垫。所述辅助接地部电性连接于所述基板的辅助接地垫,以形成至少一辅助接地通路。
在本发明的一实施例中,另包含至少一电子元件,所述电子元件具有一接地端子(ground terminal),所述接地端子电性连接在所述遮蔽罩盖的辅助接地部与所述基板的辅助接地垫之间。
在本发明的一实施例中,所述遮蔽罩盖的辅助接地部是一开口。
在本发明的一实施例中,所述遮蔽罩盖的辅助接地部是一凹陷部。
在本发明的一实施例中,所述电子元件选自无源元件(passive element)或有源元件(active element)。
在本发明的一实施例中,所述无源元件选自电阻、电容或电感。
在本发明的一实施例中,所述有源元件选自二极管(diode)、三极管(triode)或发光二极管(light emitting diode,LED)。
在本发明的一实施例中,所述电子元件的接地端子与所述遮蔽罩盖的辅助接地部之间另具有一导电材料。
在本发明的一实施例中,所述电子元件的接地端子与所述基板的辅助接地垫之间另具有一导电材料。
在本发明的一实施例中,所述遮蔽罩盖的辅助接地部是一凹陷部,其电性连接于所述基板的辅助接地垫。
在本发明的一实施例中,所述遮蔽罩盖的辅助接地部与所述基板的辅助接地垫之间另具有一导电材料。
在本发明的一实施例中,所述导电材料选自焊锡或导电胶。
在本发明的一实施例中,所述基板的辅助接地垫是所述基板的承载区内的至少一对位用垫。
【附图说明】
图1是现有的无线通讯模组封装构造的组合剖视图。
图2是现有的无线通讯模组封装构造的组合立体图。
图3是本发明第一实施例的无线通讯模组封装构造的组合剖视图。
图4是本发明第一实施例的无线通讯模组封装构造的组合立体图。
图5是本发明第二实施例的无线通讯模组封装构造的组合剖视图。
图6是本发明第二实施例的无线通讯模组封装构造的组合立体图。
图7是本发明第三实施例的无线通讯模组封装构造的组合剖视图。
图8是本发明第三实施例的无线通讯模组封装构造的组合立体图。
【具体实施方式】
为让本发明上述目的、特征及优点更明显易懂,下文特举本发明较佳实施例,并配合附图,作详细说明如下:
请参照图3及4所示,其揭示本发明第一实施例的无线通讯模组封装构造,其包含一基板21、至少一芯片22、至少一电子元件23及一遮蔽罩盖24。依所述芯片22的数量不同,本发明可能架构成为单芯片或多芯片的无线通讯模组,其适用于各种无线通讯标准规格,例如WiMAX、Wi-Fi、Blue-Tooth等,但并不限于此。
请参照图3及4所示,本发明第一实施例的基板21可选自单层或多层的印刷电路板或陶瓷电路板。所述基板21具有一上表面211及一下表面212,所述上表面211具有一承载区210,所述承载区210的周围具有一环形接地垫213,及所述承载区210内具有数个焊垫214及至少一辅助接地垫215。所述承载区210用以承载所述芯片22及电子元件23等元件,所述环形接地垫213、焊垫214及辅助接地垫215是形成在所述上表面211的一表面电路通过图案化所形成的金属垫,例如铜垫等。所述环形接地垫213优选为连续环状结构,但亦可为不连续条状所围绕而成的排列结构。所述焊垫214用以电性连接于所述芯片22。所述辅助接地垫215则用以提供接地功能,在本实施例中,所述辅助接地垫215是选自所述基板21的承载区210内的至少一对位用垫,所述对位用垫是所述基板21在增层过程中用来对位各积层板的标记,本发明只要局部改变设计使所述对位用垫接地,即可在不大幅变更所述基板21的设计下,完成设置所述辅助接地垫215,不但不会过度增加该基板21的尺寸,且亦有利于降低整体设计成本。再者,所述下表面212另具有数个接垫216,可供电性连接数个输入/输出端子25,例如锡球或针脚等,在某些产品中,亦可直接利用所述接垫216做为输入/输出端子。
请再参照图3及4所示,本发明第一实施例的芯片22可以选自硅晶圆切割制成的芯片,例如倒装芯片(flip chip,FC)或打线接合(wire bonding)的芯片,且所述芯片22具有数个连接元件221,用以电性连接于所述基板21的承载区210的焊垫214。在本实施例中,所述芯片22是选自一具有无线通讯功能的倒装芯片,其有源表面朝向所述基板21,及所述连接元件221是选自锡凸块或金凸块,且可选择裸露所述连接元件221或利用底部填充胶(underfill,未标示)包覆保护所述连接元件221。在另一实施例中,所述芯片22亦可选自一具有无线通讯功能的打线接合芯片(未绘示),其有源表面相对远离所述基板21,及所述连接元件221是选自金属线(未绘示),例如金线,且可选择裸露所述连接元件221或利用封装胶体(未绘示)包覆保护所述芯片22及所述连接元件221。
请再参照图3及4所示,本发明第一实施例的电子元件23的数量可为一个、二个或以上,但至少其中一个所述电子元件23必需具有一接地端子(ground terminal)231,所述接地端子231可利用一导电材料26电性连接到所述基板21的承载区210的辅助接地垫215。再者,所述电子元件23的其他电性端子232可电性连接在所述基板21的承载区210的焊垫214上。所述接地端子231及电性端子232可利用表面贴装技术(SMT)完成上述电性连接结构。在本实施例中,所述电子元件23可选自无源元件(passive element)或有源元件(active element),其中所述无源元件又可选自电阻、电容或电感;及所述有源元件可选自二极管(diode)、三极管(triode)或发光二极管(lightemitting diode,LED),但亦可能选自其他的无源元件或有源元件。再者,所述导电材料26优选是选自焊锡或导电胶,其中导电胶可为掺银粉的导电胶或异方性导电胶(anisotropic conductive film,ACF),但并不限于此。
请再参照图3及4所示,本发明第一实施例的遮蔽罩盖24通常是一中空的金属罩盖,其材质可选自铜、铝、镍、铁、银、金或其合金等,但并不限于此。再者,所述遮蔽罩盖24的表面亦可选择性涂布一层保护层(未绘示),例如镍或金等。在本实施例中,所述遮蔽罩盖24具有一容置空间240、一接地端面241及至少一辅助接地部242。所述容置空间240用以容置所述芯片22及电子元件23。所述接地端面241形成在所述遮蔽罩盖24的容置空间240的开口周缘,所述接地端面241用以电性连接于所述基板21的环形接地垫213。所述辅助接地部242对位于所述基板21的辅助接地垫215,并可通过所述电子元件23的接地端子231电性连接于所述基板21的辅助接地垫215,以形成至少一辅助接地通路“G”。再者,所述遮蔽罩盖24的辅助接地部242优选是一开口,其与所述电子元件23的接地端子231之间另具有一导电材料27。所述开口(即辅助接地部242)有利于由外部将所述导电材料27填入所述遮蔽罩盖24内,以与所述电子元件23的接地端子231形成电性连接。所述导电材料27优选是选自焊锡或导电胶,其中导电胶可为掺银粉的导电胶或异方性导电胶(ACF),但并不限于此。
请再参照图3及4所示,当本发明第一实施例的无线通讯模组封装构造完成组装并进行遮蔽测试时,由所述辅助接地部242、导电材料27、接地端子231、导电材料26及辅助接地垫215共同形成的辅助接地通路“G”将能用以改变所述遮蔽罩盖24的容置空间240的空腔形状,进而改变所述遮蔽罩盖24因空腔谐振(cavity resonance)效应而产生的增强峰值(peak)的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,进而有利于提高遮蔽测试的成品率。例如,在10×10mm尺寸的无线通讯模组封装构造中,若所述遮蔽罩盖24的材质为铜及厚度介于0.1至0.15mm之间,则所述遮蔽罩盖24在具备所述辅助接地通路“G”时所产生的增强峰值大约落在12.0GHz的频率处。相较于图1及2的现有无线通讯模组封装构造的增强峰值大约落在6.0GHz的频率处,本发明的辅助接地通路“G”能使增强峰值位移到一般遮蔽测试的规定频带范围之外。由于所述电磁波的增强峰值将不致于落入所述规定频带范围内,因此将会大幅提高遮蔽测试时的成品率。若上述遮蔽测试的规定频带范围因产品种类不同而改变时,本发明则可在设计所述遮蔽罩盖24时,通过调整所述辅助接地通路“G”的尺寸或数量,以对应改变增强峰值,如此同样可避免增强峰值落入改变后的规定频带范围内,进而适用于各种不同的无线通讯产品中。
请参照图5及6所示,本发明第二实施例的无线通讯模组封装构造相似于本发明第一实施例,且大部分沿用相同的图号,但两者之间的差异在于:在所述第二实施例的无线通讯模组封装构造中,所述遮蔽罩盖24设置一辅助接地部242’,所述辅助接地部242’是一凹陷部,其通过一导电材料27电性连接于所述电子元件23的接地端子231。在本实施例中,可选择在利用冲压方式制作所述遮蔽罩盖24时,一并冲压形成所述凹陷部(即辅助接地部242’);或者,亦可在利用铸造方式制作所述遮蔽罩盖24时,一并铸造形成所述凹陷部(即辅助接地部242’)。所述辅助接地部242’、导电材料27、接地端子231、导电材料26及辅助接地垫215同样可以共同形成一辅助接地通路“G”,以改变所述遮蔽罩盖24的容置空间240的空腔形状,进而改变所述遮蔽罩盖24因空腔谐振效应而产生的增强峰值的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,所以确实有利于提高遮蔽测试的成品率。
请参照图7及8所示,本发明第三实施例的无线通讯模组封装构造相似于本发明第二实施例,且大部分沿用相同的图号,但两者之间的差异在于:在所述第三实施例的无线通讯模组封装构造中,所述遮蔽罩盖24设置一辅助接地部242”,所述辅助接地部242”也是一凹陷部,但其通过所述导电材料27直接电性连接至所述基板21的辅助接地垫215。在本实施例中,同样可选择利用冲压或铸造方式制作所述凹陷部(即辅助接地部242”)。所述辅助接地部242”、导电材料27及辅助接地垫215同样可以共同形成一辅助接地通路“G”,以改变所述遮蔽罩盖24的容置空间240的空腔形状,进而改变所述遮蔽罩盖24因空腔谐振效应而产生的增强峰值的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,所以确实有利于提高遮蔽测试的成品率。
如上所述,相较于现有无线通讯模组封装构造的遮蔽罩盖15容易产生所谓的空腔谐振效应,因而降低遮蔽测试时的成品率等缺点,图2至8的本发明在该基板21的上表面211由该环形接地垫213围绕而成的承载区210设置至少一该辅助接地垫215,其可与该遮蔽罩盖24的辅助接地部242电性连接形成至少一该辅助接地通路“G”,以改变因空腔谐振效应而产生的增强峰值的特性,使增强峰值位移到遮蔽测试的规定频带范围之外,因而确实有利于提高遮蔽测试的成品率。再者,本发明可以仅局部改变该基板21的设计,使该基板21的承载区210内既有的对位用垫进一步接地,即可用以做为该辅助接地垫215,因此不会大幅变更所述基板21的设计、不需增加该基板21的尺寸,且亦有利于降低整体设计成本。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已公开的实施例并未限制本发明的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。
Claims (5)
1.一种无线通讯模组封装构造,其特征在于:所述无线通讯模组封装构造包含:
一基板,其上表面具有一承载区,所述承载区的周围具有一环形接地垫,及所述承载区内具有至少一辅助接地垫;
至少一芯片,设于所述承载区并与所述基板电性连接;
一遮蔽罩盖,具有一容置空间、一接地端面及至少一辅助接地部,所述辅助接地部是一开口,所述容置空间用以容置所述芯片,及所述接地端面电性连接于所述基板的环形接地垫;及
至少一电子元件,所述电子元件具有一接地端子,所述接地端子电性连接在所述遮蔽罩盖的辅助接地部与所述基板的辅助接地垫之间;
其中所述遮蔽罩盖的辅助接地部电性连接于所述基板的辅助接地垫,以形成至少一辅助接地通路。
2.如权利要求1所述的无线通讯模组封装构造,其特征在于:所述电子元件选自无源元件或有源元件。
3.如权利要求1所述的无线通讯模组封装构造,其特征在于:所述电子元件的接地端子与所述遮蔽罩盖的辅助接地部之间另具有一导电材料。
4.如权利要求1所述的无线通讯模组封装构造,其特征在于:所述电子元件的接地端子与所述基板的辅助接地垫之间另具有一导电材料。
5.如权利要求1所述的无线通讯模组封装构造,其特征在于:所述基板的辅助接地垫是所述基板的承载区内的至少一对位用垫。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100074790A CN101800215B (zh) | 2009-02-11 | 2009-02-11 | 无线通讯模组封装构造 |
US12/570,295 US8039930B2 (en) | 2009-02-11 | 2009-09-30 | Package structure for wireless communication module |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN2009100074790A CN101800215B (zh) | 2009-02-11 | 2009-02-11 | 无线通讯模组封装构造 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101800215A CN101800215A (zh) | 2010-08-11 |
CN101800215B true CN101800215B (zh) | 2012-07-04 |
Family
ID=42539735
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2009100074790A Active CN101800215B (zh) | 2009-02-11 | 2009-02-11 | 无线通讯模组封装构造 |
Country Status (2)
Country | Link |
---|---|
US (1) | US8039930B2 (zh) |
CN (1) | CN101800215B (zh) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101924084B (zh) * | 2010-08-18 | 2012-09-19 | 日月光半导体制造股份有限公司 | 半导体封装件与其制造方法 |
CN101937905B (zh) * | 2010-08-23 | 2012-09-05 | 日月光半导体制造股份有限公司 | 半导体封装件与其制造方法 |
TWI473244B (zh) * | 2011-10-05 | 2015-02-11 | Chipsip Technology Co Ltd | 堆疊式半導體封裝結構 |
KR20130111780A (ko) * | 2012-04-02 | 2013-10-11 | 삼성전자주식회사 | Emi 차폐부를 갖는 반도체 장치 |
CN103152068A (zh) * | 2013-02-04 | 2013-06-12 | 日月光半导体制造股份有限公司 | 具无线模块封装构造的通讯装置及其制造方法 |
KR102210332B1 (ko) | 2014-09-05 | 2021-02-01 | 삼성전자주식회사 | 반도체 패키지 |
US9437576B1 (en) | 2015-03-23 | 2016-09-06 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package and method of manufacturing the same |
EP3280047A1 (en) * | 2016-08-02 | 2018-02-07 | Centre For Development Of Telematics | Resonance mitigation in rf high power amplifier enclosure |
WO2018110397A1 (ja) * | 2016-12-14 | 2018-06-21 | 株式会社村田製作所 | モジュール |
US10490493B2 (en) | 2016-12-30 | 2019-11-26 | Innolux Corporation | Package structure and manufacturing method thereof |
CN108538812A (zh) * | 2017-03-06 | 2018-09-14 | 群创光电股份有限公司 | 封装结构 |
US20180254257A1 (en) * | 2017-03-06 | 2018-09-06 | Innolux Corporation | Package structure and method of manufacturing package structure |
US10424545B2 (en) * | 2017-10-17 | 2019-09-24 | Advanced Semiconductor Engineering, Inc. | Semiconductor package device and method of manufacturing the same |
CN107949226A (zh) * | 2017-12-29 | 2018-04-20 | 广州致远电子有限公司 | 一种表面贴装式隔离模块及其制作方法 |
TWI787448B (zh) | 2018-02-01 | 2022-12-21 | 德商漢高股份有限及兩合公司 | 用於屏蔽系統級封裝組件免受電磁干擾的方法 |
CN108601241B (zh) | 2018-06-14 | 2021-12-24 | 环旭电子股份有限公司 | 一种SiP模组及其制造方法 |
CN109712964A (zh) * | 2018-10-16 | 2019-05-03 | 华为机器有限公司 | 一种封装件及其制造方法、以及电子设备 |
US11721639B2 (en) * | 2020-06-29 | 2023-08-08 | Qualcomm Incorporated | Multi-component modules (MCMs) including configurable electro-magnetic isolation (EMI) shield structures, and related methods |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1252923A (zh) * | 1997-04-16 | 2000-05-10 | 艾利森电话股份有限公司 | 一种屏蔽外壳和一种用于制造屏蔽外壳的方法 |
CN1296642A (zh) * | 1998-12-09 | 2001-05-23 | 三菱电机株式会社 | 射频电路模块 |
CN1471805A (zh) * | 2000-10-27 | 2004-01-28 | ¸ | 屏蔽罩 |
CN1491440A (zh) * | 2001-02-06 | 2004-04-21 | 株式会社日立制作所 | 混合集成电路器件及其制造方法和电子装置 |
CN1519919A (zh) * | 2003-01-23 | 2004-08-11 | 矽统科技股份有限公司 | 覆晶封装结构 |
EP1415521B1 (en) * | 2001-08-11 | 2006-06-28 | UbiNetics (VPT) Limited | A method of providing radio frequency screening for electric components |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7629674B1 (en) * | 2004-11-17 | 2009-12-08 | Amkor Technology, Inc. | Shielded package having shield fence |
US7772046B2 (en) * | 2008-06-04 | 2010-08-10 | Stats Chippac, Ltd. | Semiconductor device having electrical devices mounted to IPD structure and method for shielding electromagnetic interference |
US8101460B2 (en) * | 2008-06-04 | 2012-01-24 | Stats Chippac, Ltd. | Semiconductor device and method of shielding semiconductor die from inter-device interference |
US7799602B2 (en) * | 2008-12-10 | 2010-09-21 | Stats Chippac, Ltd. | Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure |
-
2009
- 2009-02-11 CN CN2009100074790A patent/CN101800215B/zh active Active
- 2009-09-30 US US12/570,295 patent/US8039930B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1252923A (zh) * | 1997-04-16 | 2000-05-10 | 艾利森电话股份有限公司 | 一种屏蔽外壳和一种用于制造屏蔽外壳的方法 |
CN1296642A (zh) * | 1998-12-09 | 2001-05-23 | 三菱电机株式会社 | 射频电路模块 |
CN1471805A (zh) * | 2000-10-27 | 2004-01-28 | ¸ | 屏蔽罩 |
CN1491440A (zh) * | 2001-02-06 | 2004-04-21 | 株式会社日立制作所 | 混合集成电路器件及其制造方法和电子装置 |
EP1415521B1 (en) * | 2001-08-11 | 2006-06-28 | UbiNetics (VPT) Limited | A method of providing radio frequency screening for electric components |
CN1519919A (zh) * | 2003-01-23 | 2004-08-11 | 矽统科技股份有限公司 | 覆晶封装结构 |
Also Published As
Publication number | Publication date |
---|---|
CN101800215A (zh) | 2010-08-11 |
US20100200965A1 (en) | 2010-08-12 |
US8039930B2 (en) | 2011-10-18 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101800215B (zh) | 无线通讯模组封装构造 | |
US7928538B2 (en) | Package-level electromagnetic interference shielding | |
US7145511B2 (en) | Apparatus of antenna with heat slug and its fabricating process | |
US8110902B2 (en) | Chip package and manufacturing method thereof | |
US7217993B2 (en) | Stacked-type semiconductor device | |
US6707168B1 (en) | Shielded semiconductor package with single-sided substrate and method for making the same | |
US7042398B2 (en) | Apparatus of antenna with heat slug and its fabricating process | |
US20070045829A1 (en) | Backside ground type flip chip semiconductor package | |
US7436055B2 (en) | Packaging method of a plurality of chips stacked on each other and package structure thereof | |
US20100244166A1 (en) | Multilayer wiring substrate, stack structure sensor package, and method of manufacturing stack structure sensor package | |
US20070053167A1 (en) | Electronic circuit module and manufacturing method thereof | |
TWI594390B (zh) | 半導體封裝件及其製法 | |
CN100511614C (zh) | 多芯片堆叠的封装方法及其封装结构 | |
CN104067389A (zh) | 包括电磁吸收和屏蔽的半导体装置 | |
US20100102430A1 (en) | Semiconductor multi-chip package | |
KR100639701B1 (ko) | 멀티칩 패키지 | |
US7964953B2 (en) | Stacked type chip package structure | |
KR20070076084A (ko) | 스택 패키지와 그 제조 방법 | |
KR20110020548A (ko) | 반도체 패키지 및 그의 제조방법 | |
US20080237821A1 (en) | Package structure and manufacturing method thereof | |
CN102368494A (zh) | 一种抗电磁干扰的芯片封装结构 | |
US20090184404A1 (en) | Electromagnetic shilding structure and manufacture method for multi-chip package module | |
CN102768996A (zh) | 半导体封装构造及其制造方法 | |
US9704812B1 (en) | Double-sided electronic package | |
CN100483661C (zh) | 防止芯片被干扰的封装方法及其封装结构 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant |