CN101797849B - Device and method for rotating data block based on FPGA (Field Programmable Gate Array) according to bit - Google Patents
Device and method for rotating data block based on FPGA (Field Programmable Gate Array) according to bit Download PDFInfo
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Abstract
The invention discloses a device for rotating a data block based on FPGA (Field Programmable Gate Array) according to bit, comprising a data input unit, a data storage unit, a data rotating unit and a data output unit. The invention also discloses a method for rotating the data block based on the FPGA according to the bit, which comprises the steps of data continuous writing control, data dividing-block reading control, data rotating control, data dividing-block writing control and data output control. Compared with the rotation realized by a general computer, the rotation provided by the invention can realize higher rotation efficiency under the utilization of limited FPGA resources.
Description
Technical field
The present invention relates to FPGA technology and digit printing technology, is that a kind of data block based on FPGA is by bit whirligig and method specifically.
Background technology
In the structure of stamp printer, handling the utilization all-purpose computer for the rotation of data finishes, and all-purpose computer is not high for the efficient on the rotary manipulation of bit, can't satisfy the needed data throughout of printing machine flying print, so become the key point of printing machine in data by the speed of bit rotation, the efficient of its rotation has directly influenced the production capacity of printing machine.
The FPGA technology has obtained develop rapidly in recent years, can be towards the compute-intensive applications of complexity from changing into towards the application that pure logic substitutes at first.In the FPGA device of up-to-date release, not only be integrated with abundant configurable logic block resource (Configurable Logic Block, CLB), (BlockRAM is BRAM) with the RocketIO GTP transceiver unit that is used for high-speed serial communication also to comprise a large amount of DSP unit towards the computation-intensive application, block RAM.For making things convenient for the debugging of FPGA, each FPGA manufacturer has also released logic analysis testing tool (as the ChipScope of Xilinx company) in the sheet, in the feasibility that has guaranteed to realize high-performance calculation on the software and hardware on FPGA simultaneously.
Summary of the invention
The invention provides a kind of employing based on the data block of FPGA by the bit spinning solution, improve the rotation efficiency of data, to realize the dynamical output of printing machine.
A kind of data block based on FPGA is pressed the method for bit rotation, comprising:
(1) data write the step of control continuously, and pending data block is write buffer memory in order continuously, identify data block to be rotated, and the data block that does not need to rotate is directly exported;
Pending data block is write in order continuously fashionable, write a pending data block to buffer memory at every turn, and write until this pending data block and to carry out the step that deblocking reads control when finishing again.
(2) deblocking reads the step of control, and data block to be rotated is divided into the experimental process data block by the size of 64bit * 64bit, reads all sub-blocks one by one;
(3) step of data rotation control is rotated the sub-block that reads in;
(4) deblocking writes the step of control, and postrotational sub-block is write buffer memory, and the address of postrotational sub-block in buffer memory is the preceding address of its rotation;
(5) step of data output control is after sub-blocks all in the data block to be rotated is all finished rotation (be that data block whole to be rotated has been finished rotation, obtained postrotational data block), with postrotational data block output in the buffer memory.
When postrotational data block is exported, continue the current postrotational data block of output, finish, carry out the output of next postrotational data block again until this postrotational data block output.
The present invention also provides the device of a kind of data block based on FPGA by the bit rotation, comprising: data input cell, data storage cell, data rotary unit and data output unit, wherein:
Described data input cell is used for continuously pending data block being read in order;
Described data storage cell, being used for pending data block in data input cell identifies the data block that does not need to rotate and directly exports, data block to be rotated is divided into the experimental process data block by the size of 64bit x 64bit, read all sub-blocks one by one and be sent to the data rotary unit, also be used for reading in the sub-block that the data rotary unit is finished rotation;
Described data rotary unit is used for the sub-block that data storage cell sends is rotated;
Described data output unit is used for after all sub-blocks of data block to be rotated are all finished rotation, will finish the data block output of rotation in the data storage cell.
The present invention at the rotation strategy for big data block is: the data block that the data of bulk is divided into 64bit * 64bit size is carried out the piecemeal rotation, select the size of 64bit * 64bit can realize using the RAM piece resource of FPGA inside, also considered simultaneously the shared logical resource of fritter rotation, simultaneously, the bit wide of the DDR2 memory of outside expansion is 16bit, 64bit just in time is that the burst length of DDR2 is a burst operation of 4, can improve the operating efficiency of DDR2, in comprehensively descending of above factor, adopted the piecemeal of such size to realize the rotation of bulk, clearly the present invention has with the next one the data block of needs rotation and requires: the width of data block and highly must be the integral multiple of 64bit.
In conjunction with concrete technical field, the invention provides the method for a kind of digital decorating machine scan line based on FPGA by the bit rotation, comprise the steps
(1) data write the step of control continuously, with pending digital decorating machine scan line (scan line promptly to be printed, in the existing digit printing technology, shower nozzle number according to printer is divided into several scan lines with complete image) write buffer memory in order continuously, identify digital decorating machine scan line to be rotated, the digital decorating machine scan line that does not need to rotate is directly exported;
Pending digital decorating machine scan line is write in order continuously fashionable, write a pending digital decorating machine scan line to buffer memory at every turn, and write until this pending digital decorating machine scan line and to carry out the step that deblocking reads control when finishing again.
(2) deblocking reads the step of control, and digital decorating machine scan line to be rotated is divided into the experimental process data block by the size of 64bitx 64bit, reads all sub-blocks one by one;
(3) step of data rotation control is rotated the sub-block that reads in;
(4) deblocking writes the step of control, and postrotational sub-block is write buffer memory, and the address of postrotational sub-block in buffer memory is the preceding address of its rotation;
(5) step of data output control, after sub-blocks all in the digital decorating machine scan line to be rotated is all finished rotation (is that digital decorating machine scan line whole to be rotated has been finished rotation, obtained postrotational digital decorating machine scan line), with postrotational digital decorating machine scan line output in the buffer memory.
When postrotational digital decorating machine scan line is exported, continue the current postrotational digital decorating machine scan line of output, finish, carry out the output of next postrotational digital decorating machine scan line again until this postrotational digital decorating machine scan line output.
The inventive method can improve the rotation efficiency of data, realizes the dynamical output of printing machine.
Description of drawings
The functional schematic that Fig. 1 realizes for apparatus of the present invention;
Fig. 2 is the internal structure schematic diagram of apparatus of the present invention;
Fig. 3 is the schematic diagram of the finite state machine of data storage cell in apparatus of the present invention;
Fig. 4 is a data storage schematic block diagram after piecemeal rotates in the data storage cell in apparatus of the present invention;
Fig. 5 is the flow chart of the inventive method.
The specific embodiment
As shown in Figure 1, the work finished of the present invention matrix that is about to a M bit * N bit realizes rotating to be the matrix of N bit * M bit.
As shown in Figure 2, the internal structure of whirligig of the present invention comprises: data input cell 110, data storage cell 120, data rotary unit 130 and data output unit 140, wherein:
Described data input cell 110 is used for continuously pending data block being read in order;
Data block is a scan line to be printed of digital decorating machine; In existing digital decorating machine field, generally be industrial computer by software will be to be printed scan line be rotated, and the present invention is rotated scan line to be printed after industrial computer transfers to data input cell 110 again.In order to adapt to the transfer of data between industrial computer and the data input cell 110, can be that the scan line that industrial computer earlier will be to be printed is packed, transmit (comprising to the reception of the back data of packing, parsing etc.) to data input cell 110 by intermediate equipment again.Intermediate equipment can adopt general flush bonding processor and corresponding storage chip.
Described data storage cell 120, being used for pending data block in data input cell 110 identifies the data block that does not need to rotate and directly exports, data block to be rotated is divided into the experimental process data block by the size of 64bit x64bit, read all sub-blocks one by one and be sent to data rotary unit 130, also be used for reading in the sub-block that data rotary unit 130 is finished rotation;
Described data rotary unit 130 is used for the sub-block that data storage cell 120 sends is rotated;
Described data output unit 140 is used for after all sub-blocks of data block to be rotated are all finished rotation, will finish the data block output of rotation in the data storage cell 120.
As shown in Figure 3, the finite state machine of data storage cell, it is as follows to work:
After system resets, data storage cell at first enters idle condition, when the request of data inputs, jump into the state that data write continuously, after having finished data and writing continuously, if data block does not need rotation, then enter the state that data read continuously, up to being read continuously, data enter idle condition after finishing, if data block needs rotation, then enter deblocking reading state (being reading of sub-block), finish the reading of sub-block after, enter idle condition, after waiting for that sub-block is finished rotation, the sub-block that needs to finish rotation writes data storage cell, enters deblocking write state (being writing of sub-block), judges whether all sub-blocks have all been finished rotation after writing finishing, if not, then jump into the deblocking reading state, the operation of the piecemeal rotation of loop-around data, if, then enter the state that data are jumped and read, read order according to specific address data are read, finished, enter idle condition up to whole data block is read.
As shown in Figure 4, because the sub-block of 64bit * 64bit has been realized data line before rotation and after the rotation, the conversion of row, so in order to export complete row, pictorial data after the conversion of row, when whole data block is exported, at first begin to read first row of block1 (a postrotational sub-block), be first row of block 2 then, ... up to first row of block N/64, next begin second row of block 1, be second row of block 2 then, ... up to second row of block N/64, ... before finishing after the reading of 64 line data of N/64 block, first row of beginning block (N/64+1), first row of block (N/64+2) ... by that analogy, all data reads are finished.
Need to prove, first row of block1 is first row of this sub-block (not rotation), by that analogy, the postrotational data of piecemeal are at the storage mode of data storage cell as can be seen, and the address change rule that reads of the jump of data, can export pictorial data after the conversion of complete row, column by such way of output so.
As shown in Figure 5, when adopting the inventive method logarithmic code printing machine scan line to press the bit rotation, comprise the steps
Pending digital decorating machine scan line is write buffer memory in order continuously, identify digital decorating machine scan line to be rotated, the digital decorating machine scan line that does not need to rotate is directly exported;
Digital decorating machine scan line to be rotated is divided into the experimental process data block by the size of 64bit * 64bit, reads all sub-blocks one by one;
The sub-block that reads in is rotated;
Postrotational sub-block is write buffer memory, and the address of postrotational sub-block in buffer memory is the preceding address of its rotation;
After sub-blocks all in the digital decorating machine scan line to be rotated is all finished rotation (is that digital decorating machine scan line whole to be rotated has been finished rotation, obtained postrotational digital decorating machine scan line), with postrotational digital decorating machine scan line output in the buffer memory.
When postrotational digital decorating machine scan line is exported, continue the current postrotational digital decorating machine scan line of output, finish, carry out the output of next postrotational digital decorating machine scan line again until this postrotational digital decorating machine scan line output.
Claims (5)
1. the data block based on FPGA is pressed the method that bit rotates, and it is characterized in that, comprising:
Data write the step of control continuously, and pending data block is write buffer memory in order continuously, identify data block to be rotated, and the data block that does not need to rotate is directly exported;
Deblocking reads the step of control, and data block to be rotated is divided into the experimental process data block by the size of 64bit * 64bit, reads all sub-blocks one by one;
The step of data rotation control is rotated the sub-block that reads in;
Deblocking writes the step of control, and postrotational sub-block is write buffer memory, and the address of postrotational sub-block in buffer memory is the preceding address of its rotation;
The step of data output control is after sub-blocks all in the data block to be rotated is all finished rotation, with postrotational data block output in the buffer memory.
2. the method for claim 1 is characterized in that, described data write in the step of control continuously, writes a pending data block to buffer memory at every turn, and carries out the step that deblocking reads control when finishing again until writing.
3. the method for claim 1 is characterized in that, in the step of described data output control, postrotational data block is continued output finish until this postrotational data block output, carries out the output of next postrotational data block again.
4. the data block based on FPGA is pressed the device of bit rotation, it is characterized in that, comprising: data input cell (110), data storage cell (120), data rotary unit (130) and data output unit (140), wherein:
Described data input cell (110) is used for continuously pending data block being read in order;
Described data storage cell (120), being used for pending data block in data input cell (110) identifies the data block that does not need to rotate and directly exports, data block to be rotated is divided into the experimental process data block by the size of 64bit * 64bit, read all sub-blocks one by one and be sent to data rotary unit (130), also be used for reading in the sub-block that data rotary unit (130) is finished rotation;
Described data rotary unit (130) is used for the sub-block that data storage cell (120) sends is rotated;
Described data output unit (140) is used for after all sub-blocks of data block to be rotated are all finished rotation, will finish the data block output of rotation in the data storage cell (120).
5. the digital decorating machine scan line based on FPGA is pressed the method that bit rotates, and comprises the steps
(1) data write the step of control continuously, and pending digital decorating machine scan line is write buffer memory in order continuously, identify digital decorating machine scan line to be rotated, and the digital decorating machine scan line that does not need to rotate is directly exported;
(2) deblocking reads the step of control, and digital decorating machine scan line to be rotated is divided into the experimental process data block by the size of 64bit * 64bit, reads all sub-blocks one by one;
(3) step of data rotation control is rotated the sub-block that reads in;
(4) deblocking writes the step of control, and postrotational sub-block is write buffer memory, and the address of postrotational sub-block in buffer memory is the preceding address of its rotation;
(5) step of data output control is after sub-blocks all in the digital decorating machine scan line to be rotated is all finished rotation, with postrotational digital decorating machine scan line output in the buffer memory.
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| CN102555550B (en) * | 2011-12-30 | 2014-04-16 | 浙江大学 | High-speed image data rotation processing system and method for printing machine based on multi-core processor |
| CN104734810A (en) * | 2012-06-07 | 2015-06-24 | 飞天诚信科技股份有限公司 | Method and device for processing transmission data |
| CN110211039B (en) * | 2019-04-29 | 2021-03-23 | 西安电子科技大学 | Image processing method and device |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN101365038A (en) * | 2005-08-04 | 2009-02-11 | 理光打印系统有限公司 | Image processing apparatus |
| CN101441674A (en) * | 2008-12-15 | 2009-05-27 | 浙江大学 | Chip allocation method of dynamic reconfigurable system based on FPGA |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101365038A (en) * | 2005-08-04 | 2009-02-11 | 理光打印系统有限公司 | Image processing apparatus |
| CN101441674A (en) * | 2008-12-15 | 2009-05-27 | 浙江大学 | Chip allocation method of dynamic reconfigurable system based on FPGA |
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