CN114500146B - Model design-based test verification environment building system and verification method - Google Patents

Model design-based test verification environment building system and verification method Download PDF

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CN114500146B
CN114500146B CN202111638309.XA CN202111638309A CN114500146B CN 114500146 B CN114500146 B CN 114500146B CN 202111638309 A CN202111638309 A CN 202111638309A CN 114500146 B CN114500146 B CN 114500146B
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CN114500146A (en
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郭杰
侯天祥
邢锴
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Nanjing Jieaoxin Micro Technology Co ltd
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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00Data switching networks
    • H04L12/28Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/40Bus networks
    • H04L12/40006Architecture of a communication node
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/382Information transfer, e.g. on bus using universal interface adapter
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/42Bus transfer protocol, e.g. handshake; Synchronisation
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/14Network analysis or design
    • H04L41/145Network analysis or design involving simulating, designing, planning or modelling of a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/08Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L69/00Network arrangements, protocols or services independent of the application payload and not provided for in the other groups of this subclass
    • H04L69/08Protocols for interworking; Protocol conversion
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/134Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the element, parameter or criterion affecting or controlling the adaptive coding
    • H04N19/146Data rate or code amount at the encoder output
    • H04N19/149Data rate or code amount at the encoder output by estimating the code amount by means of a model, e.g. mathematical model or statistical model

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Abstract

The invention discloses a test verification environment building system and a verification method based on model design, and relates to the technical field of chip test verification. The test verification environment construction system comprises: the system comprises a bus module, a first storage and cache module, a second storage and cache module, a first protocol conversion module, a second protocol conversion module, a state control module and a prototype to be tested, wherein the first storage and cache module, the first protocol conversion module, the prototype to be tested, the second protocol conversion module, the second storage and cache module are sequentially connected through the bus module, and the state control module is respectively connected with the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module. Prototype verification is performed by the test verification environment building system, so that the building efficiency of the test verification environment can be improved to quickly adapt to prototypes to be tested of different architectures.

Description

Model design-based test verification environment building system and verification method
Technical Field
The invention relates to the technical field of chip test verification, in particular to a test verification environment building system and a verification method based on model design.
Background
With the improvement of chip performance and the integration of more and more functions, the complexity of the chip is also more and more complex, and the cost of chip verification is also higher and higher. The field programmable gate array (Fied Programmable Gate Array, FPGA) can perform Register-Transfer Level (RTL) verification, accelerate the simulation progress, and develop embedded applications in advance, so prototype test verification of the FPGA is essential in the current digital chip design. And because the cost of chip flow is multiplied with the progress of flow process, the chip function must be guaranteed before flow, and the method is usually adopted to transfer the design engineering to the FPGA verification test platform for testing.
The prototype test verification environment is the part of the periphery of the chip that is responsible for generating stimulus and transmitting to the chip as well as receiving data from the chip. For different chips, the test verification environment needs to construct corresponding data flow directions, storage structures, bus protocols and interaction interfaces with the chips, and the parts occupy most of the workload of environment construction.
The speed of construction and efficiency of the prototype test verification environment greatly affect the rate of prototype verification to be tested, which ultimately affects the chip integration progress and thus the chip time to market. The current prototype verification mostly directly sends data to be tested to the prototype to be tested in a format conforming to the input data interface protocol of the prototype to be tested, and as the data interface protocols of a plurality of prototypes to be tested are different, for a single test verification environment, the variety of prototypes to be tested which can be verified is less, a great deal of time and cost and effort are consumed for replacing the test verification environment, and how to improve the building speed of the prototype test verification environment is a problem to be solved by the technicians in the field.
Disclosure of Invention
Aiming at the problems in the prior art, the invention provides a test verification environment building system and a verification method based on model design, which can improve the building efficiency of the test verification environment so as to quickly adapt to prototypes to be tested of different architectures.
In order to achieve the technical purpose, the invention adopts the following technical scheme: a model design-based test verification environment construction system, comprising: the system comprises a bus module, a first storage and cache module, a second storage and cache module, a first protocol conversion module, a second protocol conversion module, a state control module and a prototype to be tested, wherein the first storage and cache module, the first protocol conversion module, the prototype to be tested, the second protocol conversion module, the second storage and cache module are sequentially connected through the bus module, and the state control module is respectively connected with the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module; the bus module is used for realizing data transmission in the test verification environment building system; the first storage and caching module is used for caching externally input data to be tested or configuration information; the first protocol conversion module is used for converting an externally input data format into a format matched with a prototype data interface to be tested; the second protocol conversion module is used for matching the data format output by the prototype to be tested with the format of the output external interface; the second storage and buffer module is used for buffering test data output by the prototype to be tested; the state control module is used for coordinating the work of the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module.
Further, the bus module is provided with: an AXI-Lite module, an AXI-Full module, an AXI-Stream module, a UART module, an SPI bus module and a custom handshake interface channel module; the AXI-Lite module is used for distributing configuration information of a prototype to be tested in a test verification environment, the AXI-Full module is used for distributing and transmitting large-scale data in the test verification environment, the AXI-Stream module is used for large-scale moving tasks without address data in the test verification environment, the UART module and the SPI bus module are both used for communicating configuration information between the prototype to be tested and the test verification environment, and the custom handshake interface channel module is used for communication requirements of other types of custom interfaces.
Further, the first storage and cache module, the second storage and cache module each include: the device comprises a synchronous dual-port RAM, an asynchronous dual-port RAM, a synchronous FIFO, an asynchronous FIFO, an AXI interface FIFO and a DDR module, wherein the synchronous dual-port RAM is used for buffering similar image structure information or data needing to be reformed, the asynchronous dual-port RAM is used for buffering similar image structure information or data needing to be reformed, buffering single data of a data type and data cross-clock operation aiming at the data structure requirement, the synchronous FIFO is used for buffering data with sequence requirement, the asynchronous FIFO is used for data cross-clock operation aiming at the data structure requirement, the AXI interface FIFO is used for verifying data buffering of an AXI interface in the environment, and the DDR module is used for storing a large amount of data similar to video or image stream and data to be sent after processing or processing.
Further, the first protocol conversion module and the second protocol conversion module each include: the system comprises an AXI-Lite-to-UART module, an AXI-Lite-to-SPI module, an UART-to-AXI-Lite module, an SPI-to-AXI-Lite module, an AXI-Full-to-AXI-Stream module, an AXI-Stream-to-field line synchronization module, a field line synchronization-to-AXI-Stream module and an AXI-to-AXI-Ful module, wherein the AXI-Lite-to-UART module and the AXI-Lite-to-SPI module are used for writing and converting configuration information of a prototype to be tested, the UART-to-AXI-Lite module and the SPI-to-AXI-Lite module are used for reading and converting configuration information of the prototype to be tested, and the AXI-Full-to-Stream-to-field line synchronization module is used for converting data with the prototype to be tested; the field line synchronous to AXI-Stream module and the AXI-Stream to AXI-Ful module are used for read-back conversion of output data of a prototype to be tested.
The invention also provides a verification method of the test verification environment building system based on the model design, which comprises the following steps:
(1) For input data to be tested, selecting a proper data transfer bus in a bus module according to the data scale and the format, transmitting the data to be tested to a first storage and cache module through the data transfer bus, monitoring the data storage capacity in the first storage and cache module by a state control module, and controlling the first storage and cache module to issue the data to be tested through the state control module;
(2) The first protocol conversion module receives data to be tested of the first storage and cache module, and meanwhile, the state control module controls protocol configuration of the first protocol conversion module, converts the data to be tested into a protocol suitable for an interface of a prototype to be tested, and sends the protocol to the inside of the prototype to be tested;
(3) After the prototype to be tested receives the protocol, data verification is carried out, the verified data is transmitted to the second protocol conversion module, the state control module controls the protocol configuration of the second protocol conversion module, the verified data is converted into the bus protocol and then is input into the second storage and cache module, the state control module controls the data issuing of the second storage and cache module, and the data is output through the bus module.
Compared with the prior art, the invention has the following beneficial effects: according to the invention, the bus module, the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module of the system are built based on the test verification environment of the model design, so that the building efficiency of the test verification environment can be improved to quickly adapt to prototypes to be tested of different architectures, and the development flow of chips is accelerated; in addition, when the test verification environment needs to be modified, the invention can only replace the specific model in the corresponding module and simply modify the data stream transmission logic in the state control module, without changing the whole large framework, thereby improving the efficiency of the whole verification process.
Drawings
FIG. 1 is a flow chart of a verification method of the test verification environment building system based on model design.
Detailed Description
The technical scheme of the invention is further explained below with reference to the attached drawings and specific embodiments.
The invention provides a test verification environment building system based on model design, which comprises a bus module, a first storage and cache module, a second storage and cache module, a first protocol conversion module, a second protocol conversion module, a state control module and a prototype to be tested, wherein the first storage and cache module, the first protocol conversion module, the prototype to be tested, the second protocol conversion module, the second storage and cache module are sequentially connected through the bus module, and the state control module is respectively connected with the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module; the bus module is used for realizing data transmission in the test verification environment building system; the first storage and caching module is used for caching externally input data to be tested or configuration information; the first protocol conversion module is used for converting an externally input data format into a format matched with a prototype data interface to be tested; the second protocol conversion module is used for matching the data format output by the prototype to be tested with the format of the output external interface; the second storage and buffer module is used for buffering test data output by the prototype to be tested; the state control module is used for coordinating the work of the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module, reasonably controlling the storage amounts of the first storage and cache module, the second storage and cache module and the working states of the first protocol conversion module and the second protocol conversion module according to the data type, the data format and the prototype to be tested, and improving the construction efficiency of the test verification environment so as to quickly adapt to the prototypes to be tested of different architectures.
The bus module provides a multi-clock type bus: parallel or serial, high speed or low speed, can be selected for use according to the characteristics of the prototype to be tested. Therefore, the bus module of the present invention is provided with: an AXI-Lite module, an AXI-Full module, an AXI-Stream module, a UART module, an SPI bus module and a custom handshake interface channel module; the AXI-Lite module is used for distributing configuration information of a prototype to be tested in the test and verification environment, the AXI-Full module is used for distributing and transmitting large-scale data in the test and verification environment, the AXI-Stream module is used for large-scale moving tasks without address data in the test and verification environment, the UART module and the SPI bus module are both used for exchanging configuration information between the prototype to be tested and the test and verification environment, and the custom handshake interface channel module is used for communication requirements of other types of custom interfaces. The transmission speed, the transmission format and the composition structure of the data to be tested have different requirements on different transmission paths, and the transmission speed, the transmission format and the composition structure of the data to be tested have different requirements on different prototypes to be tested, so that a plurality of buses are arranged in the bus module to adapt to more prototypes to be tested, and the establishment of a test verification environment can be completed more quickly.
According to the data type and the data size, a proper first storage and cache module, a second storage and cache module can be selected, and the first storage and cache module, the second storage and cache module in the invention comprise: the system comprises a synchronous dual-port RAM, an asynchronous dual-port RAM, a synchronous FIFO, an asynchronous FIFO, an AXI interface FIFO and a DDR module, wherein the synchronous dual-port RAM is used for buffering similar image structure information or data needing to be reformed, the asynchronous dual-port RAM is used for buffering similar image structure information or data needing to be reformed, buffering single data of a data type and data cross-clock operation aiming at the data structure requirement, the synchronous FIFO is used for buffering data with sequence requirement, the asynchronous FIFO is used for data cross-clock operation aiming at the data structure requirement, the AXI interface FIFO is used for verifying data buffering of the AXI interface in the environment, and the DDR module is used for storing a large amount of data such as video or image stream and data to be sent after being processed or processed. Because the transmission speed, transmission format and composition structure of the data to be tested have different requirements on different prototypes to be tested, multiple storage modules are arranged in the first storage and cache module, the second storage and the cache module, so that the data to be tested can adapt to more prototypes to be tested, and the storage modules to be selected can complete the establishment of a test verification environment more quickly.
According to different prototypes to be tested, the first protocol conversion module and the second protocol conversion module are matched with the prototype interface to be tested, so that the first protocol conversion module and the second protocol conversion module in the invention comprise: the system comprises an AXI-Lite-to-UART module, an AXI-Lite-to-SPI module, an UART-to-AXI-Lite module, an SPI-to-AXI-Lite module, an AXI-Full-to-AXI-Stream module, an AXI-Stream-to-field-line synchronous module, an AXI-to-AXI-Ful module, an AXI-Lite-to-UART module and an AXI-Lite-to-SPI module which are all used for writing and converting configuration information of a prototype to be tested, wherein the UART-to-AXI-Lite module and the SPI-to-AXI-Lite module are all used for reading and converting configuration information of the prototype to be tested, and the AXI-Full-to-AXI-Stream synchronous module is used for converting data of the prototype to be tested with the prototype to be tested; the field line synchronous to AXI-Stream module and the AXI-Stream to AXI-Ful module are used for read-back conversion of output data of a prototype to be tested. Because the transmission speed, transmission format and composition structure of the data to be tested have different requirements for different prototypes to be tested, the arrangement of multiple protocol conversion modules in the first protocol conversion module and the second protocol conversion module can adapt to more data transmission interfaces of the prototypes to be tested, and the protocol conversion modules to be selected can complete the establishment of test verification environments more quickly.
FIG. 1 is a flow chart of a verification method of a test verification environment building system based on model design, the verification method comprises the following steps:
(1) For input data to be tested, selecting a proper data transfer bus in a bus module according to the data scale and the format, transmitting the data to be tested to a first storage and cache module through the data transfer bus, monitoring the data storage capacity in the first storage and cache module by a state control module, and controlling the first storage and cache module to issue the data to be tested through the state control module;
(2) The first protocol conversion module receives data to be tested of the first storage and cache module, and meanwhile, the state control module controls protocol configuration of the first protocol conversion module, converts the data to be tested into a protocol suitable for an interface of a prototype to be tested, and sends the protocol to the inside of the prototype to be tested;
(3) After the prototype to be tested receives the protocol, data verification is carried out, the verified data is transmitted to the second protocol conversion module, the state control module controls the protocol configuration of the second protocol conversion module, the verified data is converted into the bus protocol and then is input into the second storage and cache module, the state control module controls the data issuing of the second storage and cache module, and the data is output through the bus module.
The verification method of the test verification environment building system based on the model design realizes the verification environment which can be adapted to almost all prototypes to be tested with a simple structure, selects a proper module according to the prototypes to be tested and builds an optimal verification environment, and the built verification environment is clear and modularized, and has high resource utilization rate, small data delay and large throughput.
Example 1
The embodiment is directed to prototype test verification of a video compression chip, and the specific verification process is as follows:
(1) The video compression involves huge data volume, video compression data is input into the DDR module through the AXI-Full module, a state control module monitors the data storage amount in the DDR module, and the DDR module is controlled to issue data to be tested through the state control module;
(2) The method comprises the steps that an AXI-Full-to-AXI-Stream module receives data to be tested of a DDR module, meanwhile, a state control module controls protocol configuration of the AXI-Full-to-AXI-Stream module, and the AXI-Full protocol is converted into an AXI-Stream interface and is sent to the inside of a prototype to be tested;
(3) After the prototype to be tested receives the protocol, data verification is carried out, the verified data is transmitted to an AXI-Stream-to-AXI-Full module, a state control module controls the protocol configuration of the AXI-Stream-to-AXI-Full module, the AXI-Stream bus protocol is converted into an AXI-Full interface, the AXI-Stream interface is input into a DDR module, the data issuing of the DDR module is controlled through the state control module, and the AXI-Full module outputs the data.
The verification method is very suitable for video data transmission and has the characteristics of high speed and low delay; the bus module has clear structure, can provide data to be tested for the video compression chip faster, and is unlikely to cause the situation of fracture of video stream.
Example 2
The embodiment is prototype test verification for image data with small data volume, and the specific verification process is as follows:
(1) Inputting image data with small data quantity into an AXI interface FIFO through an AXI-Stream module, monitoring data storage quantity in the AXI interface FIFO by a state control module, and controlling the AXI interface FIFO to send data to be tested through the state control module;
(2) The AXI-Stream transition line synchronization module receives data to be tested of an AXI interface FIFO, and meanwhile, the state control module controls protocol configuration of the AXI-Stream transition line synchronization module, converts an AXI-Stream protocol into a field line synchronization interface and sends the field line synchronization interface to the inside of a prototype to be tested;
(3) After the prototype to be tested receives the protocol, data verification is carried out, the verified data is transmitted to the field line synchronization AXI-Stream conversion module, the state control module controls the protocol configuration of the field line synchronization AXI-Stream conversion module, the field line synchronization protocol is converted into an AXI-Stream interface, the AXI interface is input into an AXI interface FIFO, the data transmission of the AXI interface FIFO is controlled by the state control module, and the AXI-Stream module outputs the data.
The verification method is very suitable for the transmission of image data, the storage structure and the bus structure of the verification method are suitable for the characteristics of the image data, the bus module structure is clear, resources are saved, and the construction of a test verification environment is completed with the highest resource utilization rate.
The verification method of the test verification environment building system based on the model design is suitable for verifying data like image structure information, reforming data, single data type, video and the like, so that the building efficiency of the test verification environment is improved to quickly adapt to prototypes to be tested of different architectures, and the development flow of chips is accelerated.
The above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the invention without departing from the principles thereof are intended to be within the scope of the invention as set forth in the following claims.

Claims (2)

1. A model design-based test verification environment construction system, comprising: the system comprises a bus module, a first storage and cache module, a second storage and cache module, a first protocol conversion module, a second protocol conversion module, a state control module and a prototype to be tested, wherein the first storage and cache module, the first protocol conversion module, the prototype to be tested, the second protocol conversion module, the second storage and cache module are sequentially connected through the bus module, and the state control module is respectively connected with the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module; the bus module is used for realizing data transmission in the test verification environment building system; the first storage and caching module is used for caching externally input data to be tested or configuration information; the first protocol conversion module is used for converting an externally input data format into a format matched with a prototype data interface to be tested; the second protocol conversion module is used for matching the data format output by the prototype to be tested with the format of the output external interface; the second storage and buffer module is used for buffering test data output by the prototype to be tested; the state control module is used for coordinating the work of the first storage and cache module, the second storage and cache module, the first protocol conversion module and the second protocol conversion module;
the bus module is provided with: an AXI-Lite module, an AXI-Full module, an AXI-Stream module, a UART module, an SPI bus module and a custom handshake interface channel module; the AXI-Lite module is used for distributing configuration information of a prototype to be tested in a test and verification environment, the AXI-Full module is used for distributing and transmitting large-scale data in the test and verification environment, the AXI-Stream module is used for large-scale moving tasks without address data in the test and verification environment, the UART module and the SPI bus module are both used for exchanging configuration information between the prototype to be tested and the test and verification environment, and the custom handshake interface channel module is used for communication requirements of other types of custom interfaces;
the first storage and cache module, the second storage and cache module all include: a synchronous dual-port RAM for buffering of data having similar image structure information or requiring buffering of data to be reformed, and data cross-clock operation for data structure requirement, a synchronous FIFO for buffering of data having precedence requirement, an asynchronous FIFO for data cross-clock operation for data structure requirement, an AXI interface FIFO for verifying data buffering of an AXI interface in an environment, and a DDR module for storing of a large amount of data like video or image stream and data to be transmitted to be processed or after processing;
the first protocol conversion module and the second protocol conversion module both comprise: the system comprises an AXI-Lite-to-UART module, an AXI-Lite-to-SPI module, an UART-to-AXI-Lite module, an SPI-to-AXI-Lite module, an AXI-Full-to-AXI-Stream module, an AXI-Stream-to-field line synchronization module, a field line synchronization-to-AXI-Stream module and an AXI-to-AXI-Ful module, wherein the AXI-Lite-to-UART module and the AXI-Lite-to-SPI module are used for writing and converting configuration information of a prototype to be tested, the UART-to-AXI-Lite module and the SPI-to-AXI-Lite module are used for reading and converting configuration information of the prototype to be tested, and the AXI-Full-to-Stream-to-field line synchronization module is used for converting data with the prototype to be tested; the field line synchronous to AXI-Stream module and the AXI-Stream to AXI-Ful module are used for read-back conversion of output data of a prototype to be tested.
2. A verification method of a model-design-based test verification environment construction system as claimed in claim 1, comprising the steps of:
(1) For input data to be tested, selecting a proper data transfer bus in a bus module according to the data scale and the format, transmitting the data to be tested to a first storage and cache module through the data transfer bus, monitoring the data storage capacity in the first storage and cache module by a state control module, and controlling the first storage and cache module to issue the data to be tested through the state control module;
(2) The first protocol conversion module receives data to be tested of the first storage and cache module, and meanwhile, the state control module controls protocol configuration of the first protocol conversion module, converts the data to be tested into a protocol suitable for an interface of a prototype to be tested, and sends the protocol to the inside of the prototype to be tested;
(3) After the prototype to be tested receives the protocol, data verification is carried out, the verified data is transmitted to the second protocol conversion module, the state control module controls the protocol configuration of the second protocol conversion module, the verified data is converted into the bus protocol and then is input into the second storage and cache module, the state control module controls the data issuing of the second storage and cache module, and the data is output through the bus module.
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