CN101783682B - 一种折叠结构adc及其纠错方法 - Google Patents
一种折叠结构adc及其纠错方法 Download PDFInfo
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CN200910105079.3A CN101783682B (zh) | 2009-01-16 | 2009-01-16 | 一种折叠结构adc及其纠错方法 |
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CN200910105079.3A CN101783682B (zh) | 2009-01-16 | 2009-01-16 | 一种折叠结构adc及其纠错方法 |
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CN101783682A CN101783682A (zh) | 2010-07-21 |
CN101783682B true CN101783682B (zh) | 2014-09-24 |
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Families Citing this family (3)
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CN102170292B (zh) * | 2011-01-31 | 2014-05-07 | 华为技术有限公司 | 一种数据处理方法、数据处理系统以及相关设备 |
US8816887B2 (en) * | 2012-09-21 | 2014-08-26 | Analog Devices, Inc. | Sampling circuit, a method of reducing distortion in a sampling circuit, and an analog to digital converter including such a sampling circuit |
CN105812617B (zh) * | 2014-12-30 | 2020-04-03 | 深圳开阳电子股份有限公司 | 一种视频adc实时校正电路及方法 |
Citations (2)
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US5990815A (en) * | 1997-09-30 | 1999-11-23 | Raytheon Company | Monolithic circuit and method for adding a randomized dither signal to the fine quantizer element of a subranging analog-to digital converter (ADC) |
CN1481077A (zh) * | 2002-09-06 | 2004-03-10 | 中国科学院半导体研究所 | 用于折叠插值模数转换器的动态匹配方法 |
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Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US5990815A (en) * | 1997-09-30 | 1999-11-23 | Raytheon Company | Monolithic circuit and method for adding a randomized dither signal to the fine quantizer element of a subranging analog-to digital converter (ADC) |
CN1481077A (zh) * | 2002-09-06 | 2004-03-10 | 中国科学院半导体研究所 | 用于折叠插值模数转换器的动态匹配方法 |
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Denomination of invention: Foldable structure ADC and error correction method thereof Effective date of registration: 20150129 Granted publication date: 20140924 Pledgee: Shenzhen high tech investment and financing Company limited by guarantee Pledgor: Aike Chuangxin Microelectronic Co., Ltd. Registration number: 2015990000082 |
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Address after: 518057 Guangdong science and technology two Road Software Park, phase 1, 4, 4 building, room two, Nanshan District high tech Zone, Shenzhen, China Patentee after: Shenzhen Shenyang electronic Limited by Share Ltd Address before: 518057 Guangdong science and technology two Road Software Park, phase 1, 4, 4 building, room two, Nanshan District high tech Zone, Shenzhen, China Patentee before: Aike Chuangxin Microelectronic Co., Ltd. |
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Date of cancellation: 20210705 Granted publication date: 20140924 Pledgee: Shenzhen high tech investment and financing Company limited by guarantee Pledgor: ARK PIONEER MICROELECTRONICS (SHENZHEN) Co.,Ltd. Registration number: 2015990000082 |
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