CN101728289B - 一种面阵封装电子元件的室温超声波软钎焊方法 - Google Patents

一种面阵封装电子元件的室温超声波软钎焊方法 Download PDF

Info

Publication number
CN101728289B
CN101728289B CN2008101682695A CN200810168269A CN101728289B CN 101728289 B CN101728289 B CN 101728289B CN 2008101682695 A CN2008101682695 A CN 2008101682695A CN 200810168269 A CN200810168269 A CN 200810168269A CN 101728289 B CN101728289 B CN 101728289B
Authority
CN
China
Prior art keywords
area array
room temperature
pad
electronic components
vibration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN2008101682695A
Other languages
English (en)
Other versions
CN101728289A (zh
Inventor
李明雨
王晓林
计红军
汉晶
区大公
张志能
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SUNEAST ELECTRONIC TECHNOLOGY (SHENZHEN) Co Ltd
Shenzhen Graduate School Harbin Institute of Technology
Original Assignee
SUNEAST ELECTRONIC TECHNOLOGY (SHENZHEN) Co Ltd
Shenzhen Graduate School Harbin Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SUNEAST ELECTRONIC TECHNOLOGY (SHENZHEN) Co Ltd, Shenzhen Graduate School Harbin Institute of Technology filed Critical SUNEAST ELECTRONIC TECHNOLOGY (SHENZHEN) Co Ltd
Priority to CN2008101682695A priority Critical patent/CN101728289B/zh
Publication of CN101728289A publication Critical patent/CN101728289A/zh
Application granted granted Critical
Publication of CN101728289B publication Critical patent/CN101728289B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

本发明涉及到微电子及光电子器件的封装和组装互连方法，尤其涉及到一种面阵封装电子元件的室温超声波软钎焊方法。其步骤是：1)准备面阵封装器件；2)准备对应焊盘；3)面阵封装器件和焊盘位置相对准；4)用横向振动超声波振子对面阵封装器件施加一定的超声振动和纵向压力，钎料凸台与对应的焊盘表面产生高频摩擦，并逐渐下塌，同时与基板焊盘之间形成冶金连接。其有益效果是：在室温条件下利用切向振动超声波进行面阵封装器件钎料合金焊点的互连，避免了焊接结构经历再热循环的过程，消除了热应力的形成和抑制了金属间化合物的形核和晶粒生长，提高接头的可靠性和电气性能。本方法还具有工序简单、速度快、无钎剂、不用进行严格的表面清洁处理等优点。

Description

一种面阵封装电子元件的室温超声波软钎焊方法
技术领域
本发明涉及到微电子及光电子器件的封装和组装互连方法，尤其涉及到一种面阵封装电子元件的室温超声波软钎焊方法。
背景技术
随着电子封装器件向高密度化方向发展，出现了球栅阵列封装(BGA：BallGrid Assembly)、芯片级封装(CSP：Chip Scale Packaging)、晶片多层三维封装等面阵封装技术。面阵封装技术是芯片以凸台阵列结构与基板直接安装互连的一种方法，其封装互连结构如图1所示。倒装焊接工艺可进一步分为再流焊，热压、热超声焊和导电胶互连。采用导电胶互连时，金属凸台被导电胶替代，此时存在着接头强度低、易老化、电阻率高等问题。采用热压、热超声焊时，需要采用金球凸台，存在着成本高、工艺复杂等问题。而采用再流焊时，不存在上述问题。
目前，常用的再流焊方法主要有：(1)热风炉再流焊；(2)红外再流焊；(3)气相再流焊；(4)激光再流焊；(5)高频电磁感应再流焊。前三种方法属于对电子封装器件整体热传导加热互连方法，会导致焊装结构产生残余应力甚至焊点微裂纹，并对热敏材料造成热冲击，给电子封装器件的可靠性带来隐患。激光再流焊能实现局部快速加热形成可靠互连，但是激光只能加热显式互连接头，不能加热BGA、CSP等面阵封装器件中的隐式互连接头。采用高频电磁感应再流焊，能够对所有的显式和隐式接头实现局部加热，提高互连接头可靠性，但是电磁感应的范围较难控制，容易感应加热周边的金属化层，影响组件的可靠性。
基于上述现有流焊方法的不足之处，本发明人研发了“一种面阵封装电子元件的室温超声波软钎焊方法”。
发明内容
本发明针对上述现有技术的不足所要解决的技术问题是：提供一种用横向振动的超声波进行面阵封装芯片互连的超声波软钎焊新方法。
本发明解决其技术问题所采用的技术方案是：
(1)准备面阵封装器件；
(2)准备对应焊盘；
(3)面阵封装器件和焊盘位置相对准；
(4)用横向振动超声波振子对面阵封装器件施加一定的超声振动和纵向压力，钎料凸台与对应的焊盘表面产生高频摩擦，并逐渐下塌，同时与基板焊盘之间形成冶金连接。
所述的步骤(三)中的超声振动频率为20KHz-100KHz，振动时间为0.1s-6s，键合压力为0.1-6.5bar。
所述的超声振动频率为20KHz，振动时间为3s。
所述的对应焊盘在上焊前不涂抹钎剂。
本发明是基于下述原理实现的：在超声波振动的作用下，具有低屈服强度的钎料凸台内的错位滑移机构被激发，而焊接接头的其他部位则处于弹性扰动状态。此时，在正向压力的作用下，凸台和下焊盘接触界面上发生大程度的塑性变形去除了表面氧化膜，同时在接触界面发生元素扩散(或在接触界面微米级区域内发生钎料熔化)，从而形成连接。采用横向振动的超声波进行面阵封装芯片的互连，实现室温下焊接界面氧化膜的机械去除；可实现无钎剂软钎焊；在室温下进行焊接，避免了焊接接头的再加热过程，不会产生热应力，抑制界面金属间化合物的形成，可提高电子封装器件的可靠性；焊接过程在大气条件下进行，不需要保护气氛。
本发明一种面阵封装电子元件的室温超声波软钎焊方法的有益效果是：
在室温条件下利用切向振动超声波进行面阵封装器件钎料合金焊点的互连，避免了焊接结构经历再热循环的过程，不仅消除了热应力的形成，而且抑制了金属间化合物的形核和晶粒生长，提高了接头的可靠性和电气性能。此外，本发明还具有工序简单、速度快、无钎剂、不用进行严格的表面清洁处理等优点。
附图说明
下面结合附图和实施例对本发明进一步说明。
图1为面阵封装结构示意图；
图2为本发明的器件准备状态示意图；
图3为本发明的焊盘准备状态示意图；
图4为面阵封装器件的对准贴装状态示意图；
图5为本发明的室温超声软钎焊原理图；
图6为本发明的完成键合时状态示意图。
具体实施方式
参照图2至图6，本发明是这样实施的：
本发明通过步骤实现：
(一)准备面阵封装器件，如图2所示；(二)准备对应焊盘，如图3；(三)面阵封装器件和焊盘位置对准，如图4所示；(四)用横向振动超声波振子对面阵封装器件施加一定的超声振动和纵向压力，钎料凸台与对应的焊盘表面产生高频摩擦，并逐渐下塌，同时与基板焊盘之间形成冶金连接，如图5与图6所示。
实施方式一：准备4×4BGA封装器件，凸台直径Φ10μm～Φ500μm，间距10μm～500μm；准备4×4BGA对应焊盘，焊盘材料为Au/Ni/Cu，其厚度分别为(10nm～5μm)/(1μm～5μm)/(10μm～100μm)；把附有钎料凸台的电子器件的互连焊盘对准印刷电路板上的焊盘进行贴装；采用固定频率为20～100kHz的切向振动超声波焊机进行焊接。设定焊接压力(0.1～6.5bar)，焊接时间(0.1～6s)，输入能量(10～900ws)后，启动超声波焊机，上声极在气缸推动的键合压力F下压紧在下声极上面的上焊件表面，然后触发超声波使钎料凸台和印刷电路板的焊盘材料连接，最后是将上声极回撤，工序完成。
实施方式二：实施方式一的第二步骤中，Au/Ni/Cu焊盘改为Sn/Cu焊盘，其尺寸为(1μm～10μm)/(10μm～100μm)，其余步骤与实施方式一相同；
实施方式三：实施方式一的第二步骤中，Au/Ni/Cu焊盘改为Sn基金属间化合物层/Cu焊盘，其尺寸为(0.1μm～10μm)/(10μm～100μm)，其余步骤与方式一相同；
实施方式四：在实施方式一、二、三中，步骤二，三之间增加了焊盘表面涂一层钎剂工序。
以上所述，仅是本发明一种面阵封装电子元件的室温超声波软钎焊方法的较佳实施例而已，并非对本发明的技术范围作任何限制，凡是依据本发明的技术实质对以上的实施例所作的任何细微修改、等同变化与修饰，均仍属于本发明技术方案的范围内。

Claims (4)

1.一种面阵封装电子元件的室温超声波软钎焊方法，其特征是通过下述步骤予以实现的：(一)准备面阵封装器件；(二)准备对应焊盘；(三)面阵封装器件和焊盘位置对准；(四)用横向振动超声波振子对面阵封装器件施加一定的超声振动和纵向压力，钎料凸台与对应的焊盘表面产生高频摩擦，并逐渐下塌，同时与基板焊盘之间形成冶金连接。
2.根据权利要求1所述的面阵封装电子元件的室温超声波软钎焊方法，其特征在于所述的步骤(三)中的超声振动频率为20KHz-100KHz，振动时间为0.1s-6s，键合压力为0.1-6.5bar。
3.根据权利要求1所述的面阵封装电子元件的室温超声波软钎焊方法，其特征在于所述的超声振动频率为20KHz，振动时间为3s。
4.根据权利要求1所述的面阵封装电子元件的室温超声波软钎焊方法，其特征在于所述的对应焊盘在上焊前不涂抹钎剂。
CN2008101682695A 2008-10-10 2008-10-10 一种面阵封装电子元件的室温超声波软钎焊方法 Expired - Fee Related CN101728289B (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2008101682695A CN101728289B (zh) 2008-10-10 2008-10-10 一种面阵封装电子元件的室温超声波软钎焊方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN2008101682695A CN101728289B (zh) 2008-10-10 2008-10-10 一种面阵封装电子元件的室温超声波软钎焊方法

Publications (2)

Publication Number Publication Date
CN101728289A CN101728289A (zh) 2010-06-09
CN101728289B true CN101728289B (zh) 2011-12-28

Family

ID=42448939

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2008101682695A Expired - Fee Related CN101728289B (zh) 2008-10-10 2008-10-10 一种面阵封装电子元件的室温超声波软钎焊方法

Country Status (1)

Country Link
CN (1) CN101728289B (zh)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102184905A (zh) * 2011-04-26 2011-09-14 哈尔滨工业大学 单金属间化合物微互连焊点结构
CN102244022A (zh) * 2011-04-26 2011-11-16 哈尔滨工业大学 倒装芯片单金属间化合物微互连结构制备方法
CN103639558B (zh) * 2013-12-12 2015-12-09 哈尔滨工业大学 热-超声-电磁多场复合再流焊方法
CN104862701B (zh) * 2015-05-11 2017-03-29 哈尔滨工业大学 一种采用多层微米、亚微米薄膜快速制备可高温服役全imc微焊点的方法
CN111137850B (zh) * 2019-11-28 2023-07-14 北京自动化控制设备研究所 实现低应力敏感结构贴片工艺的方法
CN113172291B (zh) * 2021-04-09 2022-06-03 哈尔滨工业大学 一种PoP封装过程中低温高强连接焊点的制备方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5651494A (en) * 1995-03-17 1997-07-29 Nippondenso Co., Ltd. Method of ultrasonic welding of different metals
CN1278363A (zh) * 1997-10-30 2000-12-27 戴姆勒-克莱斯勒股份公司 元件及制造元件的方法
CN1430272A (zh) * 2001-12-26 2003-07-16 株式会社日立制作所 半导体装置及其制造方法
CN1551323A (zh) * 2003-05-12 2004-12-01 ��ʽ���綫֥ 半导体器件的制造方法
CN1627493A (zh) * 2003-12-12 2005-06-15 松下电器产业株式会社 配备凸块的电子元件的安装方法及其安装结构
CN1677632A (zh) * 2004-03-31 2005-10-05 株式会社日立制作所 具有rfid标签或者放大电极的rfid芯片
CN101083217A (zh) * 2006-05-30 2007-12-05 中南大学 热声倒装键合实验台

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5651494A (en) * 1995-03-17 1997-07-29 Nippondenso Co., Ltd. Method of ultrasonic welding of different metals
CN1278363A (zh) * 1997-10-30 2000-12-27 戴姆勒-克莱斯勒股份公司 元件及制造元件的方法
CN1430272A (zh) * 2001-12-26 2003-07-16 株式会社日立制作所 半导体装置及其制造方法
CN1551323A (zh) * 2003-05-12 2004-12-01 ��ʽ���綫֥ 半导体器件的制造方法
CN1627493A (zh) * 2003-12-12 2005-06-15 松下电器产业株式会社 配备凸块的电子元件的安装方法及其安装结构
CN1677632A (zh) * 2004-03-31 2005-10-05 株式会社日立制作所 具有rfid标签或者放大电极的rfid芯片
CN101083217A (zh) * 2006-05-30 2007-12-05 中南大学 热声倒装键合实验台

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
管鄂.《超声波软钎焊》.《新技术新工艺》.1984,(第03期),7. *
编辑部.《超声波钎焊原理》.《电焊机》.2010,(第07期),76. *

Also Published As

Publication number Publication date
CN101728289A (zh) 2010-06-09

Similar Documents

Publication Publication Date Title
CN101728289B (zh) 一种面阵封装电子元件的室温超声波软钎焊方法
US7833831B2 (en) Method of manufacturing an electronic component and an electronic device
WO2009116517A1 (ja) 電子装置及びその製造方法
CN101527271A (zh) 一种使用锥面焊盘进行热超声倒装焊的芯片封装方法
KR20030055130A (ko) 반도체 장치 및 그 제조 방법
US8022558B2 (en) Semiconductor package with ribbon with metal layers
US7919356B2 (en) Method and structure to reduce cracking in flip chip underfill
JPH11145336A (ja) バンプ付電子部品の実装構造および実装方法
JP3687280B2 (ja) チップ実装方法
TWI245395B (en) Multi-chip module package device
US20120002386A1 (en) Method and Apparatus for Improving the Reliability of Solder Joints
JP2002368159A (ja) 半導体装置およびその製造方法
JPS59208844A (ja) フエイスダウンボンダ−
JP2001345418A (ja) 両面実装構造体の製造方法及びその両面実装構造体
JP3520410B2 (ja) 電子部品の実装方法
JPH11288975A (ja) ボンディング方法及びボンディング装置
CN1258810C (zh) 高频电磁辐射钎料微凸台重熔互连方法
TWI228305B (en) Structure of stacked chip packaging structure and manufacture method of the same
KR100499865B1 (ko) 초음파 솔더링을 이용한 전자 패키지 및 그 패키징 방법
JP4378227B2 (ja) フリップチップ実装方法
JP3906130B2 (ja) 半導体装置の製造方法
JP2004253663A (ja) 半導体装置の製造方法、及び同製造方法に用いるチップボンディング装置
TWI249797B (en) Method for packaging a chip
CN102082106B (zh) 铜凸点热声倒装键合方法
TWI253132B (en) Process of bonding a flip-chip

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20111228

Termination date: 20191010

CF01 Termination of patent right due to non-payment of annual fee