CN101657894B - 用于单切管芯测试的方法和装置 - Google Patents
用于单切管芯测试的方法和装置 Download PDFInfo
- Publication number
- CN101657894B CN101657894B CN2008800123555A CN200880012355A CN101657894B CN 101657894 B CN101657894 B CN 101657894B CN 2008800123555 A CN2008800123555 A CN 2008800123555A CN 200880012355 A CN200880012355 A CN 200880012355A CN 101657894 B CN101657894 B CN 101657894B
- Authority
- CN
- China
- Prior art keywords
- die
- singulated
- singulated die
- testing
- tube core
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Tests Of Electronic Circuits (AREA)
Abstract
Description
Claims (22)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/735,871 | 2007-04-16 | ||
US11/735,871 US20080252330A1 (en) | 2007-04-16 | 2007-04-16 | Method and apparatus for singulated die testing |
PCT/US2008/060372 WO2008130941A1 (en) | 2007-04-16 | 2008-04-15 | Method and apparatus for singulated die testing |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101657894A CN101657894A (zh) | 2010-02-24 |
CN101657894B true CN101657894B (zh) | 2013-08-14 |
Family
ID=39638656
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2008800123555A Active CN101657894B (zh) | 2007-04-16 | 2008-04-15 | 用于单切管芯测试的方法和装置 |
Country Status (8)
Country | Link |
---|---|
US (1) | US20080252330A1 (zh) |
JP (1) | JP2010525329A (zh) |
KR (1) | KR20100017103A (zh) |
CN (1) | CN101657894B (zh) |
DE (1) | DE112008001006T5 (zh) |
SG (1) | SG182135A1 (zh) |
TW (1) | TW200901350A (zh) |
WO (1) | WO2008130941A1 (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102006030722A1 (de) * | 2006-07-04 | 2008-01-10 | Robert Bosch Gmbh | Verfahren zum Betreiben einer Zündeinrichtung für eine Brennkraftmaschine |
US7532024B2 (en) * | 2006-07-05 | 2009-05-12 | Optimaltest Ltd. | Methods and systems for semiconductor testing using reference dice |
US8884639B2 (en) * | 2008-08-27 | 2014-11-11 | Advantest (Singapore) Pte Ltd | Methods, apparatus and articles of manufacture for testing a plurality of singulated die |
US8485511B2 (en) | 2009-03-11 | 2013-07-16 | Centipede Systems, Inc. | Method and apparatus for holding microelectronic devices |
US9346151B2 (en) | 2010-12-07 | 2016-05-24 | Centipede Systems, Inc. | Precision carrier for microelectronic devices |
US8683674B2 (en) | 2010-12-07 | 2014-04-01 | Centipede Systems, Inc. | Method for stacking microelectronic devices |
KR101682751B1 (ko) * | 2011-06-30 | 2016-12-05 | 주식회사 아도반테스토 | 웨이퍼의 스크라이브 라인들에 배치된 테스트 액세스 인터페이스에 전기적으로 결합되는 반도체 다이들에 접촉하기 위한 방법, 장치, 및 시스템들 |
CN105334084B (zh) * | 2014-06-30 | 2018-06-12 | 无锡华润上华科技有限公司 | 集成电路芯片失效分析样品的制备方法 |
TWI721147B (zh) | 2016-04-04 | 2021-03-11 | 美商矽立科技有限公司 | 供集成微機電裝置用的設備及方法 |
JP2022048036A (ja) * | 2020-09-14 | 2022-03-25 | キオクシア株式会社 | テストシステム及びプローブ装置 |
CN113299573B (zh) * | 2021-04-28 | 2022-06-10 | 长鑫存储技术有限公司 | 晶圆研磨方法及晶圆失效分析方法 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1098226A (zh) * | 1993-04-07 | 1995-02-01 | 三星电子株式会社 | 已知为好的管芯阵列和它的制造方法 |
US6406246B1 (en) * | 1998-12-15 | 2002-06-18 | Advantest Corporation | Device handler |
US7045035B1 (en) * | 2004-04-08 | 2006-05-16 | National Semiconductor Corporation | Post singulation die separation apparatus and method for bulk feeding operation |
CN1823277A (zh) * | 2003-08-05 | 2006-08-23 | 飞思卡尔半导体公司 | 具有测试焊盘结构的集成电路以及测试方法 |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5279975A (en) * | 1992-02-07 | 1994-01-18 | Micron Technology, Inc. | Method of testing individual dies on semiconductor wafers prior to singulation |
US5654204A (en) * | 1994-07-20 | 1997-08-05 | Anderson; James C. | Die sorter |
JP2000100882A (ja) * | 1998-09-18 | 2000-04-07 | Hitachi Ltd | 半導体装置の製造方法とその検査方法、及び、それらの方法に用いる冶具 |
US6627483B2 (en) * | 1998-12-04 | 2003-09-30 | Formfactor, Inc. | Method for mounting an electronic component |
US6373268B1 (en) * | 1999-05-10 | 2002-04-16 | Intel Corporation | Test handling method and equipment for conjoined integrated circuit dice |
US6537831B1 (en) * | 2000-07-31 | 2003-03-25 | Eaglestone Partners I, Llc | Method for selecting components for a matched set using a multi wafer interposer |
US6897670B2 (en) * | 2001-12-21 | 2005-05-24 | Texas Instruments Incorporated | Parallel integrated circuit test apparatus and test method |
US7694246B2 (en) * | 2002-06-19 | 2010-04-06 | Formfactor, Inc. | Test method for yielding a known good die |
US7471094B2 (en) * | 2005-06-24 | 2008-12-30 | Formfactor, Inc. | Method and apparatus for adjusting a multi-substrate probe structure |
US7733106B2 (en) * | 2005-09-19 | 2010-06-08 | Formfactor, Inc. | Apparatus and method of testing singulated dies |
-
2007
- 2007-04-16 US US11/735,871 patent/US20080252330A1/en not_active Abandoned
-
2008
- 2008-04-15 KR KR1020097023796A patent/KR20100017103A/ko not_active Application Discontinuation
- 2008-04-15 CN CN2008800123555A patent/CN101657894B/zh active Active
- 2008-04-15 DE DE112008001006T patent/DE112008001006T5/de not_active Withdrawn
- 2008-04-15 SG SG2012027363A patent/SG182135A1/en unknown
- 2008-04-15 JP JP2010504194A patent/JP2010525329A/ja active Pending
- 2008-04-15 WO PCT/US2008/060372 patent/WO2008130941A1/en active Application Filing
- 2008-04-16 TW TW097113846A patent/TW200901350A/zh unknown
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1098226A (zh) * | 1993-04-07 | 1995-02-01 | 三星电子株式会社 | 已知为好的管芯阵列和它的制造方法 |
US6406246B1 (en) * | 1998-12-15 | 2002-06-18 | Advantest Corporation | Device handler |
CN1823277A (zh) * | 2003-08-05 | 2006-08-23 | 飞思卡尔半导体公司 | 具有测试焊盘结构的集成电路以及测试方法 |
US7045035B1 (en) * | 2004-04-08 | 2006-05-16 | National Semiconductor Corporation | Post singulation die separation apparatus and method for bulk feeding operation |
Also Published As
Publication number | Publication date |
---|---|
JP2010525329A (ja) | 2010-07-22 |
US20080252330A1 (en) | 2008-10-16 |
CN101657894A (zh) | 2010-02-24 |
DE112008001006T5 (de) | 2010-02-11 |
TW200901350A (en) | 2009-01-01 |
SG182135A1 (en) | 2012-07-30 |
WO2008130941A1 (en) | 2008-10-30 |
KR20100017103A (ko) | 2010-02-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN101657894B (zh) | 用于单切管芯测试的方法和装置 | |
JP4359576B2 (ja) | 第2の基板上に第1の基板のチップを配置する方法 | |
US9207276B2 (en) | Method and apparatus for testing a semiconductor wafer | |
CN108519550A (zh) | 集成电路晶圆测试优化方法 | |
US8125235B2 (en) | Apparatus for mass die testing | |
US9337111B2 (en) | Apparatus and method to attach a wireless communication device into a semiconductor package | |
US7723980B2 (en) | Fully tested wafers having bond pads undamaged by probing and applications thereof | |
KR100674938B1 (ko) | 멀티칩 테스트용 프로브 카드 | |
CN108983072A (zh) | 晶圆测试方法、晶圆测试装置以及晶圆测试系统 | |
US5455518A (en) | Test apparatus for integrated circuit die | |
CN211043582U (zh) | 晶片测试系统 | |
EP2284862A1 (en) | System and method for picking and placement of chip dies | |
WO2007123647A2 (en) | Desktop wafer analysis station | |
CN217691160U (zh) | 适用于s参数测试的封装结构 | |
US7126145B2 (en) | Frame transfer prober | |
US11555828B2 (en) | Testing probe system for testing semiconductor die, multi-channel die having shared pads, and related systems and methods | |
CN110376506B (zh) | 一种碎片芯片的测试方法 | |
US7260296B2 (en) | Measuring the position of passively aligned optical components | |
KR20180036195A (ko) | 웨이퍼 맵의 형성 방법 | |
US6797528B2 (en) | Micro probing tip made by micro machine method | |
CN113985246A (zh) | 一种芯片的测试与封装工装及系统 | |
CN114975347A (zh) | 适用于s参数测试的封装结构及其加工设计方法 | |
CN113866590A (zh) | 检测件与芯片的检测方法 | |
JPH08264599A (ja) | 半導体測定装置 | |
JPS59147449A (ja) | 電子部品の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: ADVANTEST (SINGAPORE) PTE. LTD. Free format text: FORMER OWNER: VERIGY (SINGAPORE) PTE. LTD. Effective date: 20120425 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20120425 Address after: Singapore Singapore Applicant after: Verigy Pte Ltd Singapore Address before: Singapore Singapore Applicant before: Inovys Corp. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: ADVANTEST CORP. Free format text: FORMER OWNER: ADVANTEST (CHINA) CO., LTD. Effective date: 20150505 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20150505 Address after: Tokyo, Japan, Japan Patentee after: ADVANTEST CORP Address before: Singapore Singapore Patentee before: Verigy Pte Ltd Singapore |