CN101647109A - 半导体装置 - Google Patents
半导体装置 Download PDFInfo
- Publication number
- CN101647109A CN101647109A CN200880010738A CN200880010738A CN101647109A CN 101647109 A CN101647109 A CN 101647109A CN 200880010738 A CN200880010738 A CN 200880010738A CN 200880010738 A CN200880010738 A CN 200880010738A CN 101647109 A CN101647109 A CN 101647109A
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- layer
- warpage
- semiconductor element
- stress relaxation
- semiconductor device
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Abstract
提供一种能够抑制翘曲的薄型半导体装置。半导体元件(3)倒装芯片安装在电路基板(2)上,将半导体元件(3)的电极(8)和电路基板(2)的电极(7)电连接。在半导体元件(3)的与电路基板(2)相反侧的面上形成有:至少抑制半导体元件(3)翘曲的翘曲抑制层(5);缓和在半导体元件(3)和翘曲抑制层(5)之间产生的应力的应力缓和层(4)。应力缓和层(4)具有确保半导体元件(3)与翘曲抑制层(5)之间的预定间隔的垫片。应力缓和层(4)的杨氏模量低于翘曲抑制层(5)的杨氏模量,应力缓和层(4)和翘曲抑制层(5)的线膨胀系数大于半导体元件(3)的线膨胀系数。由此,能够抑制半导体装置(1)因电路基板(2)和半导体元件(3)的伸缩差异而形成翘曲。
Description
相关申请的说明
本发明要求日本专利申请特愿2007-088657号(2007年3月29日申请)和日本专利申请特愿2008-003181号(2008年1月10日申请)的优先权,这些申请的全部记述内容以引证的方式引用到本说明书中。
技术领域
本发明涉及一种半导体装置,尤其涉及半导体元件安装在电路基板上的半导体装置。
背景技术
伴随电子设备、电气设备的薄型化,要求安装在这些设备上的半导体装置薄型化。因此,作为把半导体元件安装在电路基板上的方法,实施倒装芯片安装封装体和晶片级芯片尺寸封装体(WLCSP:WaferLevel Chip Size Package)等。
图9表示与倒装芯片安装了半导体元件的背景技术相关的半导体装置的简要透视图。在半导体装置41中,半导体元件43被安装在电路基板42上,使半导体元件43的电极48和电路基板42的电极47通过焊盘49电连接。在半导体元件43和电路基板42之间填充有底层树脂46。
在该半导体装置41的制造工序中,半导体装置41在以下工序中被加热,即,使半导体元件43的电极48和电路基板42的电极47通过焊盘49电连接的回流焊工序,在半导体元件43和电路基板42之间填充底层树脂46并使其固化的工序。
通常,半导体元件43的线膨胀系数为2.6ppm/℃,而电路基板42的线膨胀系数为10ppm/℃~40ppm/℃,比半导体元件43高。此时,如果按照上面所述在制造工序中将半导体装置加热并冷却,则由于半导体元件43和电路基板42的伸缩差异,半导体装置41产生翘曲。例如,半导体装置41在加热后冷却时,电路基板42的收缩大于半导体元件43,所以如图9所示,产生使半导体装置41弯曲的力。
这种半导体装置41的翘曲导致将电路基板42和半导体元件43电连接的焊盘49的连接不良。并且,在半导体装置41被安装在主基板上时,因温度变化而变形,与主基板的连接部由于疲劳而断线的可能性增大。
在利用再布线层实现与半导体元件的配置有电极的面相对的基板的WLCSP中,在由聚酰亚胺等形成再布线层时,在使液体状聚酰亚胺固化时需要高温加热,并且也伴随有因固化形成的收缩。因此,与倒装芯片安装封装体同样,由于伸缩差异不同的再布线层与半导体元件连接,产生使半导体装置弯曲的力。
由于半导体元件与电路基板的热膨胀系数差异造成的半导体装置翘曲,能够利用半导体装置本身的刚性予以抑制。但是,在推进薄型化的半导体装置中刚性下降,更容易翘曲。因此,例如专利文献1和专利文献2公开了矫正半导体装置的翘曲的技术。
专利文献1记载的半导体装置具有:基板;安装在基板上的半导体芯片;使基板和半导体芯片接合的树脂部件;在半导体芯片的与接合了树脂部件的面相反的面上粘贴的矫正部件。矫正部件根据具有与半导体芯片不同的线膨胀率的树脂部件的膨胀或收缩,矫正产生于半导体芯片上的翘曲。
专利文献2记载的半导体装置具有:固定粘接半导体芯片和安装基板的固定粘接单元;和调节半导体芯片的挠曲的调节单元。固定粘接单元使伴随安装基板的伸缩而产生的应力除了分散到导电性电极外,还分散到半导体芯片上,以使半导体芯片与安装基板的伸缩对应地挠曲。并且,有可能由于半导体芯片的变形而产生裂纹,所以利用调节单元矫正或缓和半导体芯片的挠曲。
专利文献1:日本特开2004-096015号公报
专利文献2:日本特开平6-232210号公报
以上专利文献1~2的公开内容以引证方式引用到本说明书中。下面说明本发明对关联技术的分析。
因线膨胀系数差异造成的加热和冷却时的半导体装置的翘曲,能够通过增大半导体元件和电路基板的厚度,并提高半导体装置本身的刚性得到抑制。但是,导致脱离了对移动设备中使用的半导体装置的薄型化要求。
在专利文献1和专利文献2中,矫正部件(调节单元)通过粘接剂层(粘接层)接合在半导体芯片上。但是,在将矫正部件粘贴在半导体芯片上时,如果仅单纯地夹着粘接剂层按压,有可能产生粘接剂层的厚度不均,在极端的情况时,也有可能产生矫正部件与半导体芯片不能紧密接合的部分。该情况时,应力集中于粘接剂层变薄的部分,容易产生裂痕等。
并且,在粘接剂层将矫正部件和粘接剂层接合时,粘接剂层需要在接合时充分变形并确保两者之间的紧密粘接性。即,在接合时优选粘接剂层成为胶状及液体状。但是,如果接合时的粘接剂层比较软,则由于接合时的荷重,不能控制粘接剂层的厚度。例如,在使用热固化树脂作为粘接剂层时,在向半导体芯片上粘贴时需要加热加压,但由于热固化树脂在加热开始时的粘性极低,如果加压则导致粘接剂层流出,不能确保足够的厚度。如果粘接剂层比较薄,则不能吸收因矫正部件和半导体芯片的伸缩差异形成的应力,使得粘接剂层破损,导致矫正部件和半导体芯片剥离。另一方面,如果不加压,则导致半导体芯片和矫正部件尚未平坦(平行)时粘接剂层就固化。
另外,如果粘接剂层使用比较硬的材料,则与粘接剂层比较薄时相同,不能吸收因矫正部件和半导体芯片的伸缩差异形成的应力,使得粘接剂层破损,导致矫正部件和半导体芯片剥离。
发明内容
本发明的目的在于,提供一种薄型的半导体装置,能够在低温的使用环境到高温的安装环境的广范围的温度环境下抑制翘曲。
根据本发明的第一方面的半导体装置,具有:在一个面上具有第1电极的半导体元件;在安装面上具有第2电极的电路基板;至少抑制半导体元件翘曲的翘曲抑制层;以及缓和在半导体元件和翘曲抑制层之间产生的应力的应力缓和层,半导体元件以第1电极与电路基板的第2电极电连接、并且一个面与电路基板的安装面相对的方式,安装在电路基板上,应力缓和层形成于半导体元件的与一个面相反侧的另一面上,翘曲抑制层夹着应力缓和层被层叠在半导体元件上,应力缓和层具有确保半导体元件与翘曲抑制层的预定间隔的垫片,应力缓和层的杨氏模量低于翘曲抑制层的杨氏模量,应力缓和层及翘曲抑制层的线膨胀系数大于半导体元件的线膨胀系数。
根据本发明的第二方面的半导体装置,具有:在一个面上具有第1电极的半导体元件;电路基板,其在与半导体元件相对的一个面的相反侧的另一面上具有第2电极,并且具有与第2电极电连接、并从另一面向一个面横穿的导体;至少抑制半导体元件翘曲的翘曲抑制层;以及缓和在半导体元件和翘曲抑制层之间产生的应力的应力缓和层,半导体元件以第1电极经由导体而与电路基板的第2电极电连接、并且半导体元件的一个面与电路基板的一个面接触的方式,层叠在电路基板上,应力缓和层形成于半导体元件的与一个面相反侧的另一面上,翘曲抑制层夹着应力缓和层被层叠在半导体元件上,应力缓和层具有确保半导体元件与翘曲抑制层的预定间隔的垫片,应力缓和层的杨氏模量低于翘曲抑制层的杨氏模量,应力缓和层及翘曲抑制层的线膨胀系数大于半导体元件的线膨胀系数。
并且,在本发明中,翘曲抑制层和半导体元件的杨氏模量根据日本JISZ2241测定,应力缓和层和电路基板的杨氏模量根据日本JISK7127测定。并且,翘曲抑制层和半导体元件的线膨胀系数根据日本JISZ2285测定,应力缓和层和电路基板的线膨胀系数根据日本JISZ2285测定。杨氏模量和线膨胀系数都是在应力缓和层和电路基板的玻璃态转化点以下的温度范围内测定。
在本发明的半导体装置中,在半导体元件上配置翘曲抑制层和应力缓和层。因此,能够抑制因温度变化形成的半导体装置的翘曲。并且,通过抑制翘曲,能够提高半导体元件和电路基板的连接可靠性,并且能够改善半导体装置的二次安装中的成品率。
在本发明的半导体装置中,在翘曲抑制层和半导体元件之间配置具有垫片的应力缓和层。因此,能够防止翘曲抑制层和半导体元件因翘曲抑制层和半导体元件的伸缩差异而剥离。并且,由于还能够通过应力缓和层提高杨氏模量,所以能够使翘曲抑制层变薄。由此,能够使半导体装置整体变薄。
附图说明
图1是本发明的第1实施方式涉及的半导体装置的简要剖视图。
图2是图1所示的翘曲抑制层和应力缓和层部分的简要放大图。
图3是本发明的第2实施方式涉及的半导体装置的简要剖视图。
图4是本发明的第3实施方式涉及的半导体装置的应力缓和层部分的简要放大图。
图5是本发明的第4实施方式涉及的半导体装置的应力缓和层部分的简要放大图。
图6是本发明的半导体装置的简要透视图。
图7是把本发明的半导体装置二次安装在主基板上的状态的简要局部剖视图。
图8是本发明的第5实施方式涉及的半导体装置的简要剖视图。
图9是背景技术涉及的半导体装置的简要剖视图。
标号说明
1半导体装置
2电路基板
3半导体元件
4应力缓和层
4a树脂
4b、4c、4d垫片
5翘曲抑制层
6底层树脂
7电极
8电极
9焊盘
11半导体装置
12电路基板
13绝缘层
14再布线
15外部连接电极
16外部连接电极
21主基板
22外部连接电极
23焊盘
24电子元件
25焊盘
31半导体装置
32电路基板
33接地电极
34导电性树脂
41半导体装置
42电路基板
43半导体元件
46底层树脂
47电极
48电极
49焊盘
具体实施方式
根据上述第一方面和第二方面的优选方式,翘曲抑制层的线膨胀系数为电路基板的线膨胀系数以上。
根据上述第一方面和第二方面的优选方式,应力缓和层的厚度为20μm以上60μm以下。
根据上述第一方面和第二方面的优选方式,应力缓和层的杨氏模量为10Gpa以上40GPa以下。
根据上述第一方面和第二方面的优选方式,垫片的至少一种材料是玻璃、陶瓷、金属或树脂。
根据上述第一方面和第二方面的优选方式,垫片的形状是片状、粒状或柱状。
根据上述第一方面和第二方面的优选方式,应力缓和层具有垫片,并且具有接合半导体元件和翘曲抑制层的树脂。
根据上述第一方面和第二方面的优选方式,应力缓和层与翘曲抑制层的层叠体的杨氏模量为电路基板的杨氏模量以上。
根据上述第一方面和第二方面的优选方式,电路基板包含树脂,应力缓和层包含树脂,电路基板的树脂的玻璃态转化点与应力缓和层的树脂的玻璃态转化点之差为±20℃。
根据上述第一方面和第二方面的优选方式,翘曲抑制层由导体构成,电路基板具有接地电极,翘曲抑制层与接地电极电连接。根据更优选的方式,翘曲抑制层的至少一部分从半导体元件突出,在翘曲抑制层的突出部分和接地电极之间配置有导电性树脂。
说明本发明的第1实施方式涉及的半导体装置。图1表示本发明的第1实施方式涉及的半导体装置的简要剖视图。半导体装置1具有:具有基板电极7的电路基板2;和在电路基板2上倒装芯片安装的半导体元件3。半导体元件3的形成有电极8的面与电路基板2的形成有基板电极7的面相对,电极8和基板电极7通过焊盘9电连接,焊盘9以金和焊锡等金属或导电性树脂为材料。在半导体元件3和电路基板2之间填充有用于填埋两者间的间隙的底层树脂6。
在半导体元件3的与电路基板2相对的面的相反面上形成有应力缓和层4,再夹着应力缓和层4形成有翘曲抑制层5。图2表示图1所示的应力缓和层4和翘曲抑制层5部分的简要放大图。
应力缓和层4是缓和并吸收在半导体元件3和翘曲抑制层5之间因伸缩差异产生的应力的层。应力缓和层4具有用于确保预定厚度、即半导体元件3与翘曲抑制层5的预定间隔的垫片4b。在图2所示的方式中,图示了树脂4a中包含的(及浸渍了树脂4a)的片状的垫片4b。应力缓和层4除了缓和半导体元件3和翘曲抑制层5间的应力的功能之外,也具有粘接半导体元件3和翘曲抑制层5的功能。因此,为了获得两者的紧密粘接性,优选在粘接半导体元件3和翘曲抑制层5时,应力缓和层4的树脂4a能够充分变形(例如胶状乃至液体状)。此时,在应力缓和层4不具有垫片时,如果为了使应力缓和层4与半导体元件3及翘曲抑制层5紧密粘接而施加荷重,则由于粘接时的变形特性,树脂4a流出,很难确保应力缓和层4的厚度。如果应力缓和层4得不到足够的厚度,如以下说明的那样,将不能缓和因半导体元件3和翘曲抑制层5之间的伸缩差异产生的应力,导致应力缓和层4本身破损。
另外,垫片4b也具有提高应力缓和层4本身的杨氏模量的功能。在本发明的半导体装置1中,抑制翘曲的主要是翘曲抑制层5,但如果应力缓和层4的杨氏模量提高,则相应地能够抑制为了抑制半导体装置1的翘曲而需要的翘曲抑制层5和应力缓和层4的厚度。因此,通过在应力缓和层4上配置垫片4b,能够使杨氏模量高于例如只利用树脂构成的应力缓和层,能够有助于半导体装置1的薄型化。
应力缓和层4的线膨胀系数被设定为大于半导体元件3的线膨胀系数,以便抑制因电路基板2和半导体元件3的伸缩差异形成的翘曲。
优选应力缓和层4的树脂4a和电路基板2的树脂的玻璃态转化点高于半导体装置1的使用温度范围。在应力缓和层4的树脂4a和电路基板2的树脂的玻璃态转化点为半导体装置1的使用温度范围以下时,优选通过使两者使用相同材料等,使两者的玻璃态转化点尽可能一致。并且,在两者的玻璃态转化点不同时,优选将应力缓和层4的树脂4a的玻璃态转化点设定为电路基板2的树脂的玻璃态转化点的±20℃。电路基板2的杨氏模量在树脂的玻璃态转化点前后变化比较大。因此,在该玻璃态转化点前后,在电路基板2和半导体元件3之间产生的使半导体装置1弯曲的力也变化。例如,在半导体装置的环境温度从小于电路基板的玻璃态转化点向玻璃态转化点以上上升时,电路基板的杨氏模量下降,想要使半导体装置弯曲的力减弱。此时,如果应力缓和层4的杨氏模量没有与电路基板2的杨氏模量同步下降,则相反地应力缓和层4和翘曲抑制层5有可能使得半导体装置1弯曲。为此,优选使半导体元件3的电路基板2侧的力和翘曲抑制层5侧的力均衡,并且因温度变化而形成的力的强弱变化也一致。因此,通过把应力缓和层4的树脂4a的玻璃态转化点设定为与电路基板2的树脂的玻璃态转化点相比在预定范围内,能够应对因温度变化形成的电路基板2的杨氏模量变化。另外,玻璃态转化点前后的应力缓和层4的杨氏模量可以高于或低于电路基板2。
应力缓和层4的杨氏模量(拉伸弹性模量)被设定成为低于翘曲抑制层5的杨氏模量。这是因为如果应力缓和层4比翘曲抑制层5硬,则在施加因翘曲抑制层5和半导体元件3的伸缩差异形成的应力时,应力缓和层4本身破损。并且,优选应力缓和层4的杨氏模量为10GPa~40GPa。半导体元件3的杨氏模量约为200GPa,在翘曲抑制层5使用例如金属时,翘曲抑制层5的杨氏模量约达到200GPa。这是因为为了充分获得半导体元件3与翘曲抑制层5的紧密粘接性,需要使应力缓和层4比半导体元件3和翘曲抑制层5软。这也可以从通常杨氏模量约为30GPa的基板能够与金属获得良好的紧密粘接性方面得到确认。并且,如在上面说明的那样,为了使半导体装置1薄型化,需要使应力缓和层4具有本身不会破损且能发挥应力缓和作用的程度的杨氏模量。另外,为了使半导体装置1薄型化,优选应力缓和层4也具有翘曲抑制效果。实际上在应力缓和层4的杨氏模量为10GPa~40GPa时,能够确认到翘曲降低的效果,但在应力缓和层4的杨氏模量为5GPa左右时,由于厚度方向的变形,不能获得应力缓和层4的翘曲降低效果。
优选应力缓和层4的厚度为20μm以上。在应力缓和层4的厚度为10μm时,即使应力缓和层4是约10GPa的比较柔软的状态,在可靠性试验中,由于翘曲抑制层5与半导体元件3的线膨胀系数差异形成的应力集中,有时应力缓和层4被剥离并破损。因此,优选应力缓和层4的厚度为20μm以上。并且,如果应力缓和层4的厚度过厚,则不能安装在要求薄型化的装置上,所以优选为60μm以下。此外,发现如果把应力缓和层4加厚到65μm,则由于树脂容易移动的特性,容易形成厚度方向的变形,抑制翘曲的效果减弱。
因此,本发明中的应力缓和层4具有将半导体元件3和翘曲抑制层5粘接的功能、缓和因伸缩差异产生的半导体元件3和翘曲抑制层5之间的应力的功能、以及抑制半导体装置1(尤其是半导体以及3和电路基板2)的翘曲的功能。作为应力缓和层4,例如可以使用在成为垫片的玻璃布4b(纺织布、无纺布均可)中浸渍了树脂4a的树脂片。垫片还可以使用除此之外的金属、陶瓷、树脂等。树脂4a例如可以使用环氧树脂或聚酰亚胺树脂。
翘曲抑制层5是通过电路基板2的拉伸(膨胀)和收缩来抑制至少半导体元件3翘曲的层。因此,翘曲抑制层5的线膨胀系数被设定成为大于半导体元件3的线膨胀系数。作为翘曲抑制层5,优选具有高弹性、高线膨胀系数,而且在向半导体元件3上层叠时的加热和荷重条件下不易塑性变形的金属,作为优选的金属材料,例如可以列举不锈钢、镍、铁等。此时,优选将翘曲抑制层5的线膨胀系数设定为15ppm/℃~50ppm/℃。并且,优选将翘曲抑制层5的杨氏模量设定为60GPa~200GPa。通常使用的电路基板2的线膨胀系数为15ppm/℃左右、杨氏模量为40GPa,所以通过把翘曲抑制层5的线膨胀系数和杨氏模量设定为大于(高于)电路基板2,能够使翘曲抑制层5比电路基板2薄,有助于半导体装置1整体的薄型化。
为了抑制半导体装置1翘曲,优选应力缓和层4与翘曲抑制层5的层叠体的杨氏模量为电路基板2的杨氏模量以上。
优选应力缓和层4和翘曲抑制层5的面尺寸(面积)至少与半导体元件3的形成应力缓和层4和翘曲抑制层5的面的尺寸(面积)相同(形成于半导体元件3的整个面上)。这是因为在面尺寸比较大时,能够容易获得抑制半导体装置1翘曲所需的较大的力,并且相应地变薄。并且,在半导体装置1的制造工序中也能够进行晶片级加工,所以能够提高生产性,并且能够缩小二次安装面积。但是,如果能够抑制因半导体元件3与电路基板2的伸缩差异形成的半导体装置1的翘曲,则应力缓和层4和翘曲抑制层5不需要形成于半导体元件3的整个面上,适当地设定为能够抑制半导体装置1的翘曲的面尺寸。
在此,说明图1和图2所示的第1实施方式的半导体装置的各要素的尺寸示例。例如,对于厚度0.4mm的电路基板2(线膨胀系数15ppm/℃以下,杨氏模量40GPa以下)、厚度0.1mm的半导体元件3(线膨胀系数约2.6ppm/℃)以及厚度0.05mm的底层树脂6,能够使在玻璃布中浸渍了树脂的应力缓和层4形成为厚度0.06mm(线膨胀系数15ppm/℃~30ppm/℃,杨氏模量15GPa),使翘曲抑制层5形成为厚度0.04mm(线膨胀系数15ppm/℃~50ppm/℃,杨氏模量193GPa)。
下面,说明本发明中抑制半导体装置1的半导体元件3翘曲的原理。当不存在应力缓和层4和翘曲抑制层5时,例如在回流焊工序中的加热时和该工序之后的冷却时,如在背景技术中说明的那样,由于电路基板2和半导体元件3的线膨胀系数差异而产生伸缩差异,如图9所示,由电路基板42和半导体元件43产生使半导体装置41翘曲的力。但是,在本发明中,线膨胀系数大于半导体元件3的翘曲抑制层5和应力缓和层4形成于半导体元件3的与电路基板2相反侧的面上。即,由翘曲抑制层5、应力缓和层4和半导体元件3使半导体装置1翘曲的力与基于电路基板2和半导体元件3的力为反方向。由此,翘曲抑制层5侧的力和电路基板侧的力抵消,从而能够抑制半导体装置1整体的翘曲。另外,底层树脂6也与电路基板2同样使产生使半导体装置1翘曲的力,但由于底层树脂6比电路基板2薄、刚性低,所以对翘曲的影响比较小。因此,在本发明中不考虑底层树脂6的影响。
这样,在本发明的半导体装置1中,利用了翘曲抑制层5与半导体元件3的线膨胀系数差异。但是,如果两者的线膨胀系数差异比较大,则相应地应力施加到翘曲抑制层5和半导体元件3之间。即,导致翘曲抑制层5与半导体元件3剥离。因此,在本发明中,在翘曲抑制层5和半导体元件3之间,介入具有预定的厚度、且杨氏模量高于翘曲抑制层5的应力缓和层4。由此,因半导体元件3与翘曲抑制层5的伸缩差异形成的应力,通过应力缓和层4在面方向(应力缓和层的延伸方向(例如图1中的左右方向))上变形而得到缓和。尤其是应力缓和层4通过垫片4b保持预定的厚度,所以在上下(半导体元件3侧和翘曲抑制层5侧)产生伸缩差异时也不会破损,而且能够吸收应力。并且,垫片4b也有助于提高应力缓和层4本身的杨氏模量。
因此,在本发明的半导体装置1中,即使产生因温度变化形成的伸缩,也能够抑制半导体装置1翘曲,而且不会产生缺陷。
下面,说明第1实施方式涉及的半导体装置的制造方法。首先,向电路基板2涂敷液体状的底层树脂6并将其加热,而且向半导体元件3施加荷重而进行连接,制作倒装芯片安装封装体。然后,在半导体元件3上临时连接应力缓和层4(例如在玻璃布中浸渍了热固化树脂的树脂片)。然后,将翘曲抑制层5(例如金属箔)加热加压而接合在应力缓和层4上,制造半导体装置1。
翘曲抑制层5的翘曲抑制强度,能够通过调整安装翘曲抑制层5时的翘曲抑制层5的温度及电路基板2的温度来控制。此时,翘曲抑制层5的温度依赖于在安装时向翘曲抑制层5施加荷重的工具的温度,电路基板2的温度依赖于载物台温度。在安装翘曲抑制层5时的温度比电路基板2的温度高、而且其温度差越大时,翘曲抑制层5的抑制翘曲的作用越强。温度差越大(翘曲抑制层5的温度越高),越作用于使翘曲抑制层5表面弯曲成凹状的方向。
下面,说明其他制造方法。首先,在单体化之前的晶片状态的半导体元件3上临时连接应力缓和层4,将翘曲抑制层5加热加压并接合在应力缓和层4上。然后,使层叠了应力缓和层4和翘曲抑制层5的半导体元件3单体化。然后,在电路基板2上涂敷底层树脂6,将已单体化的半导体元件3加热并施加荷重并与电路基板2连接,制造半导体装置1。
关于第1实施方式涉及的半导体装置1,在图1中示出了使用焊盘9的形式,但半导体元件3的电极8与电路基板2的连接可以是任何形式。例如,也可以通过使用ACF(Anisotropic Conductive Film,各向异性导电膜)进行连接。
下面,说明本发明的第2实施方式涉及的半导体装置。第1实施方式是倒装芯片安装封装体的半导体装置,第2实施方式是WLCSP的半导体装置。图3表示本发明的第2实施方式涉及的半导体装置的简要剖视图。在半导体装置11中,电路基板12形成为再布线层。半导体元件3夹着绝缘层13与电路基板12连接。半导体元件3的电极8与电路基板12的形成于半导体元件3的相反侧的外部连接电极15,夹着再布线14电连接。电路基板12中的树脂部分能够利用例如与第1实施方式中的电路基板2相同的材料、感光性树脂或聚酰亚胺形成。例如,能够在厚度0.15mm的半导体元件3上连接厚度0.2mm、线膨胀系数10ppm/℃~40ppm/℃的作为再布线层的电路基板12。
图3所示的应力缓和层4和翘曲抑制层5的形式是与第1实施方式相同的形式。
在半导体装置11遭受温度变化时,产生由于半导体元件3与电路基板12之间的线膨胀系数差异使得半导体装置11弯曲的力,但与第1实施方式同样,能够由翘曲抑制层5和应力缓和层4产生使半导体装置11在与该力量相反的方向弯曲的力。由此,能够抑制半导体装置11翘曲。
下面,说明第2实施方式涉及的半导体装置11的制造方法。形成电路基板12(再布线层),以便在晶片状态的半导体元件3中将电极8和外部连接电极15电连接。然后,在半导体元件3的与电极8所在的面相反侧的面上形成应力缓和层4和翘曲抑制层5。然后,通过切割使半导体元件3等单体化,制造半导体装置11。
下面,说明本发明的第3实施方式涉及的半导体装置。图4表示本发明的第3实施方式涉及的半导体装置的应力缓和层部分的简要放大图。在第1实施方式和第2实施方式中,说明了应力缓和层4使用玻璃布4b作为垫片的形式,但在本实施方式中,应力缓和层4使用多个粒状体4c作为垫片,多个粒状垫片4c包含于树脂4a中。粒状垫片4c的材质只要对安装半导体元件3时的热量具有耐热性,则可以是任何材质。例如,粒状垫片4c由氧化铝、二氧化硅等陶瓷、焊锡、铜、镍等金属、或耐热性树脂等形成。粒状垫片4c的形状可以是任何形状,例如可以形成为球体、椭圆旋转体、长方体等形状。并且,粒状垫片4c也可以在表面具有凹凸。
第3实施方式除应力缓和层4之外,其他与第1实施方式或第2实施方式相同。
根据本实施方式,应力缓和层4的厚度至少是粒状垫片4c的直径,所以能够确保半导体元件3与翘曲抑制层5的预定间隔。多个粒状垫片4c在与半导体元件3或翘曲抑制层5接触时,例如图4所示的球状垫片与半导体元件3或翘曲抑制层5点接触。因此,应力缓和层4与半导体元件3及翘曲抑制层5几乎通过树脂4a面而接触,所以应力缓和层4不易从半导体元件3和翘曲抑制层5剥离。
下面,说明本发明的第4实施方式涉及的半导体装置。图5表示本发明的第4实施方式涉及的半导体装置的应力缓和层部分的简要放大图。在本实施方式中,垫片4d使用树脂。例如,垫片可以使用预先变薄、并成为半固化乃至完全固化的固化状态的柱状树脂垫片4d。该情况时,垫片4d的树脂材料可以是与树脂4a不同的材料,也可以是相同的材料。
关于第4实施方式涉及的半导体装置的制造方法,在是倒装芯片安装封装体的半导体装置时,例如在倒装芯片安装的半导体元件3上放置垫片4d,在其上将成为树脂4a的树脂片及翘曲抑制层5加热加压并层叠,由此制造半导体装置。
第4实施方式除应力缓和层4之外,其他与第1实施方式或第2实施方式相同。
根据第4实施方式,能够确保应力缓和层4的厚度,并且能够使应力缓和层4的材质比较均匀。由此,能够减少在应力缓和层4中应力集中的部分,能够抑制裂痕和剥离等不良的发生。
下面,说明本发明的第5实施方式涉及的半导体装置。图8表示本发明的第5实施方式涉及的半导体装置的简要剖视图。在本实施方式中,将由导电体构成的翘曲抑制层5、与安装有半导体元件3的电路基板32的接地电极33电连接。例如,如图8所示,通过杨氏模量低于金属的导电性树脂34,将翘曲抑制层5和接地电极33电连接。
此时,优选翘曲抑制层5至少一部分从半导体元件3(的上表面及侧面)突出,以便翘曲抑制层5容易与接地电极33电连接。例如,使翘曲抑制层5的面对与其电连接的接地电极33的端部从半导体元件3突出,在突出的部分和接地电极33之间填充液体状或膏状导电性树脂34,并使其固化,由此能够将翘曲抑制层5和接地电极33电连接。
根据本实施方式,在将半导体装置31安装在主基板上时,能够抑制在半导体元件3和半导体装置31外部的电路之间产生的电磁干扰。并且,如果使用具有柔软性的导电性树脂34,则几乎不会对翘曲抑制层5的翘曲抑制效果产生不良影响。
下面,说明本发明的第1实施方式~第5实施方式涉及的半导体装置的使用示例。图6表示本发明的半导体装置的简要透视图,图7表示把本发明的半导体装置二次安装在主基板上的状态的简要局部剖视图。另外,在图6和图7中图示了第1实施方式涉及的半导体装置1,当然对于第2实施方式涉及的半导体装置11也相同。
在电路基板2的安装有半导体元件3的一侧的面的外缘,形成有用于和主基板21电连接的多个外部连接电极16。半导体装置1使半导体元件3等与主基板21面相对,并使电路基板2的外部连接电极16与主基板21的外部连接电极22夹着焊盘23电连接,以便在电路基板2和主基板21之间配置半导体元件3。在电路基板2的与安装半导体元件3的面相反的背面,也能够安装电子元件24。
这样,在本发明的半导体装置中,使从底层树脂6到翘曲抑制层5构成为比焊盘23的高度薄,并且能够通过翘曲抑制层5和应力缓和层4抑制半导体装置1翘曲,所以如图7所示能够实现半导体元件3与主基板21相对的形式的二次安装。例如,在底层树脂6的厚度为0.05mm、半导体元件3的厚度为0.1mm、应力缓和层4的厚度为0.03mm、翘曲抑制层5的厚度为0.03mm时,从底层树脂6到翘曲抑制层5的高度合计为0.21mm。该高度低于在以0.5mm间距配置的直径0.25mm的外部连接电极16上形成的焊盘(焊锡珠)23的高度。
下面,说明截止到图7所示的二次安装形式为止的装配步骤的示例。首先,把作为半导体装置1的焊盘23的焊锡珠通过焊锡膏临时固定在外部连接电极16上,然后通过回流把焊锡珠固定在外部连接电极16上。然后,把作为电子元件24的焊盘25的焊锡珠,通过焊锡膏临时固定在电路基板2的与安装了半导体元件3的面相反侧的面上的电极(未图示)上,并通过回流固定。在此,把这样制作的构造体称为模块。
然后,把该模块安装在主基板21上。在此也同样夹着焊锡膏并通过回流固定主基板21上的外部连接电极22和模块的焊锡珠23。此时,模块的温度临时上升到230℃~260℃。在构成模块的电路基板2是树脂基板时,基板使用的基材的玻璃态转化点通常在200℃以下,在回流过程中,在玻璃态转化点前后,杨氏模量、线膨胀率大幅变化。但是,如果把半导体装置1的应力缓和层4和电路基板2的玻璃态转化点设定为上述的优选范围,在该玻璃态转化点前后也能够抑制翘曲,在安装时确保半导体装置1的平坦性。由此,能够确保回流工序中的焊锡与主基板21的接触,能够抑制初期连接的连接不良。
并且,在图7所示的构造体处于回流中的焊锡熔点的温度条件下时,如果翘曲抑制层5的表面向成为凸状的方向弯曲,在图7中,翘曲抑制层5与主基板21接触,焊盘23不能接触主基板21的外部连接电极22,有可能产生连接不良。因此,如果按照上面所述使翘曲抑制层5不会成为凸状、即向翘曲抑制层5弯曲成凹状的方向调整安装条件,则翘曲抑制层5不易与主基板21接触,能够抑制初期连接的不良。
本发明的半导体装置能够适用于这种LSI封装体和LSI模块。
关于本发明的半导体装置,使用上述实施方式进行了说明,但本发明的半导体装置不限于上述实施方式,当然可以在本发明的范围内进行各种变形、变更及改进。并且,也能够在本发明的权利要求书的框架内实现各种公开要素的多种组合、替换及选择。
本发明的更进一步的课题、目的及扩展形式,可根据包括权利要求书在内的本发明的全部公开内容得以明确。
Claims (12)
1.一种半导体装置,其特征在于,
具有:在一个面上具有第1电极的半导体元件;
在安装面上具有第2电极的电路基板;
至少抑制所述半导体元件翘曲的翘曲抑制层;以及
缓和在所述半导体元件和所述翘曲抑制层之间产生的应力的应力缓和层,
所述半导体元件以所述第1电极与所述电路基板的所述第2电极电连接、并且所述一个面与所述电路基板的所述安装面相对的方式,安装在所述电路基板上,
所述应力缓和层形成于所述半导体元件的与所述一个面相反侧的另一面上,
所述翘曲抑制层夹着所述应力缓和层被层叠在所述半导体元件上,
所述应力缓和层具有确保所述半导体元件与所述翘曲抑制层的预定间隔的垫片,
所述应力缓和层的杨氏模量低于所述翘曲抑制层的杨氏模量,
所述应力缓和层及所述翘曲抑制层的线膨胀系数大于所述半导体元件的线膨胀系数。
2.一种半导体装置,其特征在于,
具有:在一个面上具有第1电极的半导体元件;
电路基板,其在与所述半导体元件相对的一个面的相反侧的另一面上具有第2电极,并且具有与所述第2电极电连接、并从所述另一面向所述一个面横穿的导体;
至少抑制所述半导体元件翘曲的翘曲抑制层;以及
缓和在所述半导体元件和所述翘曲抑制层之间产生的应力的应力缓和层,
所述半导体元件以所述第1电极经由所述导体而与所述电路基板的所述第2电极电连接、并且所述半导体元件的一个面与所述电路基板的一个面接触的方式,层叠在所述电路基板上,
所述应力缓和层形成于所述半导体元件的与所述一个面相反侧的另一面上,
所述翘曲抑制层夹着所述应力缓和层被层叠在所述半导体元件上,
所述应力缓和层具有确保所述半导体元件与所述翘曲抑制层的预定间隔的垫片,
所述应力缓和层的杨氏模量低于所述翘曲抑制层的杨氏模量,
所述应力缓和层及所述翘曲抑制层的线膨胀系数大于所述半导体元件的线膨胀系数。
3.根据权利要求1或2所述的半导体装置,其特征在于,
所述翘曲抑制层的线膨胀系数为所述电路基板的线膨胀系数以上。
4.根据权利要求1~3中任一项所述的半导体装置,其特征在于,
所述应力缓和层的厚度为20μm以上60μm以下。
5.根据权利要求1~4中任一项所述的半导体装置,其特征在于,
所述应力缓和层的杨氏模量为10Gpa以上40GPa以下。
6.根据权利要求1~5中任一项所述的半导体装置,其特征在于,
所述垫片的至少一种材料是玻璃、陶瓷、金属或树脂。
7.根据权利要求1~6中任一项所述的半导体装置,其特征在于,
所述垫片的形状是片状、粒状或柱状。
8.根据权利要求1~7中任一项所述的半导体装置,其特征在于,
所述应力缓和层具有所述垫片,并且具有接合所述半导体元件和所述翘曲抑制层的树脂。
9.根据权利要求1~8中任一项所述的半导体装置,其特征在于,
所述应力缓和层与所述翘曲抑制层的层叠体的杨氏模量为所述电路基板的杨氏模量以上。
10.根据权利要求1~9中任一项所述的半导体装置,其特征在于,
所述电路基板包含树脂,
所述应力缓和层包含树脂,
所述电路基板的树脂的玻璃态转化点与所述应力缓和层的树脂的玻璃态转化点之差为±20℃。
11.根据权利要求1~10中任一项所述的半导体装置,其特征在于,
所述翘曲抑制层由导体构成,
所述电路基板具有接地电极,
所述翘曲抑制层与所述接地电极电连接。
12.根据权利要求11所述的半导体装置,其特征在于,
所述翘曲抑制层的至少一部分从所述半导体元件突出,
在所述翘曲抑制层的突出部分和所述接地电极之间配置有导电性树脂。
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PCT/JP2008/056053 WO2008120705A1 (ja) | 2007-03-29 | 2008-03-28 | 半導体装置 |
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CN110945640A (zh) * | 2017-07-28 | 2020-03-31 | 京瓷株式会社 | 基板保持构件和半导体制造装置 |
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JP5084323B2 (ja) * | 2007-03-29 | 2012-11-28 | 株式会社リコー | 半導体装置 |
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US20100314725A1 (en) * | 2009-06-12 | 2010-12-16 | Qualcomm Incorporated | Stress Balance Layer on Semiconductor Wafer Backside |
JP5487847B2 (ja) * | 2009-09-25 | 2014-05-14 | 日本電気株式会社 | 電子デバイスパッケージ及びその製造方法、並びに電子機器 |
US20110235304A1 (en) * | 2010-03-23 | 2011-09-29 | Alcatel-Lucent Canada, Inc. | Ic package stiffener with beam |
US8368232B2 (en) * | 2010-03-25 | 2013-02-05 | Qualcomm Incorporated | Sacrificial material to facilitate thin die attach |
JP2013070011A (ja) * | 2011-09-06 | 2013-04-18 | Honda Motor Co Ltd | 半導体装置 |
KR101983132B1 (ko) * | 2012-11-29 | 2019-05-28 | 삼성전기주식회사 | 전자부품 패키지 |
JP6897056B2 (ja) | 2016-10-20 | 2021-06-30 | 富士電機株式会社 | 半導体装置及び半導体装置製造方法 |
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JP2020043286A (ja) * | 2018-09-13 | 2020-03-19 | 株式会社東芝 | 半導体装置及びその製造方法 |
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CN107104070A (zh) * | 2016-02-19 | 2017-08-29 | 三星电子株式会社 | 支撑基底以及使用支撑基底制造半导体封装件的方法 |
CN107104070B (zh) * | 2016-02-19 | 2020-11-17 | 三星电子株式会社 | 支撑基底以及使用支撑基底制造半导体封装件的方法 |
CN110945640A (zh) * | 2017-07-28 | 2020-03-31 | 京瓷株式会社 | 基板保持构件和半导体制造装置 |
CN110945640B (zh) * | 2017-07-28 | 2023-10-31 | 京瓷株式会社 | 基板保持构件和半导体制造装置 |
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