CN101641866B - 节能的时钟控制技术 - Google Patents

节能的时钟控制技术 Download PDF

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Publication number
CN101641866B
CN101641866B CN200880009120.0A CN200880009120A CN101641866B CN 101641866 B CN101641866 B CN 101641866B CN 200880009120 A CN200880009120 A CN 200880009120A CN 101641866 B CN101641866 B CN 101641866B
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CN
China
Prior art keywords
frequency
reference clock
clock signal
clock
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN200880009120.0A
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English (en)
Chinese (zh)
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CN101641866A (zh
Inventor
李东润
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lattice Semiconductor Corp
Original Assignee
Lattice Semiconductor Corp
Silicon Image Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lattice Semiconductor Corp, Silicon Image Inc filed Critical Lattice Semiconductor Corp
Publication of CN101641866A publication Critical patent/CN101641866A/zh
Application granted granted Critical
Publication of CN101641866B publication Critical patent/CN101641866B/zh
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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
    • G06F1/3215—Monitoring of peripheral devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Dc Digital Transmission (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)
  • Power Sources (AREA)
  • Manipulation Of Pulses (AREA)
  • Transceivers (AREA)
CN200880009120.0A 2007-03-23 2008-03-21 节能的时钟控制技术 Active CN101641866B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/690,659 2007-03-23
US11/690,659 US7849339B2 (en) 2007-03-23 2007-03-23 Power-saving clocking technique
PCT/US2008/057926 WO2008118821A1 (en) 2007-03-23 2008-03-21 Power-saving clocking technique

Publications (2)

Publication Number Publication Date
CN101641866A CN101641866A (zh) 2010-02-03
CN101641866B true CN101641866B (zh) 2016-08-31

Family

ID=39775919

Family Applications (1)

Application Number Title Priority Date Filing Date
CN200880009120.0A Active CN101641866B (zh) 2007-03-23 2008-03-21 节能的时钟控制技术

Country Status (7)

Country Link
US (1) US7849339B2 (enExample)
EP (1) EP2135354A4 (enExample)
JP (2) JP5367590B2 (enExample)
KR (1) KR101480734B1 (enExample)
CN (1) CN101641866B (enExample)
TW (1) TWI358904B (enExample)
WO (1) WO2008118821A1 (enExample)

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US8169973B2 (en) * 2007-12-20 2012-05-01 Telefonaktiebolaget L M Ericsson (Publ) Power efficient enhanced uplink transmission
US8145931B2 (en) * 2008-05-27 2012-03-27 Sharp Laboratories Of America, Inc. Imaging device with adaptive power saving behavior and method for use thereon
US8375241B2 (en) * 2009-04-02 2013-02-12 Intel Corporation Method and system to improve the operations of a registered memory module
US9013720B2 (en) 2011-10-04 2015-04-21 Xerox Corporation Resource saving while avoiding customer wait annoyance
US8914657B2 (en) * 2011-10-18 2014-12-16 Mediatek Inc. Mobile device chip and mobile device controlling method therefor
TWI505081B (zh) * 2011-11-03 2015-10-21 Sget Corp Method and Method of Electric Energy Saving Information Collection System
US9325329B2 (en) * 2012-12-13 2016-04-26 Coherent Logix, Incorporated Automatic selection of on-chip clock in synchronous digital systems
US9386521B2 (en) 2012-12-20 2016-07-05 Qualcomm Incorporated Clock structure for reducing power consumption on wireless mobile devices
US9052900B2 (en) 2013-01-29 2015-06-09 Oracle International Corporation Serdes fast retrain method upon exiting power saving mode
JP2014241471A (ja) * 2013-06-11 2014-12-25 セイコーエプソン株式会社 信号発生回路、信号発生装置、信号発生装置の製造方法、電子機器、および移動体
EP2869160B1 (en) * 2013-10-30 2020-09-09 EM Microelectronic-Marin SA Electronic circuit with a sleep mode
CN105511591B (zh) * 2015-12-31 2018-10-12 天津飞腾信息技术有限公司 基于双阈值功耗自适应的dvfs调节算法
KR102641515B1 (ko) * 2016-09-19 2024-02-28 삼성전자주식회사 메모리 장치 및 그것의 클록 분배 방법
US10218391B1 (en) * 2017-08-02 2019-02-26 Qualcomm Incorporated Systems and methods providing a low-power mode for serial links
US10515670B1 (en) * 2018-06-13 2019-12-24 Nanya Technology Corporation Memory apparatus and voltage control method thereof
CN110719088B (zh) * 2018-07-13 2023-04-07 瑞昱半导体股份有限公司 时钟产生电路与混合式电路
US11481015B2 (en) * 2019-06-25 2022-10-25 Nxp B.V. Power consumption management in protocol-based redrivers
KR102883342B1 (ko) * 2019-11-26 2025-11-07 삼성전자주식회사 Nfc 트랜시버를 위한 클럭 복원 회로, nfc 트랜시버, 및 nfc 트랜시버의 제어 방법
US11290117B1 (en) 2021-12-01 2022-03-29 Joseph Kosednar, Jr. Low-frequency arithmetic multiplying PLL for HDL devices
US12315594B2 (en) * 2022-10-07 2025-05-27 Dell Products L.P. Controlling memory module clock buffer power in a system with a single memory clock per memory module
US12147684B2 (en) * 2022-10-07 2024-11-19 Dell Products L.P. Method for power reduction in memory modules

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CN1655457A (zh) * 2004-02-09 2005-08-17 恩益禧电子股份有限公司 分数分频电路和使用它的数据传输装置
US20050242851A1 (en) * 2004-04-29 2005-11-03 Booth Richard V Signal generator with selectable mode control

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US5982210A (en) 1994-09-02 1999-11-09 Sun Microsystems, Inc. PLL system clock generator with instantaneous clock frequency shifting
JP3523362B2 (ja) * 1995-04-10 2004-04-26 富士通株式会社 クロック回路及びこれを用いたプロセッサ
JPH1094019A (ja) * 1996-09-13 1998-04-10 Matsushita Electric Ind Co Ltd データ受信装置
JPH11312026A (ja) * 1998-04-28 1999-11-09 Nec Corp クロック信号切替方法およびクロック信号切替システム
JP2002091608A (ja) * 2000-09-18 2002-03-29 Matsushita Electric Ind Co Ltd クロック供給装置、及びクロック供給方法
US6718473B1 (en) * 2000-09-26 2004-04-06 Sun Microsystems, Inc. Method and apparatus for reducing power consumption
US6515530B1 (en) 2001-10-11 2003-02-04 International Business Machines Corporation Dynamically scalable low voltage clock generation system
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US7155617B2 (en) * 2002-08-01 2006-12-26 Texas Instruments Incorporated Methods and systems for performing dynamic power management via frequency and voltage scaling
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US7089444B1 (en) * 2003-09-24 2006-08-08 Altera Corporation Clock and data recovery circuits
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US7496774B2 (en) * 2004-06-04 2009-02-24 Broadcom Corporation Method and system for generating clocks for standby mode operation in a mobile communication device
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CN1655457A (zh) * 2004-02-09 2005-08-17 恩益禧电子股份有限公司 分数分频电路和使用它的数据传输装置
US20050242851A1 (en) * 2004-04-29 2005-11-03 Booth Richard V Signal generator with selectable mode control

Also Published As

Publication number Publication date
US7849339B2 (en) 2010-12-07
KR101480734B1 (ko) 2015-01-09
KR20090125836A (ko) 2009-12-07
EP2135354A4 (en) 2014-11-12
TW200901631A (en) 2009-01-01
JP2014032681A (ja) 2014-02-20
US20080235526A1 (en) 2008-09-25
JP2010523022A (ja) 2010-07-08
WO2008118821A1 (en) 2008-10-02
JP5367590B2 (ja) 2013-12-11
TWI358904B (en) 2012-02-21
EP2135354A1 (en) 2009-12-23
CN101641866A (zh) 2010-02-03
JP5730368B2 (ja) 2015-06-10

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SE01 Entry into force of request for substantive examination
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TA01 Transfer of patent application right

Effective date of registration: 20151216

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Applicant after: LATTICE SEMICONDUCTOR CORPORATION

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Applicant before: Silicon Image Inc. A. Delaware C.

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GR01 Patent grant