CN101604961A - 用于具有集成无源器件的功率放大器的系统和方法 - Google Patents

用于具有集成无源器件的功率放大器的系统和方法 Download PDF

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Publication number
CN101604961A
CN101604961A CNA2009101461057A CN200910146105A CN101604961A CN 101604961 A CN101604961 A CN 101604961A CN A2009101461057 A CNA2009101461057 A CN A2009101461057A CN 200910146105 A CN200910146105 A CN 200910146105A CN 101604961 A CN101604961 A CN 101604961A
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signal
power amplifier
amplifying
signal combination
amplifier system
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CN101604961B (zh
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梁起硕
张在濬
安奎焕
禹王命
李彰浩
金胤锡
裴孝根
金基仲
饭塚伸一
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Samsung Electro Mechanics Co Ltd
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Samsung Electro Mechanics Co Ltd
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    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/537—A transformer being used as coupling element between two amplifying stages
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/541—Transformer coupled at the output of an amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2203/00—Indexing scheme relating to amplifiers with only discharge tubes or only semiconductor devices as amplifying elements covered by H03F3/00
    • H03F2203/20—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers
    • H03F2203/21—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only
    • H03F2203/211—Indexing scheme relating to power amplifiers, e.g. Class B amplifiers, Class C amplifiers with semiconductor devices only using a combination of several amplifiers
    • H03F2203/21142—Output signals of a plurality of power amplifiers are parallel combined to a common output

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Abstract

本发明的实施例可提供一种用于具有集成无源器件的功率放大器的系统和方法，由此提高功率放大器系统的性能。该功率放大器系统可包括信号放大部分、信号组合部分以及将信号放大部分和信号组合部分互连的结合器件部分。信号放大部分可被实现在第一基底上，信号组合部分可被实现在第二基底上，第一基底和第二基底可以不同。可通过集成无源器件(IPD)实现信号组合部分，集成无源器件可具有高性能无源器件的特性，高性能无源器件具有实现各种功能(包括陷波滤波器、低通滤波器和/或用于偏置网络的旁路电容)的灵活性。通过集成无源器件实现的信号组合部分可具有改善的功率组合效率。

Description

用于具有集成无源器件的功率放大器的系统和方法
技术领域
本发明的实施例总体上涉及一种功率放大器系统，更具体地讲，涉及一种具有集成无源器件(IPD)的提高功率组合效率的功率放大器系统。
背景技术
当前，已经使用砷化镓场效应晶体管(GaAs FET)、砷化镓异质结双极性晶体管(GaAs HBT)、横向扩散金属氧化硅(LDMOS)或磷化铟镓异质结双极性晶体管(InGaP HBT)来实现用于移动通信的功率放大器。这些功率放大器可实现无线通信的输出功率(Pout)和功率附加效率(PAE)；但是，这些功率放大器具有的缺点是：需要额外的功率控制器芯片、额外的输出匹配电路等。
为了改善这些问题，互补金属氧化物半导体(CMOS)工艺已经用于实现功率放大器，由此与GaAs和其它传统工艺相比，提供了具有功率控制器电路的高度集成以及低成本。但是。在传统CMOS工艺中使用的硅(Si)基底是导电性的，这增加了射频(RF)损耗，并严重降低了无源电路元件的性能。因此，需要这样一种新型的CMOS功率放大器设计，该CMOS功率放大器设计包括位于高阻抗的基底上的集成无源器件，使得无源器件的性能不被降低。
发明内容
根据本发明的示例性实施例，可提供一种功率放大器系统。该功率放大器系统可包括信号放大部分，信号放大部分包括多个功率器件，其中，信号放大部分可接收输入的射频(RF)信号，所述多个功率器件可用于放大所述输入的RF信号以产生相应的多个放大信号。该功率放大器系统还可包括信号组合部分，信号组合部分用于将所述多个放大信号组合为输出信号以传送到负载，其中，信号组合部分与信号放大部分可物理地区分。另外，该功率放大器系统可包括结合器件部分，结合器件部分用于电连接信号放大部分和信号组合部分。
根据本发明的另一示例性实施例，可提供一种用于功率放大器系统的方法。该方法可包括：使用第一制造工艺在第一基底上制造信号放大部分，其中，信号放大部分可包括多个功率器件，所述多个功率器件用于放大输入的RF信号以产生相应的多个放大信号；使用与第一制造工艺不同的第二制造工艺在第二基底上制造信号组合部分，其中，信号组合部分可用于将所述多个放大信号组合为输出信号以传送到负载；电连接信号放大部分和信号组合部分。
附图说明
已经按照通常的术语描述了本发明，现在将参照附图，没有必要按比例来绘制这些附图，图中：
图1示出了根据本发明示例性实施例的示例性功率放大器系统；
图2示出了根据本发明示例性实施例的用于信号组合部分的示例性集成无源器件(IPD)层叠(stackup)；
图3至图5示出了根据本发明示例性实施例的被实现为集成无源器件(IPD)的信号组合部分的示例性布局的顶层视图；
图6示出了根据本发明示例性实施例的功率放大器系统的示例性实施方式；
图7示出了根据本发明示例性实施例的功率放大器系统的示例性实施方式。
具体实施方式
现在将在下面参照附图更全面地描述本发明的示例性实施例，附图中显示了本发明的部分(而不是全部)实施例。实际上，本发明可按照多种不同的形式被实施，而不应被解释为限于这里所阐述的实施例；确切地讲，提供这些实施例使得本公开将满足可适用的法律要求。相同的标号始终表示相同的部件。
图1示出了根据本发明示例性实施例的示例性功率放大器系统100。如图1中所示，功率放大器系统100可包括信号放大部分108和信号组合部分106。信号放大部分108与信号组合部分106可物理地明显区分。例如，信号放大部分108可使用一个或多个第一工艺或基底被制造，而信号组合部分106可使用一个或多个第二工艺或基底被制造。例如，可使用互补金属氧化物半导体(CMOS)工艺实现信号放大部分108。用于信号放大部分108的一个或多个第一基底可包括低阻抗基底或材料层，所述低阻抗基底或材料层包括低阻抗硅(Si)基底或材料层。另一方面，信号组合部分106可利用集成无源器件(IPD)工艺。用于信号组合部分106的一个或多个第二基底可包括高阻抗基底或材料层，所述高阻抗基底或材料层包含高阻抗硅、砷化镓(GaAs)、低温共烧陶瓷(LTCC)、印刷电路板(PCB)和/或玻璃。根据本发明的示例性实施例，信号放大部分108可以是集成无源器件(IPD)，如图2所示。
可使用结合器件部分104将信号放大部分108和信号组合部分106电连接。根据本发明的示例性实施例，结合器件部分104可包括一个或多个电子连接件142。这些电子连接件142可包括引线，引线包括根据引线接合而使用的引线。又例如，电子连接件142可同样地包括球栅阵列(ball grid array)，球栅阵列可包括焊球或其它导电性球。球栅阵列可支持信号放大部分108和信号组合部分106之间的倒装芯片(flip-chip)连接。应该理解，在不脱离本发明的示例性实施例的情况下，对于电子连接件142件可采用其它连接方式。
仍然参照图1，将更详细地描述信号放大部分108和信号组合部分106。如图1所示，信号放大部分108可包括平衡-不平衡变压器(balun)120和多个功率部件。例如，功率部件可包括第一驱动器放大器122、多个第二驱动器放大器124a-m以及多个功率放大器126a-m。
根据本发明的示例性实施例，信号放大部分108可用于对输入信号110进行放大。根据本发明的示例性实施例，输入信号110可以是单端输入信号。输入信号110可被提供给平衡-不平衡变压器120，以用于将单端输入信号转换为差分输入信号。另一方面，如果最初以差分形式提供输入信号110，则平衡-不平衡变压器120可不是必需的。差分输入信号可被提供给第一驱动器放大器122。第一驱动器放大器122可对来自平衡-不平衡变压器120的差分输入信号进行放大，以产生第一放大信号输出。可提供第一放大信号输出作为对相应的多个第二驱动器放大器124a-m中的每个的输入。多个第二驱动器放大器124a-m可对第一放大信号进行放大，以产生相应的多个第二放大信号输出。可提供相应的多个第二放大信号输出作为对相应的多个功率放大器126a-m中的每个的输入。功率放大器126a-m可对多个第二放大信号输出中的相应的第二放大信号输出进行放大，以产生相应的多个放大信号。所述多个放大信号可作为信号放大部分108的输出。尽管没有在图1中示出，但是根据本发明的示例性实施例，信号放大部分108还可包括其它RF功能电路和控制器电路，所述RF功能电路和控制器电路可类似地使用CMOS工艺与示出的部件集成。
信号组合部分106可用于将来自信号放大部分108的多个放大信号组合为输出信号。信号组合部分106还可用于提供信号放大部分和负载之间的谐波抑制、功率监控和/或阻抗变换中的一种或多种。根据本发明的示例性实施例，信号组合部分106可包括变压器。所述变压器可包括多个初级绕组160a-m和次级绕组164，其中，多个初级绕组160a-m可感应地结合到次级绕组164。多个初级绕组160a-m可用作电感器161a-m。可选地，多个初级绕组160a-m可被连接到相应的电容器163a-m。根据本发明的示例性实施例，电容器163a-m可用于提供可选的阻抗变换。
次级绕组164可用作电感器165。次级绕组164可连接到可选的电容器166，电容器166用于滤波和/或阻抗变换目的。尽管没有在图1中示出，但是信号组合部分106还可包括与初级绕组160a-m或次级绕组164电接触的一个或多个电阻器，以支持阻抗变换、滤波和/或谐波抑制和/或功率监控。
在图1中，多个初级绕组160a-m中的每个可从多个功率放大器126a-m中的相应功率放大器接收相应的放大信号。根据本发明的示例性实施例，多个初级绕组160a-m在次级绕组164中感应的通量或电流中的每个可被同相地组合或求和。次级绕组164可提供系统输出端口，系统输出端口将输出信号112提供给负载。根据本发明的示例性实施例，负载可以是天线。
应该理解，根据本发明的其它示例性实施例，可采用功率放大器系统100的多种变形。根据本发明的示例性实施例，信号放大部分108中的一个或多个功率部件可被选择性地操作(例如，选择性地截止或导通)。例如，如果输出信号112期望为低功率电平，则第二驱动器放大器124a-m以及功率放大器126a-m中的一个或多个可被截止。例如，第二驱动器放大器124b和功率放大器126b可通过提供给第二驱动器放大器124b和功率放大器126b的相应偏压被截止。根据本发明的另一示例性实施例，功率放大器系统100可支持多频带的操作。为此，信号放大部分108可包括另外的一组或多组平衡-不平衡变压器、第一驱动器放大器、第二驱动器放大器和功率放大器，以支持一个或多个另外的频带的操作。同样地，信号组合部分106可包括另外的一组或多组初级绕组和次级绕组，以支持一个或多个另外的频带的操作。类似地，可存在结合器件部分104的另外的电子连接件142，以连接信号放大部分108和信号组合部分106的另外的多组部件。
图2示出了根据本发明示例性实施例的用于信号组合部分的示例性集成无源器件(IPD)层叠200。根据本发明的示例性实施例，IPD层叠200可用于实现信号组合部分106。
根据本发明的示例性实施例，图2中的IPD层叠200可在基础基底202上被制造。根据本发明的示例性实施例，基础基底202可以是阻抗基底。例如，基础基底202可包含高阻抗硅、玻璃、GaAs、InP、FR4、低温共烧陶瓷(LTCC)或其它基底。一层阻抗材料(诸如镍铬(NiCr))可沉积在基础基底202上，并被蚀刻或图案化，以形成电阻器207。接着，第一金属层210可被沉积在基础基底202上，其中，第一金属层210可接触电阻器207。根据本发明的示例性实施例，第一金属层210也可被图案化、电路化，或进行其它设置，以形成电容器208的下板、互连件216的接触焊盘以及电感器209的一个或多个部分或馈给(feed)，电感器209可以是螺旋电感器。第一金属层210可包含钛(Ti)、铜(Cu)、镍(Ni)、金(Au)、铝、其它导电性材料或它们的组合。例如，根据本发明的示例性实施例，电容器208的下板以及电感器209的一个或多个部分或馈给可由铜制成，而互连件216的接触焊盘可以是Ni/Au的组合。根据本发明的示例性实施例，电感器209可以是初级绕组160a-m和/或次级绕组164中的一个或多个的代表。
如图2所示，第一介电层204可被沉积，以涂敷第一金属层210。如果需要，第一介电层204可被蚀刻，以例如为互连件216提供对第一金属层210的连接或其它通孔。第一介电层204可用作电容器208的下板和上板之间的电容器电介质。对于电容器电介质，第一介电层204可具有低的介电常数，可在6.8或更小的介电常数的示例性范围内。第一介电层204可包含氧化硅、氮化硅(SiN)、BCB(苯并环丁烯)、FR4或陶瓷。第二金属层212可被沉积，然后被图案化、电路化，或进行其它设置，以形成电感器209的一个或多个部分和/或电容器208的上板。第二金属层212可包含钛(Ti)、铜(Cu)、镍(Ni)、金(Au)、铝、其它导电性材料或它们的组合。然后，层叠200可被涂敷有第二介电层205。第二介电层205可限定有用于诸如互连件216的通孔的空间。第二介电层205可包含氧化硅、苯并环丁烯(BCB)、硅(Si)、氮化硅(SiN)、FR4、陶瓷或其它介电材料。第二介电层205可具有低的介电常数，可在2.65或更小的介电常数的示例性范围内。第一介电层204和第二介电层205可以是绝缘层。
接着，第三金属层214可被沉积、被图案化、被电路化，或进行设置，以形成特定的无源部件，诸如电感器209的一部分，或对接地层的连接件、连接焊盘(例如负载连接焊盘)等。然后，层叠200可被涂敷有第三介电层206。第三介电层206可限定有用于互连件216的空间。第三介电层206可包含苯并环丁烯(BCB)、硅(Si)、氮化硅(SiN)、FR4、陶瓷或其它介电材料。第三介电层206可具有低的介电常数，可在2.65或更小的介电常数的示例性范围内。然后，用于互连件216的空间可被金属化，或者可被另外填充导电性材料(诸如Ni/Au)。根据本发明的示例性实施例，互连件216可用于从信号组合部分接收输入。应该理解，尽管在图2中示出了特定的层叠200，但是在不脱离本发明示例性实施例的情况下，本领域普通技术人员应该理解多种变形是可行的。
图3至图5示出了根据本发明示例性实施例的被实现为集成无源器件(IPD)的信号组合部分的示例性布局的顶层视图。如图3所示，可有一个变压器，该变压器具有两个初级绕组308a、309a以及单个次级绕组310a。初级绕组308a、309a可包括大约一匝(turn)，而单个次级绕组310a可包括多匝。在图3中，单个次级绕组310a可包括两匝。初级绕组308a可在输入端口308b和308c从信号放大部分的第一功率放大器接收放大信号。同样地，初级绕组309a可在输入端口309b和309c从信号放大部分的第二功率放大器接收放大信号。可选地，还可在输入端口308b和308c之间设置电容器308d，类似地，可在输入端口309b和309c之间设置电容器309d。如这里所描述的，电容器308d和309d有助于阻抗转换。如图3所示，初级绕组308a和309a可与次级绕组310a交错。对于初级绕组308a、309a与次级绕组310a交叉的部分，可使用通孔来执行这些部分的布线(routing)，以提供这些交叉部分之上或之下的连接。
在图3中，可通过输入端口308b、308c以及309b和309c将电流从第一功率放大器和第二功率放大器提供给初级绕组308a、309a。在次级绕组310a中可产生磁感应电流，这些磁感应电流被同相地相加。根据本发明的示例性实施例，变压器可被设计为使得初级绕组308a、309a的电流的方向相同，以防止自抵消。根据本发明的示例性实施例，次级绕组310a的输出端口310b和310c可被连接到负载(诸如天线)。
图4示出了信号组合部分的示例性布局，其中，变压器可包括三个初级绕组407a、408a和409a以及单个次级绕组410a。根据本发明的示例性实施例，三个初级绕组407a、408a和409a中的每个可包括大约一匝，而单个次级绕组410a可包括大约两匝。初级绕组407a可在输入端口407b和407c从信号放大部分的第一功率放大器接收放大信号。初级绕组408a可在输入端口408b和408c从信号放大部分的第二功率放大器接收放大信号。同样地，初级绕组409a可在输入端口409b和409c从信号放大部分的第三功率放大器接收放大信号。如图4所示，初级绕组407a、408a和409a可与次级绕组410a交错。
在图4中，可通过输入端口407b、407c、408b、408c以及409b和409c将电流从第一功率放大器、第二功率放大器和第三功率放大器提供给初级绕组407a、408a和409a。在次级绕组410a中可产生磁感应电流，这些磁感应电流被同相地相加。根据本发明的示例性实施例，变压器可被设计为使得初级绕组407a、408a和409a的电流的方向相同，以防止自抵消。根据本发明的示例性实施例，次级绕组410a的输出端口410b和410c可被连接到负载(诸如天线)。
图5示出了信号组合部分的示例性布局，其中，变压器可包括四个初级绕组506a、507a、508a和509a以及单个次级绕组510a。根据本发明的示例性实施例，四个初级绕组506a、507a、508a和509a中的每个可包括大约一匝，而单个次级绕组510a可包括大约三匝。初级绕组506a可在输入端口506b和506c从信号放大部分的第一功率放大器接收放大信号。初级绕组507a可在输入端口507b和507c从信号放大部分的第二功率放大器接收放大信号。初级绕组508a可在输入端口508b和508c从信号放大部分的第三功率放大器接收放大信号。同样地，初级绕组509a可在输入端口509b和509c从信号放大部分的第四功率放大器接收放大信号。如图5所示，初级绕组506a、507a、508a和509a可与次级绕组510a交错。
在图5中，可通过输入端口506b、506c、507b、507c、508b、508c以及509b和509c将电流从第一功率放大器、第二功率放大器、第三功率放大器和第四功率放大器提供给初级绕组506a、507a、508a和509a。在次级绕组510a中可产生磁感应电流，这些磁感应电流被同相地相加。根据本发明的示例性实施例，变压器可被设计为使得初级绕组506a、507a、508a和509a的电流的方向相同，以防止自抵消。根据本发明的示例性实施例，次级绕组510a的输出端口510b和510c可被连接到负载(诸如天线)。
图6示出了根据本发明示例性实施例的功率放大器系统的示例性实施方式。如图6所示，信号放大部分108可与信号组合部分106基本共面。然而，应该理解，在其它实施例中，信号放大部分108和信号组合部分106还可位于其它平面和/或彼此形成角度。在图6中，结合器件部分104可包括引线，该引线用于将信号放大部分108和信号组合部分106进行接合和电连接。引线可由各种导电性材料制成，所述导电性材料包括铜、金、银、铝、合金等。
图7示出了根据本发明示例性实施例的功率放大器系统的示例性实施方式。如图7所示，信号放大部分108可与信号组合部分106相对而层叠。在图7中，结合器件部分104可包括用于电连接信号放大部分108和信号组合部分106的球栅阵列。球栅阵列可由焊料隆起(solder bump)或其它导电性球制成。尽管在图7中没有示出，但是信号放大部分108和信号组合部分106之间的空间可被底层填料填充，或者被另外的电介质或绝缘材料填充。
本发明所属领域的技术人员将会想到本发明的多种修改和其它实施例，在前面的描述和附图中已经展示了本发明的优点。因此，应该理解，本发明不限于公开的特定实施例，这些修改和其它实施例意图被包括在权利要求的范围内。虽然这里采用了特定术语，但是这些术语仅仅用于通常和描述性的含义，而不是为了限制的目的。

Claims (20)

1、一种功率放大器系统，包括：
信号放大部分，包括多个功率器件，其中，信号放大部分接收输入的射频信号，所述多个功率器件用于放大所述输入的射频信号以产生相应的多个放大信号；
信号组合部分，用于将所述多个放大信号组合为输出信号以传送到负载，其中，信号组合部分与信号放大部分物理地区分；以及
结合器件部分，用于电连接信号放大部分和信号组合部分。
2、根据权利要求1所述的功率放大器系统，其中，信号组合部分包括变压器，所述变压器包括：
多个初级绕组，其中，每个初级绕组接收所述多个放大信号中的相应的放大信号；以及
次级绕组，感应地结合到所述多个初级绕组，其中，次级绕组用于提供输出信号以传送到负载。
3、根据权利要求1所述的功率放大器系统，其中，所述多个功率器件能够选择性地操作。
4、根据权利要求1所述的功率放大器系统，其中，信号放大部分包括平衡-不平衡变压器，所述功率器件包括第一驱动器放大器、多个第二驱动器放大器和多个功率放大器。
5、根据权利要求4所述的功率放大器系统，其中，所述输入的射频信号是单端输入信号，平衡-不平衡变压器用于将单端输入信号转换为差分信号输出，第一驱动器放大器用于放大差分信号输出以产生第一放大信号输出，所述多个第二驱动器放大器中的每个用于进一步放大第一放大信号输出以产生多个相应的第二放大信号输出，所述多个相应的第二放大信号输出中的每个被提供给所述多个功率放大器中的相应的功率放大器以产生相应的多个放大信号。
6、根据权利要求1所述的功率放大器系统，其中，信号组合部分还用于提供信号放大部分和负载之间的谐波抑制、功率监控或阻抗变换中的一种或多种。
7、根据权利要求1所述的功率放大器系统，其中，信号组合部分包括根据引线接合连接的至少一条引线或根据倒装芯片连接的至少一个焊料隆起。
8、根据权利要求1所述的功率放大器系统，其中，信号组合部分包括基础基底、由所述基础基底支撑的多个金属层、将所述多个金属层中的至少两个分开的至少一个介电层以及电连接所述多个金属层中的两个的至少一个通孔。
9、根据权利要求8所述的功率放大器系统，其中，基础基底包含硅、砷化镓、InP、FR4或低温共烧陶瓷中的至少一种。
10、根据权利要求8所述的功率放大器系统，其中，介电层是绝缘层，介电层具有氧化硅、苯并环丁烯、氮化硅、FR4或低温共烧陶瓷。
11、根据权利要求1所述的功率放大器系统，其中，信号放大部分和信号组合部分共面，信号组合部分包括位于信号放大部分和信号组合部分之间的至少一个引线连接件。
12、根据权利要求1所述的功率放大器系统，其中，信号放大部分和信号组合部分彼此相对层叠，信号组合部分包括位于信号放大部分和信号组合部分之间的至少一个焊料隆起。
13、根据权利要求1所述的功率放大器系统，其中，使用一个或多个低阻抗基底来实现信号放大部分，使用一个或多个高阻抗基底来实现信号组合部分。
14、一种用于功率放大器系统的方法，所述方法包括：
使用第一制造工艺在第一基底上制造信号放大部分，其中，信号放大部分包括多个功率器件，所述多个功率器件用于放大输入的射频信号以产生相应的多个放大信号；
使用与第一制造工艺不同的第二制造工艺在第二基底上制造信号组合部分，其中，信号组合部分用于将所述多个放大信号组合为输出信号以传送到负载；以及
电连接信号放大部分和信号组合部分。
15、根据权利要求14所述的方法，其中，第一制造工艺是互补金属氧化物半导体工艺，第二制造工艺是集成无源器件工艺。
16、根据权利要求14所述的方法，其中，第一基底是低阻抗硅，第二基底是高阻抗硅、玻璃、砷化镓、InP、FR4或低温共烧陶瓷。
17、根据权利要求14所述的方法，其中，制造信号组合部分的步骤包括：制造多个初级绕组以及次级绕组，其中，所述多个初级绕组感应地结合到次级绕组。
18、根据权利要求17所述的方法，其中，所述多个初级绕组中的一个或多个连接到相应的电容器，所述电容器包括上板和下板，所述上板和下板被具有低介电常数的介电层分隔。
19、根据权利要求17所述的方法，其中，所述多个初级绕组以及次级绕组之一或两者包括螺旋电感器。
20、根据权利要求14所述的方法，其中，电连接信号放大部分和信号组合部分的步骤包括：使用引线结合连接或球栅阵列来电连接信号放大部分和信号组合部分。
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