CN101523557B - 一个晶体管的dram单元结构及其形成方法 - Google Patents
一个晶体管的dram单元结构及其形成方法 Download PDFInfo
- Publication number
- CN101523557B CN101523557B CN2007800383098A CN200780038309A CN101523557B CN 101523557 B CN101523557 B CN 101523557B CN 2007800383098 A CN2007800383098 A CN 2007800383098A CN 200780038309 A CN200780038309 A CN 200780038309A CN 101523557 B CN101523557 B CN 101523557B
- Authority
- CN
- China
- Prior art keywords
- source
- region
- drain region
- drain
- dram cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000000034 method Methods 0.000 title description 32
- 210000000746 body region Anatomy 0.000 claims abstract description 76
- 229910021332 silicide Inorganic materials 0.000 claims description 43
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 42
- 239000000463 material Substances 0.000 claims description 21
- 230000004888 barrier function Effects 0.000 claims description 17
- 239000000969 carrier Substances 0.000 claims description 13
- 230000004044 response Effects 0.000 claims description 8
- 239000010410 layer Substances 0.000 description 25
- 239000007943 implant Substances 0.000 description 24
- 239000004065 semiconductor Substances 0.000 description 8
- 125000006850 spacer group Chemical group 0.000 description 8
- 230000008901 benefit Effects 0.000 description 7
- 239000000758 substrate Substances 0.000 description 7
- 206010010144 Completed suicide Diseases 0.000 description 6
- 238000004519 manufacturing process Methods 0.000 description 6
- 239000004020 conductor Substances 0.000 description 4
- 238000002513 implantation Methods 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 239000012212 insulator Substances 0.000 description 3
- 230000000873 masking effect Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 239000000243 solution Substances 0.000 description 3
- ZXEYZECDXFPJRJ-UHFFFAOYSA-N $l^{3}-silane;platinum Chemical compound [SiH3].[Pt] ZXEYZECDXFPJRJ-UHFFFAOYSA-N 0.000 description 2
- 229910052691 Erbium Inorganic materials 0.000 description 2
- 229910052769 Ytterbium Inorganic materials 0.000 description 2
- 238000003491 array Methods 0.000 description 2
- 230000006399 behavior Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 2
- UYAHIZSMUZPPFV-UHFFFAOYSA-N erbium Chemical compound [Er] UYAHIZSMUZPPFV-UHFFFAOYSA-N 0.000 description 2
- 238000002347 injection Methods 0.000 description 2
- 239000007924 injection Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- NAWDYIZEMPQZHO-UHFFFAOYSA-N ytterbium Chemical compound [Yb] NAWDYIZEMPQZHO-UHFFFAOYSA-N 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 229910021339 platinum silicide Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 238000013341 scale-up Methods 0.000 description 1
- 239000002356 single layer Substances 0.000 description 1
- 238000003860 storage Methods 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/404—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with one charge-transfer gate, e.g. MOS transistor, per cell
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B12/00—Dynamic random access memory [DRAM] devices
- H10B12/20—DRAM devices comprising floating-body transistors, e.g. floating-body cells
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/711—Insulated-gate field-effect transistors [IGFET] having floating bodies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions
- H10D64/23—Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
- H10D64/251—Source or drain electrodes for field-effect devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D64/00—Electrodes of devices having potential barriers
- H10D64/60—Electrodes characterised by their materials
- H10D64/64—Electrodes comprising a Schottky barrier to a semiconductor
- H10D64/647—Schottky drain or source electrodes for IGFETs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
- H10D89/10—Integrated device layouts
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C2211/401—Indexing scheme relating to cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C2211/4016—Memory devices with silicon-on-insulator cells
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Semiconductor Memories (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US11/554,851 | 2006-10-31 | ||
| US11/554,851 US7608898B2 (en) | 2006-10-31 | 2006-10-31 | One transistor DRAM cell structure |
| PCT/US2007/077170 WO2008054919A1 (en) | 2006-10-31 | 2007-08-30 | One transistor dram cell structure and method for forming |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101523557A CN101523557A (zh) | 2009-09-02 |
| CN101523557B true CN101523557B (zh) | 2011-01-26 |
Family
ID=39329076
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2007800383098A Active CN101523557B (zh) | 2006-10-31 | 2007-08-30 | 一个晶体管的dram单元结构及其形成方法 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US7608898B2 (enExample) |
| EP (1) | EP2080217A4 (enExample) |
| JP (1) | JP5317353B2 (enExample) |
| KR (1) | KR101389293B1 (enExample) |
| CN (1) | CN101523557B (enExample) |
| TW (1) | TWI441319B (enExample) |
| WO (1) | WO2008054919A1 (enExample) |
Families Citing this family (54)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7606066B2 (en) | 2005-09-07 | 2009-10-20 | Innovative Silicon Isi Sa | Memory cell and memory cell array having an electrically floating body transistor, and methods of operating same |
| US7492632B2 (en) | 2006-04-07 | 2009-02-17 | Innovative Silicon Isi Sa | Memory array having a programmable word length, and method of operating same |
| WO2007128738A1 (en) | 2006-05-02 | 2007-11-15 | Innovative Silicon Sa | Semiconductor memory cell and array using punch-through to program and read same |
| US8069377B2 (en) | 2006-06-26 | 2011-11-29 | Micron Technology, Inc. | Integrated circuit having memory array including ECC and column redundancy and method of operating the same |
| KR101277402B1 (ko) | 2007-01-26 | 2013-06-20 | 마이크론 테크놀로지, 인코포레이티드 | 게이트형 바디 영역으로부터 격리되는 소스/드레인 영역을 포함하는 플로팅-바디 dram 트랜지스터 |
| US8518774B2 (en) * | 2007-03-29 | 2013-08-27 | Micron Technology, Inc. | Manufacturing process for zero-capacitor random access memory circuits |
| US8064274B2 (en) | 2007-05-30 | 2011-11-22 | Micron Technology, Inc. | Integrated circuit having voltage generation circuitry for memory cell array, and method of operating and/or controlling same |
| US8085594B2 (en) | 2007-06-01 | 2011-12-27 | Micron Technology, Inc. | Reading technique for memory cell with electrically floating body transistor |
| WO2009039169A1 (en) | 2007-09-17 | 2009-03-26 | Innovative Silicon S.A. | Refreshing data of memory cells with electrically floating body transistors |
| US8536628B2 (en) | 2007-11-29 | 2013-09-17 | Micron Technology, Inc. | Integrated circuit having memory cell array including barriers, and method of manufacturing same |
| US8349662B2 (en) | 2007-12-11 | 2013-01-08 | Micron Technology, Inc. | Integrated circuit having memory cell array, and method of manufacturing same |
| US8773933B2 (en) | 2012-03-16 | 2014-07-08 | Micron Technology, Inc. | Techniques for accessing memory cells |
| US8014195B2 (en) | 2008-02-06 | 2011-09-06 | Micron Technology, Inc. | Single transistor memory cell |
| US8189376B2 (en) | 2008-02-08 | 2012-05-29 | Micron Technology, Inc. | Integrated circuit having memory cells including gate material having high work function, and method of manufacturing same |
| US7957206B2 (en) | 2008-04-04 | 2011-06-07 | Micron Technology, Inc. | Read circuitry for an integrated circuit having memory cells and/or a memory cell array, and method of operating same |
| US7947543B2 (en) | 2008-09-25 | 2011-05-24 | Micron Technology, Inc. | Recessed gate silicon-on-insulator floating body device with self-aligned lateral isolation |
| US7933140B2 (en) * | 2008-10-02 | 2011-04-26 | Micron Technology, Inc. | Techniques for reducing a voltage swing |
| US7924630B2 (en) | 2008-10-15 | 2011-04-12 | Micron Technology, Inc. | Techniques for simultaneously driving a plurality of source lines |
| US8067803B2 (en) * | 2008-10-16 | 2011-11-29 | Micron Technology, Inc. | Memory devices, transistor devices and related methods |
| US8223574B2 (en) | 2008-11-05 | 2012-07-17 | Micron Technology, Inc. | Techniques for block refreshing a semiconductor memory device |
| US8213226B2 (en) | 2008-12-05 | 2012-07-03 | Micron Technology, Inc. | Vertical transistor memory cell and array |
| US8319294B2 (en) | 2009-02-18 | 2012-11-27 | Micron Technology, Inc. | Techniques for providing a source line plane |
| US8710566B2 (en) * | 2009-03-04 | 2014-04-29 | Micron Technology, Inc. | Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device |
| US8748959B2 (en) | 2009-03-31 | 2014-06-10 | Micron Technology, Inc. | Semiconductor memory device |
| US8139418B2 (en) | 2009-04-27 | 2012-03-20 | Micron Technology, Inc. | Techniques for controlling a direct injection semiconductor memory device |
| US8508994B2 (en) | 2009-04-30 | 2013-08-13 | Micron Technology, Inc. | Semiconductor device with floating gate and electrically floating body |
| US8498157B2 (en) | 2009-05-22 | 2013-07-30 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
| US8537610B2 (en) | 2009-07-10 | 2013-09-17 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| US9076543B2 (en) | 2009-07-27 | 2015-07-07 | Micron Technology, Inc. | Techniques for providing a direct injection semiconductor memory device |
| US8199595B2 (en) | 2009-09-04 | 2012-06-12 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
| CN102044433B (zh) * | 2009-10-10 | 2013-02-27 | 复旦大学 | 一种混合源漏场效应晶体管及其制备方法 |
| US8174881B2 (en) | 2009-11-24 | 2012-05-08 | Micron Technology, Inc. | Techniques for reducing disturbance in a semiconductor device |
| US8310893B2 (en) | 2009-12-16 | 2012-11-13 | Micron Technology, Inc. | Techniques for reducing impact of array disturbs in a semiconductor memory device |
| CN101777562B (zh) * | 2010-01-15 | 2015-05-20 | 复旦大学 | 浮栅非挥发半导体存储器及其制造方法 |
| CN101777586B (zh) * | 2010-01-21 | 2012-11-21 | 复旦大学 | 一种混合结型源漏场效应晶体管及其制备方法 |
| US8416636B2 (en) | 2010-02-12 | 2013-04-09 | Micron Technology, Inc. | Techniques for controlling a semiconductor memory device |
| US8411513B2 (en) | 2010-03-04 | 2013-04-02 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device having hierarchical bit lines |
| US8576631B2 (en) | 2010-03-04 | 2013-11-05 | Micron Technology, Inc. | Techniques for sensing a semiconductor memory device |
| US8369177B2 (en) | 2010-03-05 | 2013-02-05 | Micron Technology, Inc. | Techniques for reading from and/or writing to a semiconductor memory device |
| WO2011115893A2 (en) | 2010-03-15 | 2011-09-22 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| CN101807602A (zh) * | 2010-03-25 | 2010-08-18 | 复旦大学 | 一种不对称型源漏场效应晶体管及其制备方法 |
| CN101834141B (zh) * | 2010-04-28 | 2015-03-04 | 复旦大学 | 一种不对称型源漏场效应晶体管的制备方法 |
| US8411524B2 (en) | 2010-05-06 | 2013-04-02 | Micron Technology, Inc. | Techniques for refreshing a semiconductor memory device |
| CN101887917A (zh) * | 2010-06-10 | 2010-11-17 | 复旦大学 | 一种场效应晶体管及其制备方法 |
| KR20120121139A (ko) * | 2011-04-26 | 2012-11-05 | 송복남 | 비휘발성 메모리 소자의 구동 방법 |
| US8531878B2 (en) | 2011-05-17 | 2013-09-10 | Micron Technology, Inc. | Techniques for providing a semiconductor memory device |
| US9559216B2 (en) | 2011-06-06 | 2017-01-31 | Micron Technology, Inc. | Semiconductor memory device and method for biasing same |
| US8514626B2 (en) | 2011-07-26 | 2013-08-20 | Micron Technology, Inc. | Memory cells and methods of storing information |
| WO2014113572A1 (en) * | 2013-01-16 | 2014-07-24 | Maxlinear, Inc. | Dynamic random access memory for communications systems |
| KR102415409B1 (ko) * | 2015-09-09 | 2022-07-04 | 에스케이하이닉스 주식회사 | 이피롬 셀 및 그 제조방법과, 이피롬 셀 어레이 |
| KR102226206B1 (ko) * | 2020-02-06 | 2021-03-11 | 포항공과대학교 산학협력단 | 이중 pn 접합을 포함하는 메모리 소자 및 그 구동방법 |
| CN113820531B (zh) * | 2020-06-19 | 2024-07-12 | 拓荆科技股份有限公司 | 一种射频系统状态受控的半导体设备 |
| US12453074B2 (en) | 2022-10-24 | 2025-10-21 | Eraytroniks Co., Ltd. | Memory circuit, dynamic random access memory and operation method thereof |
| TWI845415B (zh) * | 2022-10-24 | 2024-06-11 | 國立中央大學 | 記憶體電路、動態隨機存取記憶體及其操作方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6044011A (en) * | 1998-05-08 | 2000-03-28 | Micron Technology, Inc. | Static-random-access-memory cell |
| US6353251B1 (en) * | 1997-11-28 | 2002-03-05 | Mitsuteru Kimura | MOS gate Schottky tunnel transistor and an integrated circuit using the same |
| CN1815742A (zh) * | 2004-12-15 | 2006-08-09 | 台湾积体电路制造股份有限公司 | 存储单元和形成一存储单元的方法 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5142903B1 (enExample) * | 1970-02-12 | 1976-11-18 | ||
| JP3039967B2 (ja) * | 1990-08-03 | 2000-05-08 | 株式会社日立製作所 | 半導体装置 |
| JPH06283546A (ja) * | 1993-03-26 | 1994-10-07 | Fuji Electric Co Ltd | 半導体装置の電極引き出し方法 |
| JP3243146B2 (ja) * | 1994-12-08 | 2002-01-07 | 株式会社東芝 | 半導体装置 |
| JP4216483B2 (ja) * | 2001-02-15 | 2009-01-28 | 株式会社東芝 | 半導体メモリ装置 |
| TW200305976A (en) * | 2001-04-03 | 2003-11-01 | Matsushita Electric Industrial Co Ltd | Semiconductor device and method for fabricating the same |
| TWI230392B (en) * | 2001-06-18 | 2005-04-01 | Innovative Silicon Sa | Semiconductor device |
| JP2003031693A (ja) * | 2001-07-19 | 2003-01-31 | Toshiba Corp | 半導体メモリ装置 |
| EP1357603A3 (en) | 2002-04-18 | 2004-01-14 | Innovative Silicon SA | Semiconductor device |
| EP1355361A1 (fr) | 2002-04-18 | 2003-10-22 | Innovative Silicon SA | Procédé pour créer une charge électrique dans le corps d'un composant semi-conducteur |
| US6835619B2 (en) * | 2002-08-08 | 2004-12-28 | Micron Technology, Inc. | Method of forming a memory transistor comprising a Schottky contact |
| US6903969B2 (en) * | 2002-08-30 | 2005-06-07 | Micron Technology Inc. | One-device non-volatile random access memory cell |
| JP2004140262A (ja) * | 2002-10-18 | 2004-05-13 | Fujitsu Ltd | 半導体装置及びその製造方法 |
| US6861689B2 (en) * | 2002-11-08 | 2005-03-01 | Freescale Semiconductor, Inc. | One transistor DRAM cell structure and method for forming |
| US6768156B1 (en) * | 2003-02-10 | 2004-07-27 | Micron Technology, Inc. | Non-volatile random access memory cells associated with thin film constructions |
| US7042052B2 (en) * | 2003-02-10 | 2006-05-09 | Micron Technology, Inc. | Transistor constructions and electronic devices |
| US6714436B1 (en) * | 2003-03-20 | 2004-03-30 | Motorola, Inc. | Write operation for capacitorless RAM |
| US20040228168A1 (en) * | 2003-05-13 | 2004-11-18 | Richard Ferrant | Semiconductor memory device and method of operating same |
| US8125003B2 (en) * | 2003-07-02 | 2012-02-28 | Micron Technology, Inc. | High-performance one-transistor memory cell |
| JP2005109233A (ja) * | 2003-09-30 | 2005-04-21 | Toshiba Corp | 静電放電保護素子、静電放電保護回路、静電放電保護回路設計システム、静電放電保護回路設計方法及び静電放電保護回路設計プログラム |
| US20050077574A1 (en) * | 2003-10-08 | 2005-04-14 | Chandra Mouli | 1T/0C RAM cell with a wrapped-around gate device structure |
| JP3898715B2 (ja) * | 2004-09-09 | 2007-03-28 | 株式会社東芝 | 半導体装置およびその製造方法 |
| KR100592740B1 (ko) * | 2004-12-03 | 2006-06-26 | 한국전자통신연구원 | 쇼트키 장벽 관통 단전자 트랜지스터 및 그 제조방법 |
| US20060125041A1 (en) * | 2004-12-14 | 2006-06-15 | Electronics And Telecommunications Research Institute | Transistor using impact ionization and method of manufacturing the same |
| US7238555B2 (en) * | 2005-06-30 | 2007-07-03 | Freescale Semiconductor, Inc. | Single transistor memory cell with reduced programming voltages |
-
2006
- 2006-10-31 US US11/554,851 patent/US7608898B2/en active Active
-
2007
- 2007-08-30 JP JP2009534733A patent/JP5317353B2/ja active Active
- 2007-08-30 KR KR1020097009009A patent/KR101389293B1/ko active Active
- 2007-08-30 CN CN2007800383098A patent/CN101523557B/zh active Active
- 2007-08-30 WO PCT/US2007/077170 patent/WO2008054919A1/en not_active Ceased
- 2007-08-30 EP EP07841573A patent/EP2080217A4/en not_active Withdrawn
- 2007-09-11 TW TW096133902A patent/TWI441319B/zh active
-
2009
- 2009-09-11 US US12/558,284 patent/US8283244B2/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6353251B1 (en) * | 1997-11-28 | 2002-03-05 | Mitsuteru Kimura | MOS gate Schottky tunnel transistor and an integrated circuit using the same |
| US6044011A (en) * | 1998-05-08 | 2000-03-28 | Micron Technology, Inc. | Static-random-access-memory cell |
| CN1815742A (zh) * | 2004-12-15 | 2006-08-09 | 台湾积体电路制造股份有限公司 | 存储单元和形成一存储单元的方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101523557A (zh) | 2009-09-02 |
| WO2008054919A1 (en) | 2008-05-08 |
| US7608898B2 (en) | 2009-10-27 |
| US20080099808A1 (en) | 2008-05-01 |
| KR20090093938A (ko) | 2009-09-02 |
| EP2080217A1 (en) | 2009-07-22 |
| TWI441319B (zh) | 2014-06-11 |
| TW200834886A (en) | 2008-08-16 |
| JP2010508657A (ja) | 2010-03-18 |
| US8283244B2 (en) | 2012-10-09 |
| EP2080217A4 (en) | 2009-10-21 |
| KR101389293B1 (ko) | 2014-04-25 |
| US20100001326A1 (en) | 2010-01-07 |
| JP5317353B2 (ja) | 2013-10-16 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101523557B (zh) | 一个晶体管的dram单元结构及其形成方法 | |
| US12094526B2 (en) | Memory device comprising electrically floating body transistor | |
| US20240395323A1 (en) | Content Addressable Memory Device Having Electrically Floating Body Transistor | |
| US6888739B2 (en) | Nanocrystal write once read only memory for archival storage | |
| US7477540B2 (en) | Bipolar reading technique for a memory cell having an electrically floating body transistor | |
| JP2815495B2 (ja) | 半導体記憶装置 | |
| US20040130934A1 (en) | NROM memory cell, memory array, related devices and methods | |
| US20050057964A1 (en) | Memory with charge storage locations and adjacent gate structures | |
| US20060128104A1 (en) | NROM memory cell, memory array, related devices and methods | |
| KR100712089B1 (ko) | 반도체메모리장치 및 그 제조방법 | |
| US20040233694A1 (en) | Single bit nonvolatile memory cell and methods for programming and erasing thereof | |
| US7710759B2 (en) | Nonvolatile ferroelectric memory device | |
| US7583538B2 (en) | Semiconductor memory and read method of the same | |
| US20060109713A1 (en) | Memory Device | |
| JP4745276B2 (ja) | 半導体メモリ装置 | |
| JPH081947B2 (ja) | ダイナミツク・ランダム・アクセス・メモリ | |
| KR100892731B1 (ko) | 1-트랜지스터형 디램 구동 방법 | |
| KR20060076662A (ko) | 차지 트랩 인슐레이터 메모리 장치 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder |
Address after: Texas in the United States Patentee after: NXP America Co Ltd Address before: Texas in the United States Patentee before: Fisical Semiconductor Inc. |
|
| CP01 | Change in the name or title of a patent holder |