CN101499426A - 利用光可固化胶的芯片堆栈方法 - Google Patents

利用光可固化胶的芯片堆栈方法 Download PDF

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CN101499426A
CN101499426A CNA2008100087870A CN200810008787A CN101499426A CN 101499426 A CN101499426 A CN 101499426A CN A2008100087870 A CNA2008100087870 A CN A2008100087870A CN 200810008787 A CN200810008787 A CN 200810008787A CN 101499426 A CN101499426 A CN 101499426A
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叶崇茂
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Lingsheng Precision Industries Co Ltd
Lingsen Precision Industries Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32135Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/32145Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71

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Abstract

一种利用光可固化胶的芯片堆栈方法,包含下列各步骤:a)将一第一芯片设于一基板顶面,该第一芯片以打线方式电性连接该基板;b)于该第一芯片顶面形成一光可固化胶层,该光可固化胶层覆设该第一芯片顶面;c)利用曝光使该光可固化胶层固化,使该光可固化胶层由胶态转为固态,该光可固化胶层的固化程度为70至80%;d)对该光可固化胶层加热,致使该光可固化胶层软化而由固态转为半固态且具有黏性;加热温度范围为摄氏50至80度;e)将一第二芯片置于该光可固化胶层顶面,再对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态而完全固化;加热温度范围为摄氏100至150度;最后,该第二芯片以打线方式电性连接该基板。

Description

利用光可固化胶的芯片堆栈方法
技术领域
本发明与芯片堆栈制程有关,特别是有关于一种利用光可固化胶的芯片堆栈方法。
背景技术
如美国专利公告编号第5,323,060号专利「多芯片模块堆栈结构(Multichip module having a stacked chip arrangement)」,其揭示在相互堆栈且上下相邻的二芯片间由一模块做为间隔材,该些芯片之间会形成一容置空间;由此,多数电性连接芯片的金线能够于该容置空间内进行布设,由此,公知技术能够以上述方式以达到堆栈芯片的目的。
然而,由于此专利的模块必须依所需规格预先制备,以供进行堆栈芯片作业时使用;换言之,该些模块在制备后,其所能适用的尺寸规格就已经限定;如果需要对不同尺寸规格的芯片进行堆栈就需要准备不同尺寸规格的模块,具有适用性低的缺点。
综上所述,公知堆栈方法具有上述的缺失而有待改进。
发明内容
本发明的目的在于提供一种利用光可固化胶的芯片堆栈方法,其能够因应芯片的尺寸规格调节,具有适用性较高的特色。
为实现上述目的,本发明提供的利用光可固化胶的芯片堆栈方法,包含下列各步骤:
a)将一第一芯片设于一基板顶面,该第一芯片以打线方式电性连接该基板;
b)于该第一芯片顶面形成一光可固化胶层,该光可固化胶层覆设该第一芯片顶面;
c)利用曝光使该光可固化胶层固化,使该光可固化胶层由胶态转为固态,该光可固化胶层的固化程度为70%至80%;
d)对该光可固化胶层加热,致使该光可固化胶层软化而由固态转为半固态且具有黏性;加热温度范围为摄氏50度至80度;以及
e)将一第二芯片置于该光可固化胶层顶面,再对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态而完全固化;加热温度范围为摄氏100度至150度;最后,该第二芯片以打线方式电性连接该基板。
所述利用光可固化胶的芯片堆栈方法,其中,步骤a)所述该基板选自硬性印刷电路板、陶瓷基板以及导线架其中一种。
所述利用光可固化胶的芯片堆栈方法,其中,步骤d)所述对该光可固化胶层加热,致使该光可固化胶层由固态转为半固态,其较佳加热温度为摄氏75度。
所述利用光可固化胶的芯片堆栈方法,其中,步骤e)所述对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态,其较佳加热温度为摄氏120度。
由本发明提供的利用光可固化胶的芯片堆栈方法,能够因应该些芯片的尺寸以及布线需求调节该光可固化胶层的厚度以及面积大小,进而克服公知技术中需要预先制备模块以及模块需要因应尺寸规格的问题,具有适用性较高的特色。
附图说明
图1为本发明一较佳实施例的动作流程图。
图2为本发明一较佳实施例的加工示意图,主要揭示基板与第一芯片的结构。
图3为本发明一较佳实施例的加工示意图,主要揭示光可固化层的结构。
图4为本发明一较佳实施例的加工示意图,主要揭示光可固化层的进行曝光的状态。
图5为本发明一较佳实施例的加工示意图,主要揭示第二芯片的结构。
附图中主要组件符号说明:
第一芯片(10)
金线(12)
基板(20)
光可固化胶层(30)
第二芯片(40)
金线(42)
具体实施方式
本发明所提供的利用光可固化胶的芯片堆栈方法,包含下列各步骤:
a)将一第一芯片设于一基板顶面,该第一芯片以打线方式电性连接该基板;
b)于该第一芯片顶面形成一光可固化胶层,该光可固化胶层覆设该第一芯片顶面;
c)利用曝光使该光可固化胶层固化,使该光可固化胶层由胶态转为固态,该光可固化胶层的固化程度为70%至80%;
d)对该光可固化胶层加热,致使该光可固化胶层软化而由固态转为半固态且具有黏性;加热温度范围为摄氏50度至80度;
e)将一第二芯片置于该光可固化胶层顶面,再对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态而完全固化;加热温度范围为摄氏100度至150度;最后,该第二芯片以打线方式电性连接该基板。
为了详细说明本发明的特征及功效所在,举以下较佳实施例并配合附图说明如后。
请参阅图1至图5,为本发明一较佳实施例所提供的一种利用光可固化胶的芯片堆栈方法,其包含下列各步骤:
a)请参阅图2,首先,将一第一芯片(10)设于一基板(20)顶面,该第一芯片(10)经由打线方式以多数金线(12)电性连接该基板(20);其中,该基板(20)选自硬性印刷电路板、陶瓷基板以及导线架其中一种;本实施例中,该基板(20)是以陶瓷基板为例,在此仅为举例说明,并非作为限制要件;
b)请参阅图3,于该第一芯片(10)顶面形成一光可固化胶层(30),该光可固化胶层(30)覆设该第一芯片(10)顶面;
c)请参阅图4,利用曝光使该光可固化胶层(30)固化,使该光可固化胶层(30)由胶态转为固态,该光可固化胶层(30)的固化程度为70%至80%;本实施例中,该光可固化胶层(30)的固化程度是以75%为例,在此仅为举例说明,并非作为限制要件;
d)对该光可固化胶层(30)加热,致使该光可固化胶层(30)软化而由固态转为半固态且具有黏性;加热温度范围为摄氏50度至80度,加热温度较佳为摄氏75度;本实施例中,该光可固化胶层(30)的加热温度是以摄氏75度为例;
e)请参阅图5,将一第二芯片(40)置于该光可固化胶层(30)顶面,再对该光可固化胶层(30)加热,致使该光可固化胶层(30)由半固态转为固态而完全固化;加热温度范围为摄氏100度至150度,加热温度较佳的为摄氏120度;本实施例中,该光可固化胶层(30)的加热温度是以摄氏120度为例;最后,当该光可固化胶层(30)完全固化而固设该第二芯片(40),该第二芯片(40)再经由打线方式以多数金线(42)电性连接该基板(20);至此,即可达成堆栈该第一芯片(10)以及第二芯片(40)的目的。
由此,本发明利用光可固化胶的芯片堆栈方法透过上述步骤,其能够因应该第一芯片(10)以及该第二芯片(40)的尺寸以及布线需求调节该光可固化胶层(30)的厚度以及面积大小,进而克服公知技术中需要预先制备模块以及模块需要因应尺寸规格的问题,具有适用性较高的特色。
另外,若需要再堆栈一第三芯片(图中未示),只要对该第二芯片(40)再重复步骤b)到步骤e)的程序,即可达到堆栈三个芯片的目的。
本发明于前述实施例中所揭露的构成组件,仅为举例说明,并非用来限制本发明的范围,其它等效组件的替代或变化,亦应为本发明申请的权利要求范围所涵盖。

Claims (4)

1、一种利用光可固化胶的芯片堆栈方法,包含下列各步骤:
a)将一第一芯片设于一基板顶面,该第一芯片以打线方式电性连接该基板;
b)于该第一芯片顶面形成一光可固化胶层,该光可固化胶层覆设该第一芯片顶面;
c)利用曝光使该光可固化胶层固化,使该光可固化胶层由胶态转为固态,该光可固化胶层的固化程度为70%至80%;
d)对该光可固化胶层加热,致使该光可固化胶层软化而由固态转为半固态且具有黏性;加热温度范围为摄氏50度至80度;以及
e)将一第二芯片置于该光可固化胶层顶面,再对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态而完全固化;加热温度范围为摄氏100度至150度;最后,该第二芯片以打线方式电性连接该基板。
2、依据权利要求1所述利用光可固化胶的芯片堆栈方法,其中,步骤a)所述该基板选自硬性印刷电路板、陶瓷基板以及导线架其中一种。
3、依据权利要求1所述利用光可固化胶的芯片堆栈方法,其中,步骤d)所述对该光可固化胶层加热,致使该光可固化胶层由固态转为半固态,其加热温度为摄氏75度。
4、依据权利要求1所述利用光可固化胶的芯片堆栈方法,其中,步骤e)所述对该光可固化胶层加热,致使该光可固化胶层由半固态转为固态,其加热温度为摄氏120度。
CNA2008100087870A 2008-01-29 2008-01-29 利用光可固化胶的芯片堆栈方法 Pending CN101499426A (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017215651A1 (zh) * 2016-06-16 2017-12-21 宁波舜宇光电信息有限公司 感光组件和摄像模组及其制造方法
CN108962009A (zh) * 2018-07-03 2018-12-07 张家港康得新光电材料有限公司 一种显示设备及其贴合方法和贴合设备

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017215651A1 (zh) * 2016-06-16 2017-12-21 宁波舜宇光电信息有限公司 感光组件和摄像模组及其制造方法
CN108962009A (zh) * 2018-07-03 2018-12-07 张家港康得新光电材料有限公司 一种显示设备及其贴合方法和贴合设备

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