CN101473488A - 用于多频带射频耦合的pin二极管网络 - Google Patents

用于多频带射频耦合的pin二极管网络 Download PDF

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CN101473488A
CN101473488A CN200780023325.XA CN200780023325A CN101473488A CN 101473488 A CN101473488 A CN 101473488A CN 200780023325 A CN200780023325 A CN 200780023325A CN 101473488 A CN101473488 A CN 101473488A
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pin diode
inductor
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parasitic capacitance
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CN101473488B (zh
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维多·夏顿
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AireSpider Networks Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P1/00—Auxiliary devices
    • H01P1/10—Auxiliary devices for switching or interrupting
    • H01P1/15—Auxiliary devices for switching or interrupting by semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H5/00—One-port networks comprising only passive electrical elements as network components
    • H03H5/12—One-port networks comprising only passive electrical elements as network components with at least one voltage- or current-dependent element
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/74—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of diodes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H7/00—Multiple-port networks comprising only passive electrical elements as network components
    • H03H7/24—Frequency- independent attenuators
    • H03H7/25—Frequency- independent attenuators comprising an element controlled by an electric or magnetic variable

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Abstract

一种PIN二极管网络，其包括与电感器(L1220；L2230)并联的PIN二极管(250)。在PIN二极管的截止状态下，该电感器(L1220；L2230)与PIN二极管(250)基于该PIN二极管的寄生电容构成谐振电路。因此，在工作频率，与单独的PIN二极管相比改善了针对PIN二极管的隔离。

Description

用于多频带射频耦合的PIN二极管网络
技术领域
本发明总体上涉及射频(RF)网络，更具体地，涉及用于多频带RF耦合的PIN二极管网络。
背景技术
PIN二极管通常用于RF开关。PIN二极管是具有被本征区所分离的重掺杂的p型区和n型区的半导体器件。当被正向偏置或“导通”时，PIN二极管表现为可变电阻器。当PIN二极管被零偏置或反向偏置(截止)时，该PIN二极管表现为具有基本上独立于偏置电压的“寄生”电容的平行板电容器。
PIN二极管在各种波形因子和性能属性下是可用的。通常，驱动PIN二极管的成本的一个性能属性是寄生电容。在给定的工作频率下，具有相对较低的寄生电容的PIN二极管典型地比具有较高寄生电容的PIN二极管更为昂贵。
在RF开关应用中对PIN二极管的限制是由于PIN二极管在零偏压或反向偏压下的寄生电容而导致的隔离降低。
发明内容
一种PIN二极管网络，其包括输入端口、输出端口、PIN二极管、第一电感器以及第二电感器。所述PIN二极管被配置成通过向该PIN二极管施加正向偏压而将输入端口选择性地耦合到输出端口。PIN二极管在所述正向偏压被去除时的截止状态下具有寄生电容。所述第一电感器与PIN二极管相并联，并被配置成当所述PIN二极管处于截止状态时在PIN二极管网络的第一工作频率下与PIN二极管的寄生电容一起进行自谐振。所述第二电感器与PIN二极管相并联，并被配置成当所述PIN二极管处于截止状态时在PIN二极管网络的第二工作频率下与PIN二极管的寄生电容一起进行自谐振。
与输入端口和输出端口之间的单独的PIN二极管的隔离相比，所述PIN二极管网络在所述第一工作频率下可以具有输入端口与输出端口之间的改善的隔离。与所述PIN二极管相并联的第一电感器可以被配置成在所述第一工作频率下构成等效谐振电路。
一方面，一种方法包括将第一频率和第二频率接收到输入端口中，所述输入端口经由PIN二极管而选择性地耦合到输出端口。如果所述PIN二极管被正向偏置，则所述方法包括将第一频率和第二频率耦合到输出端口，在另外的情况下，所述方法包括通过第一电感器与所述PIN二极管的寄生电容的自谐振来阻隔(block)所述第一频率，并通过第二电感器与所述PIN二极管的寄生电容的自谐振来阻隔所述第二频率。通过自谐振阻隔所述第一频率可以包括由第一电感器和PIN二极管构成等效谐振电路。
附图说明
现在将参照表示本发明的优选实施例的图示来描述本发明。在所述图示中，相似的元件具有相同的附图标记。所示出的实施例旨在举例说明而非限定本发明。所述图示包括以下图示：
图1A示出了根据本发明的一个实施例中的、用于改善PIN二极管的隔离的简化电路结构；
图1B示出了根据本发明的一个实施例中的、当所述PIN二极管截止(被零偏置或反向偏置)时图1A的简化电路结构的等效电路；
图2示出了根据本发明的一个实施例中的、用于多频带耦合网络的印制电路板(PCB)上的部分布局；以及
图3示出了根据本发明的一个实施例中的、图2的多频带耦合网络的工作方法。
具体实施方式
图1A示出了根据本发明的一个实施例中的、用于改善PIN二极管100的隔离的简化电路结构。通常，电感器L110被放置成与PIN二极管100相并联，并被选择以使得电感器L110增加PIN二极管100的寄生电容，如在此进一步描述的。图1B示出了根据本发明的一个实施例中的、当所述PIN二极管100截止(即，被零偏置或反向偏置)时图1A的简化电路结构的等效电路。电感器L110具有等效的寄生电容CL。PIN二极管100在其截止时具有寄生电容CSTRAY。
与电容器CL和CSTRAY相并联的电感器L110构成了谐振电路。选择并联电感器L110的寄生电容CL，以使其与PIN二极管100的寄生电容CSTRAY相并联时，所述等效谐振电路的自谐振频率(SRF)处于PIN二极管100的期望工作频率处。针对包括并联电感器L110和PIN二极管100的理想谐振电路的SRF可以计算为：
f = 1 2 π L ( C L + C STRAY )
在所述SRF下，所述等效谐振电路的阻抗基本上是无穷大的。因此，在所述SRF下，电感器L110的电感和寄生电容抵消了在另外的情况下将降低PIN二极管100的隔离的、PIN二极管100的寄生电容。通过使电感器L110与PIN二极管100相并联所得到的等效谐振电路的自谐振实质上使PIN二极管100以更理想的方式工作。
例如，在一个实施例中，PIN二极管100在约2.4至2.4835GHz的频率范围下工作。PIN二极管100在处于截止状态时具有约0.17pF的寄生电容。在电感器L110的电感值为25nH的情况下，所述等效电路的SRF约为2.44GHz。因此，在2.44GHz下且所述PIN二极管100被偏置截止时，所述等效谐振电路的阻抗基本上是无穷大的，从而利用所述PIN二极管100产生了改善的隔离。
图2示出了根据本发明的一个实施例中的、用于多频带耦合网络200的印制电路板(PCB)上的部分布局。多频带耦合网络200包括：与第二电感器L2230和(比如10μF的)隔直电容器240相串联的第一电感器L1220，其焊接到在输入端口210与输出端口260之间的对应的焊接垫205。与电感器L1 220、L2 230和电容器240相并联的PIN二极管250被焊接到对应的焊接垫205。向输出端口260施加的SELECT信号(例如，DC偏置电压)用于接通/关断PIN二极管250。
如同上文参照图1所描述的，选择电感器L1 220，以使与PIN二极管250的寄生电容相并联的电感器L1 220及其寄生电容产生用于“低频带”RF的SRF，例如在约2.4至2.4835GHz的范围之内。选择电感器L2230，以使与PIN二极管250的寄生电容相并联的电感器L2 230及其寄生电容产生用于“高频带”RF的SRF，例如在约4.9至5.835GHz的范围内。隔直电容器240具有这样大的值：该值对用于低频带的SRF和用于高频带的SRF的影响可以忽略。
当所述SELECT信号相对于输入端口210偏低时，PIN二极管250被正向偏置或接通，并且输入端口210被耦合到输出端口260。实质上，PIN二极管250跨越电感器L1 220、L2 230和电容器240而短路，以使这些与PIN二极管250相并联的元件的影响可以忽略。
但是，在SELECT信号浮动或偏高的情况下，PIN二极管250被零偏置或反向偏置(截止)。对于在输入端口210处的低频带RF，与PIN二极管250的寄生电容相并联的电感器L1 220构成了在所述低频带处调谐的“带阻滤波器”或陷波滤波器。因此，通过高阻抗将输入端口210处的低频带RF与输出端口260相隔离。类似地，对于在输入端口210处的高频带RF，与PIN二极管250的寄生电容相并联的电感器L2 230构成了在所述高频带处调谐的带阻滤波器或陷波滤波器，通过高阻抗将输入端口210处的高频带RF与输出端口260相隔离。
图3示出了根据本发明的一个实施例中的、图2的多频带耦合网络200的工作方法300。在步骤305处，输入端口210接收低频带RF和/或高频带RF。在步骤320处，如果PIN二极管250在步骤310处导通，则PIN二极管250跨越电感器L1 220、L2 230和电容器240而短路，并将输入端口210耦合到输出端口260。替代性地，如果PIN二极管250在步骤310处截止，则在步骤330处，电感器L1 220与PIN二极管250的寄生电容进行自谐振，以构成阻止低频带RF传播到输出端口260的带阻滤波器。此外，对于高频带RF，在步骤340处，电感器L2 230与PIN二极管250的寄生电容进行自谐振，以构成阻止高频带RF传播到输出端口260的带阻滤波器。
因此，图2的多频带耦合网络200的优点在于，由于用与PIN二极管250的寄生电容相并联的电感器L1 220和L2 230构成了等效谐振电路(带阻滤波器或陷波滤波器)，因此改善了针对低频带和高频带的、输入端口210与输出端口260之间的隔离。这产生了针对给定PIN二极管250的更高的隔离。换言之，具有相对高的寄生电容和固有的差的隔离的相对便宜的PIN二极管250可以在多频带耦合网络200中使用，并且所述等效谐振电路改善了PIN二极管250在低频带和高频带时的隔离。
多频带耦合网络200的另外的优点在于，对于给定的PIN二极管250，多频带耦合网络200可以在较高的频率下使用。例如，目前PIN二极管由于其寄生电容而通常不用于10GHz。替代性地，在这种高频率下需要昂贵的高质量PIN二极管。通过考虑在PIN二极管的期望工作频率下将PIN二极管的寄生电容随并联电感器一起调谐以形成带阻滤波器或陷波滤波器(或者用于多频带的串联带阻滤波器)，所述多频带耦合网络200允许在比通常可能的频率更高的频率下将PIN二极管用在开关网络中。此外，电感器L1 220、L2 230和电容器240是惊人地便宜的部件，其与较高性能的PIN二极管250相比要便宜得多。
尽管在图2中示出为成一直线，但是电感器L1 220、L2 230和电容器240不需要径直地成一直线。在一些实施例中，例如在与PIN二极管250相并联的元件实际上不是PIN二极管250的大小的约1/3时，电感器L1 220、L2 230和电容器240被按照三角形方位布置，以近似地匹配于PIN二极管250的实际大小。这种方位避免了在多频带耦合网络200的工作频率下产生“残余”(“stub”)。
在此已经根据若干优选实施例描述了本发明。根据对本说明书的考虑、对附图的研究和对本发明的实践，包括在此描述的实施例的替换、修改、置换和等效内容的、本发明的其它实施例对于本领域的技术人员而言是显然的。上述的实施例和优选特征应当被认为是示例性的，并且本发明是由所附的权利要求所限定的，因此本发明包括落入本发明的真实精神和范围之内的所有这种替换、修改、置换和等效内容。

Claims (18)

1.一种PIN二极管网络，包括
输入端口；
输出端口；
PIN二极管，被配置成通过向所述PIN二极管施加正向偏压而将所述输入端口选择性地耦合到所述输出端口，所述PIN二极管在所述正向偏压被去除时的截止状态下具有寄生电容；
与所述PIN二极管并联的第一电感器，所述第一电感器被配置成当所述PIN二极管处于截止状态时在所述PIN二极管网络的第一工作频率下与所述PIN二极管的寄生电容一起进行自谐振；以及
与所述PIN二极管并联的第二电感器，所述第二电感器被配置成当所述PIN二极管处于截止状态时在所述PIN二极管网络的第二工作频率下与所述PIN二极管的寄生电容一起进行自谐振。
2.根据权利要求1所述的PIN二极管网络，其中与所述输入端口和所述输出端口之间的单独的PIN二极管的隔离相比，所述PIN二极管网络在所述第一工作频率下具有所述输入端口与所述输出端口之间的改善的隔离。
3.根据权利要求1所述的PIN二极管网络，其中所述第一工作频率处于约2.4至2.4835GHz的范围之内。
4.根据权利要求1所述的PIN二极管网络，其中所述第二工作频率处于约4.9至5.835GHz的范围之内。
5.根据权利要求1所述的PIN二极管网络，其中所述PIN二极管网络的第一工作频率是基于以下等式来确定的：
f = 1 2 π L ( C L + C STRAY ) ,
其中L是电感器的值，CL是所述电感器的寄生电容，CSTRAY是所述PIN二极管的寄生电容。
6.根据权利要求1所述的PIN二极管网络，其中所述第一电感器与所述第二电感器相串联。
7.根据权利要求1所述的PIN二极管网络，其中与所述PIN二极管相并联的所述第一电感器被配置成在所述第一工作频率下构成等效谐振电路。
8.根据权利要求1所述的PIN二极管网络，其中与所述PIN二极管相并联的所述第一电感器被配置成在所述第一工作频率下构成带阻滤波器。
9.一种方法，包括：
将第一频率和第二频率接收到输入端口中，所述输入端口通过PIN二极管选择性地耦合到输出端口；
如果所述PIN二极管被正向偏置，则将所述第一频率和所述第二频率耦合到所述输出端口；
否则，通过第一电感器与所述PIN二极管的寄生电容的自谐振来阻隔所述第一频率，并通过第二电感器与所述PIN二极管的寄生电容的自谐振来阻隔所述第二频率。
10.根据权利要求9所述的方法，其中所述第一电感器与所述PIN二极管相并联。
11.根据权利要求9所述的方法，其中所述第一电感器与所述第二电感器相串联，所述第一电感器和所述第二电感器与所述PIN二极管相并联。
12.根据权利要求9所述的方法，其中所述第一频率是基于以下等式来确定的：
f = 1 2 π L ( C L + C STRAY ) ,
其中L是所述第一电感器的电感值，CL是所述第一电感器的寄生电容，CSTRAY是所述PIN二极管的寄生电容。
13.根据权利要求9所述的方法，其中通过自谐振阻隔所述第一频率包括由所述第一电感器和所述PIN二极管构成等效谐振电路。
14.一种用于多频带射频耦合的系统，包括：
用于接收第一频率和第二频率的输入端口；
输出端口；以及
用于选择性地将第一频率和第二频率与所述输出端口相隔离的装置。
15.根据权利要求14所述的用于多频带射频耦合的系统，其中所述用于选择性地隔离的装置包括与用于隔离所述第二频率的第二装置相串联的、用于隔离所述第一频率的第一装置。
16.根据权利要求14所述的用于多频带射频耦合的系统，其中用于隔离所述第一频率的所述第一装置包括与PIN二极管相并联的电感器，所述电感器和所述PIN二极管被配置成当所述PIN二极管处于截止状态时在所述第一频率下进行谐振。
17.根据权利要求14所述的用于多频带射频耦合的系统，其中用于隔离所述第一频率的所述第一装置包括第一电感器，用于隔离第二频率的所述第二装置包括第二电感器，所述第一电感器和第二电感器相串联，所述第一电感器和第二电感器与所述PIN二极管相并联，所述第一电感器和所述PIN二极管被配置成当所述PIN二极管处于截止状态时在所述第一频率下进行谐振，所述第二电感器和所述PIN二极管被配置成当所述PIN二极管处于截止状态时在所述第二频率下进行谐振。
18.根据权利要求14所述的用于多频带射频耦合的系统，其中所述用于选择性地隔离所述第一频率和所述第二频率的装置包括在所述输入端口与所述输出端口之间的PIN二极管，此外其中所述用于选择性地隔离的装置的隔离大于所述输入端口与所述输出端口之间的单独的PIN二极管的隔离。
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