CN101431172A - Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method - Google Patents

Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method Download PDF

Info

Publication number
CN101431172A
CN101431172A CN 200810041122 CN200810041122A CN101431172A CN 101431172 A CN101431172 A CN 101431172A CN 200810041122 CN200810041122 CN 200810041122 CN 200810041122 A CN200810041122 A CN 200810041122A CN 101431172 A CN101431172 A CN 101431172A
Authority
CN
China
Prior art keywords
bridge pier
bridge
film
bias
silicon chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN 200810041122
Other languages
Chinese (zh)
Other versions
CN101431172B (en
Inventor
欧阳炜霞
郭兴龙
赖宗声
张永华
王超
刘蕾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
East China Normal University
Original Assignee
East China Normal University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by East China Normal University filed Critical East China Normal University
Priority to CN 200810041122 priority Critical patent/CN101431172B/en
Publication of CN101431172A publication Critical patent/CN101431172A/en
Application granted granted Critical
Publication of CN101431172B publication Critical patent/CN101431172B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The invention relates to a reconfigurable microwave low-pass filter containing an MEMS switch and the preparation thereof. The filter is an integrated circuit which is produced on a substrate of a high-resistance silicon wafer, an inductive reactance element is composed of a CPW ground wire and a signal wire; on one hand, the MEMS switch constitutes a capacitive reactance element, on the other hand, the MEMS switch leads the frequency of the filter to be adjustable by changing the length of the coplanar waveguide by the switching-on and off. The filter takes the high-resistance silicon wafer as the substrate, uses the process which is compatible with the IC process to evaporate a titanium layer and a gold layer by thermal oxidation, carry out the positive photoresist lithography, the electroplating and the negative photoresist lithography, corrode the gold layer and the titanium layer, remove a negative photoresist, lead a silicon nitride film to grow, remove the silicon nitride film, evaporate and deposit an aluminum-silicon alloy film, corrode the aluminum-silicon alloy film to form a bridge film, remove a sacrificial layer, and the like, for the preparation, and the filter has the advantages of compact and simple structure, small size, good isolation, low insertion loss, low power consumption of a control circuit, high working frequency, compatibility with the traditional IC process and low cost, and is applicable to mass production.

Description

A kind of reconfigurable microwave low-pass filter and preparation thereof that contains mems switch
Technical field
The present invention relates to the reconfigurable microwave low-pass filter and the preparation thereof of a kind of MEMS of containing (microelectron-mechanical) switch, belong to micro mechanical system and microwave crossed technical.
Background technology
Reconfigurable microwave low-pass filter is one of critical elements in the microwave wireless communication system.Size, the strong signal of inhibition that it can significantly reduce multiwave simulation receiving front-end subsystem disturb and the conversion of realization multiband, especially more can embody its high-performance quality in millimere-wave band.
Traditional reconfigurable microwave low-pass filter is based on coaxial line or microstrip line, be produced on the printed circuit board (PCB) (PCB), volume is big, be unfavorable for IC technology integrated, traditional in addition reconfigurable microwave low-pass filter generally uses pin diode switch and FET switch to realize the adjustable of filter frequencies, and these switches need a large amount of biasing circuits, make that the insertion loss of filter is big, size is big, is not suitable for the application of Miniature RF receiver front end.
Summary of the invention
Mems switch has that volume is little, isolation good, insert that loss is low, control circuit is low in energy consumption, working band is wide and the integrated advantage of available IC technology, be particularly suitable for being used for replacing pin diode switch or FET switch to realize the reconstruct of microwave low-pass filter frequency, reduce the volume of filter significantly, whole filter can be integrated on the Si base substrate with IC technology.
First technical problem that the present invention will solve is to release a kind of reconfigurable microwave low-pass filter that contains mems switch.
For solving above-mentioned technical problem, the present invention adopts following technical scheme.Reconfigurable microwave low-pass filter of the present invention is the integrated circuit that is produced on the substrate of high resistant silicon chip, CPW co-planar waveguide ground wire and holding wire constitute the inductive reactive element of low pass filter, MEMS film bridge and bias line constitute mems switch, it provides capacitive reactive element for low pass filter on the one hand, change the length of co-planar waveguide on the other hand by the break-make of mems switch, make the frequency adjustable of filter, thereby reach the reconstruct purpose of filter.
Now describe technical scheme of the present invention in conjunction with the accompanying drawings in detail.Described low pass filter contains three inputs, three outputs, five MEMS film bridges, four bias pad, two ground wires, six bias lines, nine holding wires and ten bridge piers, three inputs are respectively first input end 10, second input 11 and the 3rd input 12, three outputs are respectively first output 20, second output 21 and the 3rd output 22, five MEMS film bridges are respectively a MEMS film bridge 30, the 2nd MEMS film bridge 31, the 3rd MEMS film bridge 32, the 4th MEMS film bridge 33 and the 5th MEMS film bridge 34, four bias pad are respectively first bias pad 40, second bias pad 41, the 3rd bias pad 42 and the 4th bias pad 43, two ground wires are respectively first ground wire 50 and second ground wire 51, six bias lines are respectively first bias line 60, second bias line 61, the 3rd bias line 62, the 4th bias line 63, the 5th bias line 64 and the 6th bias line 65, nine holding wires are respectively first holding wire 70, secondary signal line 71, the 3rd holding wire 72, the 4th holding wire 73, the 5th holding wire 74, the 6th holding wire 75, the 7th holding wire 76, the 8th holding wire 77 and the 9th holding wire 78, ten bridge piers are respectively first bridge pier 80, second bridge pier 81, the 3rd bridge pier 82, the 4th bridge pier 83, the 5th bridge pier 84, the 6th bridge pier 85, the 7th bridge pier 86, the 8th bridge pier 87, the 9th bridge pier 88 and the tenth bridge pier 89, it is characterized in that, nine parallel cloth of holding wire are listed between first ground wire 50 and second ground wire 51, first bridge pier 80, second bridge pier 81, the 3rd bridge pier 82, the 4th bridge pier 83, the 5th bridge pier 84 is sequentially arranged in the outside of first ground wire 50, first bias line 60, second bias line 61, first bias pad 40 and the 6th bias line 65 are distributed in first bridge pier 80, second bridge pier 81, the 3rd bridge pier 82, the outside of the 4th bridge pier 83 and the 5th bridge pier 84, the 6th bridge pier 85, the 7th bridge pier 86, the 8th bridge pier 87, the 9th bridge pier 88, the tenth bridge pier 89 is sequentially arranged in the outside of second ground wire 51, the 3rd bias line 62, the 4th bias line 63 the 5th bias line 64, second bias pad 41, the 3rd bias pad 42 and the 4th bias pad 43 are distributed in the 6th bridge pier 85, the 7th bridge pier 86, the 8th bridge pier 87, the 9th bridge pier 88, the outside of the tenth bridge pier 89, first bridge pier 80, second bridge pier 81, the 3rd bridge pier 82, the 4th bridge pier 83 and the 5th bridge pier 84 respectively with the 6th bridge pier 85, the 7th bridge pier 86, the 8th bridge pier 87, the 9th bridge pier 88, it is right that the tenth bridge pier 89 is formed five bridge piers, first input end 10 is connected with right-hand member with the left end of first ground wire 50 respectively with first output 20, the 3rd input 12 is connected with right-hand member with the left end of second ground wire 51 respectively with the 3rd output 22, second input 11 and first holding wire 70, the 5th holding wire 74 is connected with the 6th holding wire 75, second output 21 and the 4th holding wire 73, the 5th holding wire 74 is connected with the 9th holding wire 78, first bias line 60 is connected across between first bridge pier 80 and first bias pad 40, the 6th bias line 65 is connected across between first bias pad 40 and the 5th bridge pier 84, second bias line 61 is connected across between second bridge pier 81 and the 4th bridge pier 83, the 3rd bias line 62 is connected across between the 7th bridge pier 86 and second bias pad 41, the 4th bias line 63 is connected across between the 8th bridge pier 87 and the 3rd bias pad 42, the 5th bias line 64 is connected across between the 9th bridge pier 88 and the 4th bias pad 43, the one MEMS bridge film 30 is connected across between first bridge pier 80 and the 6th bridge pier 85, the 2nd MEMS bridge film 31 is connected across between second bridge pier 81 and the 7th bridge pier 86, the 3rd MEMS bridge film 32 is connected across between the 3rd bridge pier 82 and the 8th bridge pier 87, the 4th MEMS bridge film 33 is connected across between the 4th bridge pier 83 and the 9th bridge pier 88, and the 5th MEMS bridge film 34 is connected across between the 5th bridge pier 84 and the tenth bridge pier 89.
Second technical problem that the present invention will solve provides the preparation method of this filter.For solving above-mentioned technical problem, the present invention adopts following technical scheme.This filter is a substrate with the high resistant silicon chip, uses the technology with the IC process compatible, passes through cleaning silicon chip, thermal oxidation, evaporation titanium layer and gold layer, positive mask plate of glue photoetching, plating, positive two, No. three mask plates of glue photoetching, plating, negative glue photoetching, acid gilding layer, titanium layer, remove negative glue, the grown silicon nitride film, positive No. four mask plates of glue photoetching, removal silicon nitride film, positive No. five mask plates of glue photoetching, evaporation deposition alusil alloy film, corrosion alusil alloy film forms the bridge film and removes the sacrifice layer process step and makes.
Now describe technical scheme of the present invention in detail.
A kind of preparation method who contains the reconfigurable microwave low-pass filter of mems switch is characterized in that, this method and IC process compatible adopt six mask plates, the concrete operations step altogether:
First step cleaning silicon chip
The high resistant silicon chip that thickness and diameter is respectively 550 μ m and two inches places H 2O 2H 2SO 4The mixed liquor of=1:1 boils to boiling over-emitting black exhaust, washed with de-ionized water, then silicon chip is put into a cleaning fluid and boil to boiling, washed with de-ionized water is put into No. two cleaning fluids to silicon chip at last and is boiled to boiling, deionized water rinsing, drying, oven dry, the prescription of a cleaning fluid are 27%NH 4OH:30%H 2O 2: deionized water=1:2:5, the prescription of No. two cleaning fluids are 37% HCL:30%H 2O 2: deionized water=1:2:8;
The second step thermal oxidation
Is the silicon dioxide layer of 1 μ m with thermal oxidation method at the superficial growth thickness of high resistant silicon chip, feeds dried oxygen in 10 minutes, fed wet oxygen in 100 minutes, adds 10 minutes again and feed dried oxygen;
The 3rd step evaporation titanium layer and gold layer
Hydatogenesis titanium layer and gold layer successively on the silicon dioxide layer of the high resistant silicon chip of handling through second step, thickness is respectively 1000
Figure A200810041122D0009145755QIETU
With 3000
Figure A200810041122D0009145755QIETU
, temperature and vacuum degree in the vapourizing furnace are respectively 250 ℃ and 10 * 10 -5Torr;
Mask plate of the 4th positive glue photoetching of step, plating
The high resistant silicon chip of handling through the 3rd step is implemented mask plate technology of positive glue photoetching, under 1800 rev/mins the rotating speed, positive glue is covered on the high resistant silicon chip, by a mask plate the positive glue on the high resistant silicon chip is carried out photoetching, reserve the figure that needs plating, electrogilding layer, thickness are 2 μ m, form three inputs, three outputs, ten bridge piers and four bias pad, remove photoresist;
Two, No. three mask plates of the 5th positive glue photoetching of step are electroplated
With with the 4th the step identical positive glue photoetching method, by No. two mask plates and No. three mask plates the positive glue on the high resistant silicon chip is carried out photoetching successively, positive No. two mask plates of glue photoetching, electrogilding layer, thickness are 2 μ m, form two ground wires, nine holding wires, six roots of sensation bias line, positive No. three mask plates of glue photoetching, the electrogilding layer makes the thickness of three inputs, three outputs, four bias pad and ten bridge piers increase to 4 μ m by 2 original μ m, removes photoresist;
The negative glue photoetching of the 6th step, acid gilding layer, titanium layer
Negative No. two mask of glue photoetching, be placed in 130 ℃ the baking oven post bake after the development 30 minutes, plasma etching is 20 seconds then, successively gold layer, the titanium layer of not electroplating part are eroded at normal temperatures at last, keep three inputs, three outputs, two ground wires, nine holding wires, four bias pad, six roots of sensation bias line and ten bridge piers, the prescription of the solution of acid gilding is KI:I 2: H 2O=20g:6g:100ml, the prescription of the solution of corrosion titanium is K2[Fe (CN) 6]: KOH:H 2O=30g:5g:100ml;
The 7th step was removed negative glue
Adopt the oxygen gas plasma etching to remove negative glue on the high resistant silicon chip of handling through the 6th step, etching power, oxygen flow, etch period are respectively 50W, 60ml/min and 20 seconds;
The 8th one-step growth silicon nitride film
With the surface deposition one deck silicon nitride film of chemical vapor deposition at the high resistant silicon chip of handling through the 7th step, thickness is 0.3 μ m, and ammonia flow, silane flow rate and temperature are respectively 24ml/min, 560ml/min and 280 ℃;
No. four mask plates of the 9th positive glue photoetching of step, removal silicon nitride film
The high resistant silicon chip of handling through the 8th step is implemented No. four mask plate technologies of positive glue photoetching, cover the figure on the mask plate No. four with positive glue, the silicon nitride film that protection need keep is used SF 6Gaseous plasma etch silicon nitride film, etching power, SF 6The flow of gas and etch period are respectively 50w, 2.4ml/s and 1 minute and 50 seconds;
No. five mask plates of the tenth positive glue photoetching of step
Under 2000 rev/mins the rotating speed, spin coating one layer thickness is that the polyimide film of 2 μ m is as sacrifice layer on the surface of the high resistant silicon chip of handling through the 9th step, 90 ℃ were dried by the fire one hour down, dry by the fire half an hour down at 130 ℃ again, the thick positive glue of spin coating 2 μ m on sacrifice layer, by No. 5 mask plate photoetching, positive glue is removed in the back of developing, obtain the sacrifice layer figure, then the high resistant silicon chip is placed 200 ℃ to solidify 1 hour down;
The tenth step evaporation deposit alusil alloy film
5 * 10 -5Under the vacuum degree of Torr, evaporation deposition alusil alloy film on the high resistant silicon chip of handling through the tenth step, the siliceous and thickness of this alusil alloy film is respectively 4% and 0.5 μ m;
The 12 step corrosion alusil alloy film forms the bridge film
The high resistant silicon chip of handling through the 11 step is implemented negative No. six mask plate technologies of glue photoetching, at 70 ℃ of H that down this high resistant silicon chip are placed on concentration 〉=85% 3PO 4In the solution, the bubble that corrosion alusil alloy film is emerged to the phosphoric acid solution is very faint, forms the bridge film, with this high resistant silicon chip of washed with de-ionized water;
The 13 step was removed sacrifice layer
Plasma etching is removed negative glue and the sacrifice layer on the high resistant silicon chip of handling through the 12 step, plasma etching power, oxygen flow and nitrogen flow are respectively 50w, 60ml/s and 2.8ml/s, obtain five unsettled bridge films, this bridge film is exactly the mems switch movable contact flat.
Compare with background technology, the present invention has following advantage:
1, this filter is by the mems switch and the coplanar waveguide transmission line be combined into that are deposited on the silicon chip, the former substitutes the frequency reconstruct that traditional switching devices such as PIN switching diode, variable capacitance diode or FET are realized filter, the latter has substituted the coplanar waveguide transmission line on traditional pcb board, has that compact conformation is simple, size is small, isolation is good, inserts the advantage that loss is low, control circuit is low in energy consumption, operating frequency is high.
2, this filter can with traditional IC process compatible, be integrated on the substrate of High Resistivity Si, technical maturity, with low cost, be suitable for producing in batches.
Description of drawings
Fig. 1 is the structural representation of reconfigurable microwave low-pass filter of the present invention.
Fig. 2 is the schematic diagram of a mask plate figure.
Fig. 3 is the schematic diagram of No. two mask plate figures.
Fig. 4 is the schematic diagram of No. three mask plate figures.
Fig. 5 is the schematic diagram of No. four mask plate figures.
Fig. 6 is the schematic diagram of No. five mask plate figures.
Fig. 7 is the schematic diagram of No. six mask plate figures.
Fig. 8 is the S parameter before the reconfigurable microwave low-pass filter reconstruct.
Fig. 9 is the S parameter after the reconfigurable microwave low-pass filter reconstruct.
Figure 10 is the structure of the reconfigurable microwave low-pass filter before the reconstruct.
Figure 11 is the equivalent electric circuit of the reconfigurable microwave low-pass filter before the reconstruct.
Figure 12 is the structure of the reconfigurable microwave low-pass filter after the reconstruct.
Figure 13 is the equivalent electric circuit of the reconfigurable microwave low-pass filter after the reconstruct.
Embodiment
Now specifically describe technical scheme of the present invention in conjunction with the accompanying drawings and embodiments.
Embodiment 1
The related low pass filter of present embodiment has and the identical structure of " summary of the invention " described low pass filter, just repeats no more here.The forward and backward 3dB cut-off frequency of this filter reconstruct is respectively 21GHz and 12GHz.
The operation principle of present embodiment.
This restructural low pass filter cuts out and opens the function that obtains reconstruct by five mems switches, as shown in Figure 1, before the reconstruct, 30V voltage one end is added on first ground wire 50 and second ground wire 51, the other end is added on first bias pad 40 and the 3rd bias pad 42, so because electrostatic interaction the one MEMS film bridge 30, the 3rd MEMS film bridge 32 and the 5th MEMS film bridge 34 closures, the 2nd MEMS film bridge 31 and the 4th MEMS film bridge 33 are opened, ignore the ghost effect of opening mems switch, structure chart such as Figure 10 of this moment, be equivalent to the low pass filter series connection of two junior units, its equivalent circuit diagram such as Figure 11, L1 is first holding wire 70, secondary signal line 71, the 5th holding wire 74, the 6th holding wire 75, the equivalent inductance of the 7th holding wire 76, L2 is the 3rd holding wire 72, the 4th holding wire 73, the 5th holding wire 74, the 8th holding wire 77 and the 9th holding wire 78 equivalent inductances, C1, C2, C3 is respectively a MEMS film bridge 30, the 3rd MEMS film bridge 32, the 5th MEMS film bridge 34.
After the reconstruct, 35V voltage one end is added on first ground wire 50 and second ground wire 51, and the other end is added on second bias pad 41 and the 4th bias pad 43.This moment, the 2nd MEMS film bridge 31 and the 4th MEMS film bridge 33 were owing to be subjected to the effect closure of electrostatic force, connect first holding wire 70 simultaneously, the 3rd holding wire 72, the 6th holding wire 75 and the 8th holding wire 77 respectively with secondary signal line 71, the 4th holding wire 73, the 7th signal 76 is connected with the 9th holding wire 78,30V voltage one end is added on first ground wire 50 and second ground wire 51, the other end is added on first bias pad 40, the one MEMS film bridge 30 and five MEMS film bridges, 34 closures, the 3rd MEMS film bridge 32 is not because of being opened by static, the parasitic capacitance of ignoring switch, after this filter reconstruct structure chart such as Figure 12.This moment filter be equivalent to one with original low pass filter unit structural similarity, but length of transmission line is original one times filter, its circuit structure such as Figure 13.The inductance that L3, L4 constitute for the bottom signal line, C4 and C5 are respectively the electric capacity that a MEMS film bridge 30 and the 2nd MEMS film bridge 34 and bottom signal line constitute.Because holding wire length is before the reconstruct one times after the reconstruct, so the 3dB cut-off frequency of filter is reduced to 12dB from 21dB, Insertion Loss is less than 1.3dB in the band, and band is outer to be suppressed greater than 25dB, thereby realizes the restructural of low pass filter.
Low pass filtered of the present invention is particularly suitable for being applied in the phased filter array, makes the reconfigurable microwave low-pass filter in multiband and broadband, and advantages such as size is little, frequency is high, the insertion loss is little are arranged.In addition, it is integrated that this low pass filter also can be used for radio-frequency devices, for the development of following mobile communication contributes.

Claims (2)

1, a kind of reconfigurable microwave low-pass filter that contains mems switch, contain three inputs, three outputs, five MEMS film bridges, four bias pad, two ground wires, six bias lines, nine holding wires and ten bridge piers, three inputs are respectively first input end (10), second input (11) and the 3rd input (12), three outputs are respectively first output (20), second output (21) and the 3rd output (22), five MEMS film bridges are respectively a MEMS film bridge (30), the 2nd MEMS film bridge (31), the 3rd MEMS film bridge (32), the 4th MEMS film bridge (33) and the 5th MEMS film bridge (34), four bias pad are respectively first bias pad (40), second bias pad (41), the 3rd bias pad (42) and the 4th bias pad (43), two ground wires are respectively first ground wire (50) and second ground wire (51), six bias lines are respectively first bias line (60), second bias line (61), the 3rd bias line (62), the 4th bias line (63), the 5th bias line (64) and the 6th bias line (65), nine holding wires are respectively first holding wire (70), secondary signal line (71), the 3rd holding wire (72), the 4th holding wire (73), the 5th holding wire (74), the 6th holding wire (75), the 7th holding wire (76), the 8th holding wire (77) and the 9th holding wire (78), ten bridge piers are respectively first bridge pier (80), second bridge pier (81), the 3rd bridge pier (82), the 4th bridge pier (83), the 5th bridge pier (84), the 6th bridge pier (85), the 7th bridge pier (86), the 8th bridge pier (87), the 9th bridge pier (88) and the tenth bridge pier (89), it is characterized in that, nine parallel cloth of holding wire are listed between first ground wire (50) and second ground wire (51), first bridge pier (80), second bridge pier (81), the 3rd bridge pier (82), the 4th bridge pier (83), the 5th bridge pier (84) is sequentially arranged in the outside of first ground wire (50), first bias line (60), second bias line (61), first bias pad (40) and the 6th bias line (65) are distributed in first bridge pier (80), second bridge pier (81), the 3rd bridge pier (82), the outside of the 4th bridge pier (83) and the 5th bridge pier (84), the 6th bridge pier (85), the 7th bridge pier (86), the 8th bridge pier (87), the 9th bridge pier (88), the tenth bridge pier (89) is sequentially arranged in the outside of second ground wire (51), the 3rd bias line (62), the 4th bias line (63) the 5th bias line (64), second bias pad (41), the 3rd bias pad (42) and the 4th bias pad (43) are distributed in the 6th bridge pier (85), the 7th bridge pier (86), the 8th bridge pier (87), the 9th bridge pier (88), the outside of the tenth bridge pier (89), first bridge pier (80), second bridge pier (81), the 3rd bridge pier (82), the 4th bridge pier (83) and the 5th bridge pier (84) respectively with the 6th bridge pier (85), the 7th bridge pier (86), the 8th bridge pier (87), the 9th bridge pier (88), it is right that the tenth bridge pier (89) is formed five bridge piers, first input end (10) is connected with right-hand member with the left end of first ground wire (50) respectively with first output (20), the 3rd input (12) is connected with right-hand member with the left end of second ground wire (51) respectively with the 3rd output (22), second input (11) and first holding wire (70), the 5th holding wire (74) is connected with the 6th holding wire (75), second output (21) and the 4th holding wire (73), the 5th holding wire (74) is connected with the 9th holding wire (78), first bias line (60) is connected across between first bridge pier (80) and first bias pad (40), the 6th bias line (65) is connected across between first bias pad (40) and the 5th bridge pier (84), second bias line (61) is connected across between second bridge pier (81) and the 4th bridge pier (83), the 3rd bias line (62) is connected across between the 7th bridge pier (86) and second bias pad (41), the 4th bias line (63) is connected across between the 8th bridge pier (87) and the 3rd bias pad (42), the 5th bias line (64) is connected across between the 9th bridge pier (88) and the 4th bias pad (43), the one MEMS bridge film (30) is connected across between first bridge pier (80) and the 6th bridge pier (85), the 2nd MEMS bridge film (31) is connected across between second bridge pier (81) and the 7th bridge pier (86), the 3rd MEMS bridge film (32) is connected across between the 3rd bridge pier (82) and the 8th bridge pier (87), the 4th MEMS bridge film (33) is connected across between the 4th bridge pier (83) and the 9th bridge pier (88), and the 5th MEMS bridge film (34) is connected across between the 5th bridge pier (84) and the tenth bridge pier (89).
2, the described preparation method who contains the reconfigurable microwave low-pass filter of mems switch of a kind of claim 1 is characterized in that, this method and IC process compatible adopt six mask plates, the concrete operations step altogether:
First step cleaning silicon chip
The high resistant silicon chip that thickness and diameter is respectively 550 μ m and two inches places H 2O 2: H 2SO 4The mixed liquor of=1:1 boils to boiling over-emitting black exhaust, washed with de-ionized water, then silicon chip is put into a cleaning fluid and boil to boiling, washed with de-ionized water is put into No. two cleaning fluids to silicon chip at last and is boiled to boiling, deionized water rinsing, drying, oven dry, the prescription of a cleaning fluid are 27%NH 4OH:30%H 2O 2: deionized water=1:2:5, the prescription of No. two cleaning fluids are 37% HCL:30%H 2O 2: deionized water=1:2:8;
The second step thermal oxidation
Is the silicon dioxide layer of 1 μ m with thermal oxidation method at the superficial growth thickness of high resistant silicon chip, feeds dried oxygen in 10 minutes, fed wet oxygen in 100 minutes, adds 10 minutes again and feed dried oxygen;
The 3rd step evaporation titanium layer and gold layer
Hydatogenesis titanium layer and gold layer successively on the silicon dioxide layer of the high resistant silicon chip of handling through second step, thickness is respectively 1000
Figure A200810041122C0004085401QIETU
With 3000
Figure A200810041122C0004085401QIETU
, temperature and vacuum degree in the vapourizing furnace are respectively 250 ℃ and 10 * 10 -5Torr;
Mask plate of the 4th positive glue photoetching of step, plating
The high resistant silicon chip of handling through the 3rd step is implemented mask plate technology of positive glue photoetching, under 1800 rev/mins the rotating speed, positive glue is covered on the high resistant silicon chip, by a mask plate the positive glue on the high resistant silicon chip is carried out photoetching, reserve the figure that needs plating, electrogilding layer, thickness are 2 μ m, form three inputs, three outputs, ten bridge piers and four bias pad, remove photoresist;
Two, No. three mask plates of the 5th positive glue photoetching of step are electroplated
With with the 4th the step identical positive glue photoetching method, by No. two mask plates and No. three mask plates the positive glue on the high resistant silicon chip is carried out photoetching successively, positive No. two mask plates of glue photoetching, electrogilding layer, thickness are 2 μ m, form two ground wires, nine holding wires, six roots of sensation bias line, positive No. three mask plates of glue photoetching, the electrogilding layer makes the thickness of three inputs, three outputs, four bias pad and ten bridge piers increase to 4 μ m by 2 original μ m, removes photoresist;
The negative glue photoetching of the 6th step, acid gilding layer, titanium layer
Negative No. two mask of glue photoetching, be placed in 130 ℃ the baking oven post bake after the development 30 minutes, plasma etching is 20 seconds then, successively gold layer, the titanium layer of not electroplating part are eroded at normal temperatures at last, keep three inputs, three outputs, two ground wires, nine holding wires, four bias pad, six roots of sensation bias line and ten bridge piers, the prescription of the solution of acid gilding is KI:I 2: H 2O=20g:6g:100ml, the prescription of the solution of corrosion titanium is K2[Fe (CN) 6]: KOH:H 2O=30g:5g:100ml;
The 7th step was removed negative glue
Adopt the oxygen gas plasma etching to remove negative glue on the high resistant silicon chip of handling through the 6th step, etching power, oxygen flow, etch period are respectively 50W, 60ml/min and 20 seconds;
The 8th one-step growth silicon nitride film
With the surface deposition one deck silicon nitride film of chemical vapor deposition at the high resistant silicon chip of handling through the 7th step, thickness is 0.3 μ m, and ammonia flow, silane flow rate and temperature are respectively 24ml/min, 560ml/min and 280 ℃;
No. four mask plates of the 9th positive glue photoetching of step, removal silicon nitride film
The high resistant silicon chip of handling through the 8th step is implemented No. four mask plate technologies of positive glue photoetching, cover the figure on the mask plate No. four with positive glue, protection needs the silicon nitride film of reservation, with SF6 gaseous plasma etch silicon nitride film, the flow of etching power, SF6 gas and etch period are respectively 50w, 2.4ml/s and 1 minute and 50 seconds;
No. five mask plates of the tenth positive glue photoetching of step
Under 2000 rev/mins the rotating speed, spin coating one layer thickness is that the polyimide film of 2 μ m is as sacrifice layer on the surface of the high resistant silicon chip of handling through the 9th step, 90 ℃ were dried by the fire one hour down, dry by the fire half an hour down at 130 ℃ again, the thick positive glue of spin coating 2 μ m on sacrifice layer, by No. 5 mask plate photoetching, positive glue is removed in the back of developing, obtain the sacrifice layer figure, then the high resistant silicon chip is placed 200 ℃ to solidify 1 hour down;
The tenth step evaporation deposit alusil alloy film
5 * 10 -5Under the vacuum degree of Torr, evaporation deposition alusil alloy film on the high resistant silicon chip of handling through the tenth step, the siliceous and thickness of this alusil alloy film is respectively 4% and 0.5 μ m;
The 12 step corrosion alusil alloy film forms the bridge film
The high resistant silicon chip of handling through the 11 step is implemented negative No. six mask plate technologies of glue photoetching, at 70 ℃ of H that down this high resistant silicon chip are placed on concentration 〉=85% 3PO 4In the solution, the bubble that corrosion alusil alloy film is emerged to the phosphoric acid solution is very faint, forms the bridge film, with this high resistant silicon chip of washed with de-ionized water;
The 13 step was removed sacrifice layer
Plasma etching is removed negative glue and the sacrifice layer on the high resistant silicon chip of handling through the 12 step, plasma etching power, oxygen flow and nitrogen flow are respectively 50w, 60ml/s and 2.8ml/s, obtain five unsettled bridge films, this bridge film is exactly the mems switch movable contact flat.
CN 200810041122 2008-07-29 2008-07-29 Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method Expired - Fee Related CN101431172B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 200810041122 CN101431172B (en) 2008-07-29 2008-07-29 Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 200810041122 CN101431172B (en) 2008-07-29 2008-07-29 Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method

Publications (2)

Publication Number Publication Date
CN101431172A true CN101431172A (en) 2009-05-13
CN101431172B CN101431172B (en) 2013-09-04

Family

ID=40646403

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 200810041122 Expired - Fee Related CN101431172B (en) 2008-07-29 2008-07-29 Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method

Country Status (1)

Country Link
CN (1) CN101431172B (en)

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101593863B (en) * 2009-06-26 2012-11-21 北京信息科技大学 Adjustable microwave band-pass filter
CN103078171A (en) * 2013-01-05 2013-05-01 清华大学 Frequency-reconfigurable antenna and preparation method thereof
CN103344831A (en) * 2013-06-19 2013-10-09 东南大学 Phase detector based on micromechanical direct thermoelectric power sensors and preparation method thereof
CN103346368A (en) * 2013-06-08 2013-10-09 浙江理工大学 Reconfigurable microwave low-pass filter
CN103812465A (en) * 2014-02-17 2014-05-21 东南大学 Micro-mechanical clamped beam type sixteen-state reconfigurable microwave band-pass filter
CN104319441A (en) * 2014-11-06 2015-01-28 中国电子科技集团公司第五十四研究所 Frequency-band-switchable switch band-pass filter based on RF MEMS technology
CN106207335A (en) * 2016-08-24 2016-12-07 华东交通大学 A kind of adjustable reconfigurable band filter
CN106672894A (en) * 2017-01-12 2017-05-17 东南大学 Curvature sensor based on flexible substrate MEMS switch structure
WO2017193340A1 (en) * 2016-05-12 2017-11-16 华为技术有限公司 Filtering unit and filter
CN108134164A (en) * 2017-11-24 2018-06-08 北京遥感设备研究所 A kind of silicon substrate microminiature MEMS filter
CN110581061A (en) * 2019-09-25 2019-12-17 同辉电子科技股份有限公司 Processing technology of gallium nitride MMIC power amplifier chip
CN113691233A (en) * 2021-08-27 2021-11-23 中国电子科技集团公司第二十六研究所 High-reliability wafer-level packaged acoustic surface filter structure and preparation method thereof

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100515693B1 (en) * 2003-03-31 2005-09-23 한국기계연구원 Method for Enlarge a Travel of Piezoelectric Sensor and it's MEMS Switch
US7692270B2 (en) * 2003-10-20 2010-04-06 University Of Dayton Ferroelectric varactors suitable for capacitive shunt switching

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101593863B (en) * 2009-06-26 2012-11-21 北京信息科技大学 Adjustable microwave band-pass filter
CN103078171A (en) * 2013-01-05 2013-05-01 清华大学 Frequency-reconfigurable antenna and preparation method thereof
CN103078171B (en) * 2013-01-05 2016-03-16 清华大学 frequency reconfigurable antenna and preparation method thereof
CN103346368A (en) * 2013-06-08 2013-10-09 浙江理工大学 Reconfigurable microwave low-pass filter
CN103344831B (en) * 2013-06-19 2015-04-29 东南大学 Phase detector based on micromechanical direct thermoelectric power sensors and preparation method thereof
CN103344831A (en) * 2013-06-19 2013-10-09 东南大学 Phase detector based on micromechanical direct thermoelectric power sensors and preparation method thereof
CN103812465B (en) * 2014-02-17 2016-05-04 东南大学 The clamped beam type 16 state reconfigurable microwave bandpass filters of micromechanics
CN103812465A (en) * 2014-02-17 2014-05-21 东南大学 Micro-mechanical clamped beam type sixteen-state reconfigurable microwave band-pass filter
CN104319441A (en) * 2014-11-06 2015-01-28 中国电子科技集团公司第五十四研究所 Frequency-band-switchable switch band-pass filter based on RF MEMS technology
CN104319441B (en) * 2014-11-06 2017-02-01 中国电子科技集团公司第五十四研究所 Frequency-band-switchable switch band-pass filter based on RF MEMS technology
WO2017193340A1 (en) * 2016-05-12 2017-11-16 华为技术有限公司 Filtering unit and filter
US10673111B2 (en) 2016-05-12 2020-06-02 Huawei Technologies Co., Ltd. Filtering unit and filter
CN106207335A (en) * 2016-08-24 2016-12-07 华东交通大学 A kind of adjustable reconfigurable band filter
CN106207335B (en) * 2016-08-24 2019-02-26 华东交通大学 A kind of adjustable restructural bandpass filter
CN106672894A (en) * 2017-01-12 2017-05-17 东南大学 Curvature sensor based on flexible substrate MEMS switch structure
CN106672894B (en) * 2017-01-12 2018-03-23 东南大学 A kind of curvature sensor based on flexible base board mems switch structure
CN108134164A (en) * 2017-11-24 2018-06-08 北京遥感设备研究所 A kind of silicon substrate microminiature MEMS filter
CN110581061A (en) * 2019-09-25 2019-12-17 同辉电子科技股份有限公司 Processing technology of gallium nitride MMIC power amplifier chip
CN113691233A (en) * 2021-08-27 2021-11-23 中国电子科技集团公司第二十六研究所 High-reliability wafer-level packaged acoustic surface filter structure and preparation method thereof

Also Published As

Publication number Publication date
CN101431172B (en) 2013-09-04

Similar Documents

Publication Publication Date Title
CN101431172B (en) Reconfigurable microwave low-pass filter containing MEMS switch and its manufacturing method
CN102107848B (en) Method of manufacturing suspension radio frequency switch
CN107222181A (en) FBAR based on SOI Substrate and preparation method thereof
CN102122939A (en) Preset cavity type SOI (silicon on insulator) substrate film bulk acoustic wave filter and manufacturing method thereof
CN109150135A (en) Thin film bulk acoustic wave resonator and its processing method based on bonding
CN105703736B (en) A kind of bulk acoustic wave device and integrated morphology
TW200303625A (en) Surface acoustic wave device having improved performance and method of making the device
CN101620952A (en) Ohm contact type radio frequency switch and integration process thereof
CN207938784U (en) The substrate integrated wave guide structure of Ti/Ni/Ag material systems
CN109786923A (en) A kind of miniature magnetoelectricity antenna structure and preparation method thereof of acoustics driving
CN112444912A (en) High-speed integrated adjustable light delay line and preparation method thereof
CN107026627A (en) Orthogonal array nano-pillar FBAR and preparation method thereof and wave filter
CN109150127A (en) Thin film bulk acoustic wave resonator and preparation method thereof, filter
CN207603582U (en) Thin film bulk acoustic wave resonator with hydrophobic anti-adhesion structure
CN100556795C (en) The preparation method of radio-frequency micro-machinery series contact type switch
CN103812468B (en) Micromechanics clamped beam type π type continuous reconfigurable microwave band filter
CN108768334B (en) Manufacturing method of TC-SAW IDT copper process
CN206542385U (en) FBAR and communication device with supporting construction
CN105097714A (en) Packaging structure for FBAR device and manufacturing method thereof
TW200301577A (en) Film bulk acoustic resonators structure and method of making
CN206542386U (en) FBAR and communication device based on insulator silicon chip
WO2009082812A1 (en) Direct contact heat control of micro structures
CN103326695B (en) A kind of restructural matching network adaptation containing mems switch
CN103280615A (en) Reconfigurable microwave low-pass filter with MEMS switch
CN103022018A (en) Production method of current tuned integrated magnetic film micro inductor and inductance tuning method

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130904

Termination date: 20140729

EXPY Termination of patent right or utility model