CN101393855B - 金属化工艺 - Google Patents

金属化工艺 Download PDF

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CN101393855B
CN101393855B CN2008101088033A CN200810108803A CN101393855B CN 101393855 B CN101393855 B CN 101393855B CN 2008101088033 A CN2008101088033 A CN 2008101088033A CN 200810108803 A CN200810108803 A CN 200810108803A CN 101393855 B CN101393855 B CN 101393855B
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semiconductor substrate
metallization process
conductive region
heat treatment
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CN101393855A (zh
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骆统
杨令武
苏金达
杨大弘
陈光钊
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Macronix International Co Ltd
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Abstract

一种金属化工艺,首先提供半导体基材,此半导体基材具有至少一含硅导电区域。接着,提供改善结块现象(agglomeration phenomenon)的离子注入于含硅导电区域。再来,对此半导体基材进行第一热处理,以修复半导体基材表面。其次,形成金属层于此半导体基材表面,金属层覆盖含硅导电区域。然后,对覆盖有金属层的此半导体基材进行第二热处理,以于含硅导电区域上形成金属硅化物层。

Description

金属化工艺
技术领域
本发明涉及一种金属化工艺,且特别涉及一种可减少金属硅化物的结块现象的金属化工艺。
背景技术
随着集成电路(Integrated Circuit,IC)的元件尺寸缩小,内连线或浅结的对应阻抗也随之增加,而使IC运作速度无法有效提高。如最常被用来形成栅极与局部连线的多晶硅(polysilicon),即使重度掺杂后仍带有相当高的电阻率,这会造成元件功耗及信号延迟(RC delay)的问题。一般所使用的改善方式为进行金属化工艺,以自动对准(self-alignment)形成金属硅化物(salicide)于如晶体管结构中的导电区域。然而,例如以钴金属与多晶硅栅极在高温下反应形成如CoSi2的金属硅化物时,由于CoSi2/Si界面并不平整且有热凹槽(thermal grooving),将导致所谓的结块现象(agglomeration),而大幅影响金属硅化物的热稳定性及元件的运作性能。
发明内容
本发明涉及一种金属化工艺,其是于沉积金属层之前,先将半导体基材进行热处理,可得到较佳的沉积条件,并且可减缓后方热处理步骤中金属硅化物的结块现象。
根据本发明,提出一种金属化工艺。首先,提供半导体基材,此半导体基材具有至少一含硅导电区域。其次,提供改善结块现象的离子注入于含硅导电区域。接着,对此半导体基材进行第一热处理。而后,形成金属层于此半导体基材表面,金属层覆盖含硅导电区域。再来,对覆盖有金属层的此半导体基材进行第二热处理,以形成金属硅化物层于含硅导电区域上。
根据本发明,另提出一种金属化工艺。首先,提供半导体基材,半导体基材具有至少一导电区域。其次,注入氮离子至导电区域内。接着,对半导体基材进行第一热处理,以修复半导体基材表面。而后,形成金属层于半导体基材表面,金属层覆盖导电区域。再来,形成扩散障碍层于金属层上。然后,对覆盖有金属层的半导体基材进行第二热处理,以于导电区域上形成金属硅化合层。修复后的半导体金属层表面减缓进行第二热处理时金属化合层的结块现象。
为让本发明的上述目的、特征、和优点能更明显易懂,下文特举优选实施例,并配合附图,作详细说明如下。
附图说明
图1为依照本发明的金属化工艺的流程图。
图2A~2E分别为依照本发明优选实施例的金属化工艺应用于晶体管元件时的工艺剖面图。
图3为未经过预先处理的半导体基材形成金属硅化物层后的电子显微镜照片。
图4为经过预先处理的半导体基材形成金属硅化物层后的电子显微镜照片。
附图标记说明
200:半导体基材      210:基材
220:晶体管元件      221:栅极氧化层
222:间隙壁          310:金属层
320:吸收层          330:扩散障碍层
311(1)、311(2)、311(3)、312(1)、312(2)、312(3):金属硅化物层
G:栅极              S:源极
D:漏极
具体实施方式
请参照图1,为依照本发明的金属化工艺的流程图。首先,于步骤110中,提供半导体基材,此半导体基材具有至少一导电区域。然后,于步骤120中,对此半导体基材进行第一热处理。接着,于步骤130中,于此半导体基材表面形成金属层,金属层覆盖导电区域。最后,于步骤140中,对覆盖有金属层的此半导体基材进行第二热处理,以形成金属化合层于导电区域上。
以下将以应用于一般场效晶体管为例进一步具体说明本发明的金属化工艺,其中半导体基材的导电区域是以含硅导电区域为例做说明,且半导体基材进行第二热处理后对应地形成金属硅化物层于含硅导电区域上。然于本发明所属技术领域的技术人员当可理解,本发明可应用于任何集成电路中来改善内连线或元件特性,以提升集成电路整体效能,也使得IC工艺设计更具有弹性。
请依序参照图2A~2E,分别为依照本发明优选实施例的金属化工艺应用于晶体管元件时的工艺剖面图。如图2A所示,为步骤110中提供的半导体基材200。半导体基材200包括基材210及承载于基材210上的晶体管元件220。于本实施例中,基材210使用P型或N型的硅基材,但在其他实施例中,基材210可为绝缘体上硅(Silicon-On-Insulator,SOI)基材。晶体管元件220例如为一般的金属氧化物半导体(MOS)晶体管元件,并包括栅极G、漏极D与源极S等含硅导电区域。形成于栅极氧化层221上的栅极G为经沉积及图案化的多晶硅层。漏极D及源极S为与基材210电性相反的砷或硼等物质的掺杂区,间隙壁222则可作为后续形成金属硅化物时的掩模。
然而,此时半导体基材200上可能留有一些无机或有机污染物,如工艺环境中的杂质粒子或光致抗蚀剂、蚀刻及图案化过程中的残余物或副产品(如polymer),甚或基材210的原生氧化物等等。此外,半导体基材200的表面结构亦可能留有前段工艺中造成的不平整现象。而金属化工艺的品质即相当取决于含硅导电区域的表面干净平滑与否。
如图2B所示,于步骤120中,对半导体基材200进行第一热处理。于本实施例中,第一热处理为一般使用高温炉火的退火处理(annealing),使半导体基材200在温度450至700℃之间的氮气环境(流量约1至10slm,压力约1atm)中进行约20分钟至3小时左右的退火处理。于其他实施例中,第一热处理也能使用温度设定较高的快速退火处理(Rapid ThermalProcessing,RTP)。通过执行第一热处理,即能有效除去前述半导体基材200上对后续金属化工艺不利的物质,同时修复半导体基材200的表面结构,使晶体管元件220的含硅导电区域更干净平滑。
传统金属化工艺在进行金属沉积步骤前,仅以如使用氟化氢等的预洗(pre-clean)步骤来使半导体基材表面尽可能达到适当的沉积环境条件。然而,预洗步骤对于前述的不利物质的清除作用相当有限,且无法对半导体基材200的表面结构有所改善。因此,本发明是以一道热处理步骤来达到更佳的沉积环境条件。当然,在进行步骤130之前,也可再进行次预洗步骤。
如图2C所示,于步骤130中,由步骤120获得适当的沉积环境条件后,能以溅射沉积方式形成所需的金属层310。于本实施例中,金属层310是以包含钴(cobalt,Co)为例作说明。于其他实施例中,金属层310也可使用如钛(titanium,Ti)、镍(nickel,Ni)及钼(molybdenum,Mo)等等。一般来说,可在金属层310上再形成吸收层320及扩散障碍层330(diffusion barrier),如图2C所示。吸收层320例如使用钛来帮助反应掉基材210的原生氧化物,以减少后续形成金属硅化物的过程中的氧污染。扩散障碍层330例如使用氮化钛来减少金属层310在后续热处理中的扩散逸失。另外,值得一提的是,形成金属层310之前,也可以提供离子注入于所需的含硅导电区域,例如氮离子(N2+)注入,由此改变后续热处理中的金属硅化物的管芯大小(grain size)而改善结块现象。
如图2D所示,于步骤140中,对覆盖有金属层310、吸收层320及扩散障碍层330的半导体基材200进行第二热处理,如温度400至550℃的退火处理。由此,使包含钴的金属层310与栅极G、漏极D及源极S反应而形成为钴单硅化物的金属硅化物层311(1),311(2)及311(3)。
请参照图3及图4,图3为未经过预先处理的半导体基材形成金属硅化物层后的电子显微镜照片;图4为经过预先处理的半导体基材形成金属硅化物层后的电子显微镜照片。未经过包括第一热处理及氮离子注入的预先处理的半导体基材,进行第二热处理的退火步骤之后,于含硅导电区域(图3中浅色梯形区域)上形成不规则且不连续的金属硅化物层,即图3中浅色梯形区域上端的深色不规则区域。经过第一次热处理及氮离子注入的预先处理的半导体基材,进行第二热处理的退火步骤之后,于含硅导电区域(图4中浅色梯形区域)上形成连续且完整的金属硅化物层,即图4中浅色梯形区域上端的深色区域。由图3及图4可知,对于半导体基材进行第一热处理及氮离子注入之后,可以有效改善金属硅化物层的结块现象。
请继续参照图2D,因为金属硅化物层311(1)、311(2)及311(3)的阻值仍相当高,因此以一般蚀刻方式选择性地移除图2D中除金属硅化物层311(1)、311(2)及311(3)外的物质后,一般会再进行一次温度约700至900℃的退火处理而得到如图2E所示的为二硅化钴的金属硅化物层312(1)、312(2)及312(3)(阻值约降至3~8欧姆)。如此一来,即完成本发明优选实施例的金属化工艺。当然,于其他实施例中,步骤140的第二热处理亦可使用快速退火处理来直接一次形成为二硅化钴的金属硅化物层。
如此一来,通过步骤120中的第一热处理而得到较佳的沉积环境条件后,可有效降低后续一次或两次的热处理中金属硅化物的结块现象而获得均匀度较高的金属硅化物层。由此,无须为了因应可能的结块现象而增加金属层的沉积厚度,同时也避免漏电流的情形,而大幅提高金属硅化物的热稳定性及晶体管元件的运作性能及产品成品率。
本发明上述实施例所披露的金属化工艺,于沉积金属层之前,对半导体基材进行一次热处理以获得较佳的沉积环境条件,从而减少后续热处理中金属硅化物的结块现象。当然,如前述,本发明的金属化工艺可应用于任何集成电路中来改善内连线或元件特性,以提升集成电路整体效能,也使得工艺范围(process window)更有弹性
综上所述,虽然本发明已以优选实施例披露如上,然其并非用以限定本发明。本发明所属技术领域的技术人员,在不脱离本发明的精神和范围内,当可作各种的更动与润饰。因此,本发明的保护范围当视后附的权利要求所界定的为准。

Claims (23)

1.一种金属化工艺,包括:
(a)提供半导体基材,该半导体基材具有至少一含硅导电区域;
(b)提供氮离子注入该含硅导电区域;
(c)对该半导体基材进行第一热处理,以修复该半导体基材表面,其中该半导体基材是于压力为实质上1atm、温度为实质上450至700℃的氮气环境中进行实质上20至180分钟的退火处理;
(d)形成金属层于该半导体基材表面,该金属层覆盖该含硅导电区域;以及
(e)对覆盖有该金属层的该半导体基材进行第二热处理,以于该含硅导电区域上形成金属硅化物层,
其中于该步骤(d)及该步骤(e)之间还包括:
形成吸收层,以吸收该半导体基材表面的原生氧化物。
2.如权利要求1所述的金属化工艺,其中于该步骤(a)及该步骤(d)之间还包括:
对该半导体基材进行预洗步骤。
3.如权利要求1所述的金属化工艺,其中于该步骤(c)中,氮气的流量为实质上1至10slm。
4.如权利要求1所述的金属化工艺,其中于该步骤(e)之后还包括:
(f)对该半导体基材进行第三热处理,以形成电阻值低于该金属硅化物的另一金属硅化物。
5.如权利要求4所述的金属化工艺,其中该第三热处理为实质上700至900℃的退火处理。
6.如权利要求1所述的金属化工艺,其中于该步骤(e)之后还包括:
至少移除未与该含硅导电区域反应的部分的该金属层。
7.如权利要求1所述的金属化工艺,其中于该步骤(d)及该步骤(e)之间还包括:
形成扩散障碍层于该吸收层上。
8.如权利要求7所述的金属化工艺,其中该扩散障碍层包含氮化钛。
9.如权利要求1所述的金属化工艺,其中该吸收层包含钛。
10.如权利要求1所述的金属化工艺,其中于该步骤(d)中,该金属层选自由钴、钛、镍及钼所组成的族群。
11.如权利要求1所述的金属化工艺,其中于该步骤(a)中,该半导体基材更具有绝缘体上硅基材。
12.如权利要求1所述的金属化工艺,其中于该步骤(e)中,该第二热处理为实质上400至550℃的退火处理。
13.如权利要求1所述的金属化工艺,其中于该步骤(e)中,该第二热处理为快速退火处理。
14.一种金属化工艺,包括:
(a)提供半导体基材,该半导体基材具有至少一导电区域;
(b)注入氮离子至该导电区域内;
(c)对该半导体基材进行第一热处理,以修复该半导体基材表面,其中该半导体基材是于压力为实质上1atm、温度为实质上450至700℃的氮气环境中进行约20至180分钟的退火;
(d)形成金属层于该半导体基材表面,该金属层覆盖该导电区域;
(e)形成扩散障碍层于该金属层上;以及
(f)对覆盖有该金属层的该半导体基材进行第二热处理,以于该导电区域上形成金属化合层,修复后的该半导体金属层表面是用以减缓进行该第二热处理时该金属化合层的结块现象,
其中于该步骤(d)及该步骤(e)之间还包括:
形成吸收层,以吸收该半导体基材表面的原生氧化物。
15.如权利要求14所述的金属化工艺,其中于该步骤(a)中,该导电区域包括含硅导电区域。
16.如权利要求15所述的金属化工艺,其中于该步骤(f)中,该金属化合层包括金属硅化物层。
17.如权利要求14所述的金属化工艺,其中于该步骤(a)及该步骤(d)之间还包括:
对该半导体基材进行预洗步骤。
18.如权利要求14所述的金属化工艺,其中于该步骤(c)中,氮气的流量为实质上1至10slm。
19.如权利要求16所述的金属化工艺,其中于该步骤(f)之后还包括:
(g)对该半导体基材进行第三热处理,以形成电阻值低于该金属硅化物的另一金属硅化物。
20.如权利要求19所述的金属化工艺,其中该第三热处理为实质上700至900℃的退火处理。
21.如权利要求15所述的金属化工艺,其中于该步骤(f)之后还包括:
至少移除未与该含硅导电区域反应的部分的该金属层。
22.如权利要求14所述的金属化工艺,其中于该步骤(f)中,该第二热处理为实质上400至550℃的退火处理。
23.如权利要求14所述的金属化工艺,其中该吸收层包含钛。
CN2008101088033A 2007-09-20 2008-05-26 金属化工艺 Expired - Fee Related CN101393855B (zh)

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