CN101371349B - 包括其间具有超晶格的浅沟槽隔离区域的半导体器件及相关方法 - Google Patents

包括其间具有超晶格的浅沟槽隔离区域的半导体器件及相关方法 Download PDF

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Publication number
CN101371349B
CN101371349B CN2006800220664A CN200680022066A CN101371349B CN 101371349 B CN101371349 B CN 101371349B CN 2006800220664 A CN2006800220664 A CN 2006800220664A CN 200680022066 A CN200680022066 A CN 200680022066A CN 101371349 B CN101371349 B CN 101371349B
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China
Prior art keywords
semiconductor
superlattice
layer
producing
semiconductor device
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Expired - Fee Related
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CN2006800220664A
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English (en)
Chinese (zh)
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CN101371349A (zh
Inventor
卡里帕特纳姆·V·劳
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Mears Technologies Inc
RJ Mears LLC
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RJ Mears LLC
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823807—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the channel structures, e.g. channel implants, halo or pocket implants, or channel materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823878—Complementary field-effect transistors, e.g. CMOS isolation region manufacturing related aspects, e.g. to avoid interaction of isolation region with adjacent structure

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Element Separation (AREA)
CN2006800220664A 2005-06-20 2006-06-20 包括其间具有超晶格的浅沟槽隔离区域的半导体器件及相关方法 Expired - Fee Related CN101371349B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US69210105P 2005-06-20 2005-06-20
US60/692,101 2005-06-20
PCT/US2006/023918 WO2007002043A1 (en) 2005-06-20 2006-06-20 Semiconductor device including shallow trench isolation (sti) regions with a superlattice therebetween and associated methods

Publications (2)

Publication Number Publication Date
CN101371349A CN101371349A (zh) 2009-02-18
CN101371349B true CN101371349B (zh) 2011-04-13

Family

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Family Applications (1)

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CN2006800220664A Expired - Fee Related CN101371349B (zh) 2005-06-20 2006-06-20 包括其间具有超晶格的浅沟槽隔离区域的半导体器件及相关方法

Country Status (7)

Country Link
EP (1) EP1900021A1 (de)
JP (1) JP2009529780A (de)
CN (1) CN101371349B (de)
AU (1) AU2006262416A1 (de)
CA (1) CA2612213A1 (de)
TW (2) TWI308376B (de)
WO (1) WO2007002043A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7910918B2 (en) 2007-09-04 2011-03-22 Texas Instruments Incorporated Gated resonant tunneling diode
US7943450B2 (en) 2007-09-04 2011-05-17 Texas Instruments Incorporated Gated resonant tunneling diode
EP3281231B1 (de) 2015-05-15 2021-11-03 Atomera Incorporated Verfahren zur herstellung von halbleiterbauelementen mit superlattice und punch-through-stop (pts)-schichten in verschiedenen tiefen
US10741436B2 (en) * 2017-08-18 2020-08-11 Atomera Incorporated Method for making a semiconductor device including non-monocrystalline stringer adjacent a superlattice-sti interface

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6147384A (en) * 1996-12-19 2000-11-14 Texas Instruments Incorporated Method for forming planar field effect transistors with source and drain an insulator and device constructed therefrom
EP1274134A2 (de) * 2001-07-04 2003-01-08 Matsushita Electric Industrial Co., Ltd. MOS Transistor und Verfahren zu dessen Herstellung
CN1437250A (zh) * 2002-02-07 2003-08-20 夏普株式会社 用于生产cmos器件的方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6703271B2 (en) * 2001-11-30 2004-03-09 Taiwan Semiconductor Manufacturing Company Complementary metal oxide semiconductor transistor technology using selective epitaxy of a strained silicon germanium layer
JP4750342B2 (ja) * 2002-07-03 2011-08-17 ルネサスエレクトロニクス株式会社 Ｍｏｓ−ｆｅｔおよびその製造方法、並びに半導体装置
JP2004047844A (ja) * 2002-07-15 2004-02-12 Renesas Technology Corp 半導体装置およびその製造方法
US6846720B2 (en) * 2003-06-18 2005-01-25 Agency For Science, Technology And Research Method to reduce junction leakage current in strained silicon on silicon-germanium devices
EP1644983B1 (de) * 2003-06-26 2008-10-29 Mears Technologies, Inc. Halbleiterbauelement mit einem mosfet mit bandlücken-angepasstem übergitter
US6897472B2 (en) * 2003-06-26 2005-05-24 Rj Mears, Llc Semiconductor device including MOSFET having band-engineered superlattice
US20050167777A1 (en) * 2004-01-30 2005-08-04 Taiwan Semiconductor Manufacturing Company, Ltd. Microelectronic device with active layer bumper

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6147384A (en) * 1996-12-19 2000-11-14 Texas Instruments Incorporated Method for forming planar field effect transistors with source and drain an insulator and device constructed therefrom
EP1274134A2 (de) * 2001-07-04 2003-01-08 Matsushita Electric Industrial Co., Ltd. MOS Transistor und Verfahren zu dessen Herstellung
CN1437250A (zh) * 2002-02-07 2003-08-20 夏普株式会社 用于生产cmos器件的方法

Also Published As

Publication number Publication date
TWI308376B (en) 2009-04-01
TW200717701A (en) 2007-05-01
WO2007002043A1 (en) 2007-01-04
WO2007002043A9 (en) 2007-05-24
CA2612213A1 (en) 2007-01-04
AU2006262416A1 (en) 2007-01-04
CN101371349A (zh) 2009-02-18
TW200707726A (en) 2007-02-16
TWI311374B (en) 2009-06-21
JP2009529780A (ja) 2009-08-20
EP1900021A1 (de) 2008-03-19

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Granted publication date: 20110413

Termination date: 20110620