CN101366119A - 具有沟槽绝缘接触端子的减薄的图像传感器 - Google Patents

具有沟槽绝缘接触端子的减薄的图像传感器 Download PDF

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CN101366119A
CN101366119A CNA2006800515887A CN200680051588A CN101366119A CN 101366119 A CN101366119 A CN 101366119A CN A2006800515887 A CNA2006800515887 A CN A2006800515887A CN 200680051588 A CN200680051588 A CN 200680051588A CN 101366119 A CN101366119 A CN 101366119A
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P·布朗夏尔
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Teledyne e2v Semiconductors SAS
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Abstract

本发明涉及减薄的衬底图像传感器，尤其是彩色图像传感器的制造。从硅衬底的正面实施制造步骤，然后将所述正面转移到转移衬底上，并减薄所述硅，然后通过背面制造连接端子。在连接端子的位置穿过减薄的硅形成多个局部化接触孔，所述孔暴露了在正面处理步骤期间形成的第一导电层(24)；在背面上沉积与所述硅接触的铝(42)，所述铝渗透到开口内，并与所述第一层接触；对所述铝进行蚀刻，以限定所述连接端子；最后，穿过所述硅层的整个厚度打开外围沟槽，该沟槽完全包围所述连接端子。

Description

具有沟槽绝缘接触端子的减薄的图像传感器
技术领域
本发明涉及减薄的衬底图像传感器的制造，尤其是彩色图像传感器的制造。
背景技术
将薄衬底图像传感器设计为通过以下方式来改善传感器的比色性能特征，即通过使传感器能够由背面穿过非常薄的硅层来将其照亮；该布置提供了一种避免光子以及衬底内的光生电子发生色散的方式，因此避免了将对比色分析(colorimetry)造成极大损害的图像串扰，因为相邻图像的像素对应于不同的颜色。
减薄的衬底上的图像传感器的制造一般包括下述步骤：从硅衬底(例如，固体单晶硅衬底或者绝缘体上硅SOI衬底)开始处理，所述衬底的厚度为几百微米，其支持对直径为10或20分米的晶片的工业处理，该衬底的正面涂覆有单晶硅的外延层，该外延层将含有传感器的有源电路。在该外延层中，从正面制造传感器的各种功能(图像俘获、信号处理)所需的电子电路。之后，将该衬底通过其支持该电路的正面粘合到厚度足以满足工业处理要求的转移衬底上，并将所述原始硅衬底减薄到几微米的厚度。由此得到的该厚度非常薄的硅不允许受到晶片的工业处理，这也是粘合转移衬底存在的原因。就彩色图像传感器而言，该非超薄的厚度起着显著提高传感器的比色质量的作用，其中，所述传感器由所述背面穿过沉积在该背面上的一层滤色器并穿过所述非常薄的外延硅层将其照亮。
该技术所面临的问题之一是制造用于为传感器提供外部电连接的接触端子的问题。
已经提出的一种解决方案包括：在对正面执行的处理步骤中提供接触金属化部，之后从所述背面在减薄的硅中切割既宽又深的开口，以暴露这些金属化部。之后，可以将焊丝焊接到这些开口内的金属化部上。但是，这种做法往往需要提供宽的开口(通常宽度为120微米到180微米)。因而，通过这种方式形成的端子的总宽度远大于通常为常规CMOS电子电路的连接端子提供的宽度(典型地，60微米宽的端子就足够了)。
此外，必须在将滤色器沉积到传感器上之前形成所述开口；现在，这些开口的存在扰乱了滤波层的分布均匀性；此外，这些滤波层的沉积将在所述开口内留下不容易去除的残余物，但是必须将其去除以确保连接线的焊接。
可以设想另一种解决方案，其包括在处理正面时，即在转移到转移衬底上之前形成开口；贯穿减薄之后剩下的整个深度而在连接端子所在的位置形成开口，并对这些开口的底部进行金属化。在转移并减薄之后，可以在减薄的背面抵达金属化底部，并且所述金属化底部构成了连接端子，该次，其与出射面处于相同的平面内，而并非处于开口的底部。但是，这样的方法所需要的步骤并非是典型的CMOS工业方法中的常规步骤，因为在必须既制造这种类型的传感器和更为常规的电路(非减薄衬底)的情况下，不容易将支持传感器的硅沟槽插入到工业生产当中。
发明内容
为了避免已知方法的缺陷，本发明提出了一种新颖的具有减薄的硅衬底的图像传感器的制造方法，其包括从硅衬底的正面实施的制造步骤，之后将所述正面转移到转移衬底上，之后将所述硅衬底减薄到几微米的厚度，以及最后在所述减薄的硅衬底的背面实施的制造步骤，该方法的特征在于，从所述背面实施的制造步骤包括：
-在为传感器的外部连接端子的制造保留的表面区域上，穿过所述减薄的衬底蚀刻至少一个局部化接触开口，所述开口局部暴露第一导电层，该第一导电层是在从所述正面实施的制造步骤的过程中形成的；
-在所述背面上沉积与所述开口中的硅接触的第二导电层，所述第二层与所述第一层接触；
-蚀刻所述第二层，以限定连接端子；
-穿过所述减薄的硅衬底的整个厚度打开外围沟槽，使其抵达位于该衬底之下的绝缘层，该沟槽完全包围所述连接端子，并且所述沟槽的底部整个由所述绝缘层形成，因而形成了由减薄的硅构成的岛，该岛被所述连接端子覆盖，并且其通过所述沟槽与所述减薄的硅的其余部分绝缘。
由于所述外围沟槽的原因，没有必要采用绝缘层使由硅构成的第二导电层绝缘，这也是直接沉积与硅接触的第二导电层的原因。
之后，可以将线路焊接到连接端子的一部分上。其上焊接有所述线路的所述连接端子的部分优选没有开口。
优选在打开所述沟槽之后，在所述背面上沉积绝缘平面化层，并在该层内蚀刻开口，以暴露连接端子的表面区域的一部分，线路可以焊接到该部分。
优选地，穿过所述减薄的衬底提供几个局部化接触开口，以建立与下部的第一导电层的一系列局部化接触。
优选在蚀刻所述第二导电层之后切割出所述沟槽。
附图说明
通过阅读以下参考附图所给出的详细说明，本发明的其他特征和优点将变得显而易见，在附图中：
-图1到图8示出了本发明的方法的主要的连续步骤；
-图9示出了具有多个接触开口的连接端子的一般构造的平面图。
具体实施方式
图1示出了包括表面外延层12的硅衬底10，在所述表面外延层12内将制造集成电路的有源元件尤其是图像传感器的光敏元件。通过涉及不同的绝缘、导电或半导电层的沉积、蚀刻、掺杂的常规操作来制造包括(例如)光敏有源矩阵和外围电路等的传感器电子电路，所有的这些操作均从衬底的正面，即其上设置有外延层的面实施。衬底10可以是由固体单晶硅构成的衬底或者SOI(绝缘体上硅)型衬底，其包括通过薄氧化硅层与衬底隔开的外延层。
在正面示意性地示出了具有掺杂半导体区域14的外延层12以及处于外延层12之上的通过绝缘层相互隔开的若干层叠置导电层16、18、20。根据由所述电路的功能决定的期望图案来蚀刻所述导电层，并且可以通过贯穿绝缘层的导电通孔来使所述导电层在适当的位置相互链接。在全文中均采用附图标记22表示绝缘层，而不对其进行相互区分，尽管是以交替的导电层和绝缘层的形式对所述绝缘层进行沉积和蚀刻的。
因此，在正面上的制造步骤结束后，所述传感器总体呈现为涂覆有外延层12的硅衬底10，值得注意的是，所述外延层12包括不同的掺杂模式，该外延层自身涂覆有其内嵌入了若干蚀刻导电层的绝缘层22。层22的顶面是平坦的，其原因尤其在于能够最后在所述衬底上沉积绝缘平面化层。
在导电层当中，提供了层16，在该层中，在位置对应于用于实现传感器的外部连接的端子的区域内形成导电焊盘24。由于连接端子往往处于芯片的外围，因而原则上导电焊盘24也处于芯片的外围。通过小厚度的绝缘层使端子位置上的导电焊盘24与外延层12分离。导电层16可以由铝构成。绝缘层主要由氧化硅构成，但是在层22内可能存在其他绝缘材料。导电焊盘24可以相对较大(具有几十微米的侧边尺寸)，其可以是连续的或者具有开放栅格(open grid)结构，或者在端子承载的电流小时，其甚至可以具有小尺寸(几微米)。
然后将因此经过了从正面的必要处理操作的集成电路通过其正面粘合到转移衬底30的正面上。应当指出，该操作是在硅晶片上实施的，而不是在将晶片被切割成独立的芯片之后实施的。在粘合之前，实施必要的平面化操作，以确保晶片和转移衬底相互理想地附着，尤其是在不添加粘合材料而通过分子附着实现粘合的情况下。
于是，在粘合之后，利用机械和化学机械操作通过其背面对衬底10的硅进行减薄，从而只留下厚度极薄的硅；实际上，只留下了外延层12(或者略微超过外延层一点)，即，几微米。图2示出了薄的剩余硅层12，将其翻转并通过其正面(向下翻转)粘合到转移衬底30的正面(向上翻转)上。
现在，转移衬底30为晶片提供机械强度。之后，从外延层的背面(图2的顶部)执行各种处理操作，尤其是制造用于实现电路的外部连接的连接端子所需的操作。
为此，贯穿外延层12的整个厚度打开一系列开口40，所述开口分布在用于与连接端子电连接的导电焊盘24中的每一个之上。在某些情况下，单个开口40可能就足够了；就任何情况而言，所述开口均落在焊盘24的导电部分之上。图3示出了包括焊盘24和形成于该焊盘之上的开口40的集成电路的部分的图示。为了简化图示，仅示出了少量的局部化开口。在贯穿层12的硅的整个厚度蚀刻了这些开口之后，通过去除位于开口的底部的绝缘层22的部分而完成所述开口的制造，以暴露导电焊盘24。
之后，沉积由(例如)铝构成的导电层42。在下文中，将层16(含有导电焊盘24的层)称为第一导电层，将层42称为第二导电层，所述两个导电层有助于为集成电路形成外部连接端子。可以将对硅进行表面掺杂的步骤放在沉积第二导电层42之前。
第二导电层42填充所述开口并通过这些开口中的每一个与形成焊盘24的第一导电层接触(图4)。
在该沉积之后，对第二导电层42进行蚀刻，以限定外部连接端子。图5示出了连接端子的总图，其优选具有部分44(图的左侧)和另一部分46(右侧)，部分44带有分布于焊盘24之上的开口，而部分46则没有开口，保留部分46以焊接连接线。注意，如果各个开口足够小，也可能设想具有整个表面积都包括规则分布的开口的连接端子，之后将线路焊接到包括由开口40生成的起伏的金属表面区域上；于是焊盘24将占据位于连接端子下的表面区域的大部分和全部。
图6示出了下述步骤：完全包围连接端子、穿过外延层的整个厚度蚀刻外围沟槽48，使其抵达绝缘层22。该沟槽在绝缘层22处停止，其并未向下到达金属层的一部分，因而沟槽的底部完全由绝缘表面形成。
接下来的步骤，即图7不是强制性的，但其是优选的。其包括沉积绝缘保护层50，并在导电连接端子的中心之上在该层内形成开口(因此，在提供了没有开口的保留给线路焊接的部分的情况下，其原则上处于端子的部分46内)。绝缘层50填充外围沟槽48。
未示出对滤色器进行沉积和光刻的常规步骤。
最后，在将晶片切割成个体芯片之后，最后的制造步骤将包括将连接线60焊接到连接端子的处于暴露部分上的金属42上(图8)。
在图9的平面图上示出了连接端子的总体外观，所述连接端子具有以层24作为下层的多个接触孔，并且具有不带孔的部分。优选提供几十个小尺寸的孔(具有几微米的直径或侧边)，但是如前所述，在某些情况下单个孔就足够了。
因而，在不需要在沉积连接金属42之前在开口40的侧面上沉积绝缘层的情况下制造了连接端子。金属42与硅接触，但是所述硅通过沟槽与外延层的包括有源电路的其余部分绝缘；因而从集成电路的外部或内部施加至端子的电势不会对电路的其余部分或者其他端子造成影响。
不管是否存在最后的保护层50，均不会因连接端子的存在而妨碍树脂或滤波层的散布。在存在层50时，存在凹处，但是端子的表面和层50的表面之间的高度差小。如果没有层50，那么另外通过金属局部填充的开口40具有小尺寸(具有几微米的侧边尺寸或直径尺寸)，并且不会妨碍所述散布。此外，由于连接端子的表面和周围表面之间不存在凹陷，因而变得有可能将端子的尺寸限制为具有大约50微米到60微米的侧边尺寸，不能将所述限制用于金属表面相对于集成电路的顶表面过深的情况。
优选通过在硅上进行化学腐蚀而形成开口40；于是所述开口具有带有角度的侧面，所述角度对应于硅的自然解理面(55°)。优选通过垂直各向异性腐蚀(等离子体蚀刻)来蚀刻沟槽48，其侧面是竖直的。其宽度可以是几微米(例如，1微米到3微米)。沟槽48并非与开口40同时形成(尽管其在理论上是可能的)，因而在沉积层42时不会使沟槽48受到铝的填充，因为在通过蚀刻限定连接端子时将难以从沟槽的底部去除铝。

Claims (7)

1.一种具有减薄的硅衬底的图像传感器的制造方法，其包括从硅衬底的正面实施的制造步骤，之后将所述正面转移到转移衬底上，之后将所述硅衬底减薄到几微米的厚度，以及最后在所述减薄的硅衬底的背面实施的制造步骤，该方法的特征在于，从所述背面实施的制造步骤包括：
-在为传感器的外部连接端子的制造保留的表面区域上，穿过所述减薄的衬底(12)蚀刻至少一个局部化接触开口(40)，所述开口局部暴露第一导电层(24)，该第一导电层(24)是在从所述正面实施的制造步骤的过程中形成的；
-在所述背面上沉积与所述开口中的硅接触的第二导电层(42)，所述第二层与所述第一层(24)接触；
-蚀刻所述第二层，以限定连接端子；
-穿过所述减薄的硅衬底的整个厚度打开外围沟槽(48)，使其抵达位于该衬底之下的绝缘层(22)，该沟槽完全包围所述连接端子，并且所述沟槽的底部整个由所述绝缘层形成，因而形成了由减薄的硅构成的岛，该岛被所述连接端子覆盖，并且其通过所述沟槽与所述减薄的硅的其余部分绝缘。
2.根据权利要求1所述的方法，其特征在于，将线路(60)焊接至所述连接端子的部分。
3.根据权利要求2所述的方法，其特征在于，焊接有所述线路的所述连接端子的部分(46)没有局部化开口。
4.根据权利要求1到3中的任一项所述的方法，其特征在于，在打开所述沟槽之后，在所述背面上沉积绝缘保护层(50)，并在该层内蚀刻开口，以暴露所述连接端子的表面区域的一部分，线路焊接到该部分。
5.根据前述权利要求中的任一项所述的方法，其特征在于，通过化学蚀刻形成所述局部化开口，并在蚀刻所述第二导电层之后形成所述沟槽。
6.根据前述权利要求中的任一项所述的方法，其特征在于，通过竖直各向异性腐蚀来蚀刻所述沟槽。
7.根据前述权利要求中的任一项所述的方法，其特征在于，穿过所述减薄的衬底蚀刻一系列的局部化开口，这些开口分布在所述第一导电层(24)的导电焊盘之上，该焊盘用于电连接到集成电路的连接端子。
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