CN101226927B - 具有功率放大器的芯片模块及其制作方法 - Google Patents

具有功率放大器的芯片模块及其制作方法 Download PDF

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CN101226927B
CN101226927B CN2008100743210A CN200810074321A CN101226927B CN 101226927 B CN101226927 B CN 101226927B CN 2008100743210 A CN2008100743210 A CN 2008100743210A CN 200810074321 A CN200810074321 A CN 200810074321A CN 101226927 B CN101226927 B CN 101226927B
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CN101226927A (zh
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陈建成
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Advanced Semiconductor Engineering Inc
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Abstract

本发明公开了一种芯片模块及其制作方法。首先，提供基板。然后，装设芯片于基板上，并使芯片电性连接至基板。接下来，装设多个无源元件于基板上，并且环绕芯片。然后填充第一胶体于这些无源元件之间，并与这些无源元件共同定义出封闭区域。然后填充第二胶体于封闭区域并覆盖芯片。

Description

具有功率放大器的芯片模块及其制作方法
技术领域
本发明涉及一种芯片模块及其制作方法，尤其涉及一种具有功率放大器的芯片模块及其制作方法。
背景技术
对于无线通讯产业而言，提高通讯电子产品的可携性是一个发展的趋势，也是提升产品竞争力一个受到重视的课题。为了提升通讯电子产品的可携性，必须设法缩小电子产品的尺寸与重量。基本上，通讯电子产品通常都具有基板。芯片是封装技术安装于基板上。因此，芯片封装结构的大小必然对于影响整个电子产品的尺寸造成影响。
图1为典型无线模块10的示意图。如图中所示，此无线模块10具有基板11、至少一芯片封装结构12、功率放大器芯片13与多个无源元件(passiveunit)14，例如电阻、电感、电容。无源元件14是以表面粘着技术(surfacemount technology，SMT)设置于基板11上。
为了提供高频信号，目前的功率放大器芯片13多使用III/V族半导体芯片，例如砷化镓芯片，取代传统的硅芯片。不过，由于功率放大器芯片13是应用于较为严苛的高频环境，无法直接以倒装焊封装(Flip-Chip)或是无线芯片级(WLCSP)封装的技术封装于基板11上。通常是先将功率放大器芯片贴附于基板11上，并利用导线将功率放大器芯片与基板11相连接，然后再利用封装材料包覆功率放大器芯片。其次，为了避免裸露于外的导线可能成为激发能量的天线，导线也必须以封装材料加以覆盖。
图2A与2B为典型功率放大器芯片的封装结构的剖面图与俯视图。如图中所示，基板110上制作有坝状(dam)结构160环绕功率放大器芯片120。封装材料170填入此坝状结构160所围出的空间内，包覆功率放大器芯片120与导线130，以提供功率放大器芯片120与导线130所需的绝缘保护。值得注意的是，虽然此种封装结构可以将功率放大器芯片120适当地封装于无线模块10中，但是制作坝状结构160时，必须于基板110上预留定空间以供作业，因此，坝状结构160的存在必然会增加封装结构的尺寸，而对产品的可携性造成不利的影响。
因此，本发明提供一种芯片模块及其制作方法，可以将功率放大器芯片120适当地封装于芯片模块内，并且避免封装结构尺寸产生不必要的增加。
发明内容
本发明的主要目的为提供一种芯片模块及其制作方法，可以将功率放大器封装于其中。同时，可以避免为了提供导线所需的绝缘保护，而导致封装结构尺寸的增加。
本发明提供一种芯片模块，包括基板、芯片、多个无源元件(passiveunits)、第一胶体与第二胶体。其中，芯片设置于基板上，并与基板电性连接。多个无源元件设置于基板上，并且环绕芯片。第一胶体填充于这些无源元件之间，并与这些无源元件共同定义出封闭区域。第二胶体填充于此封闭区域并覆盖芯片。
本发明并提供一种芯片模块的制作方法，包括下列步骤：(a)提供基板；(b)装设芯片于基板上，并使芯片电性连接至基板；(c)装设多个无源元件(passive units)于基板上，并且环绕芯片；(d)填充第一胶体于这些无源元件之间，并与这些无源元件共同定义出封闭区域；以及(e)填充第二胶体于封闭区域并覆盖芯片。
关于本发明的优点与精神可以通过以下的发明详述及附图得到进一步的了解。
附图说明
图1为典型无线模块的示意图；
图2A与2B为典型功率放大器封装结构的示意图；
图3、4、5A、5B、6A、6B与7为本发明芯片模块的制作方法一优选实施例的示意图；
图8A与8B为本发明芯片模块的制作方法另一优选实施例的示意图；
图9为本发明芯片模块的制作方法又一优选实施例的示意图；以及
图10为本发明芯片模块的制作方法又一优选实施例的示意图。
附图标记说明
无线模块：10                     基板：11
芯片封装结构：12                 功率放大器芯片：13
无源元件：14                     基板：110
功率放大器芯片：120              导线：130
坝状结构：160                    封装材料层：170
芯片模块：200                    基板：210
粘着层：270                      芯片：220
导线：230                        无源元件：240
第一胶体：250，350，450          第二胶体：260
具体实施方式
图3至图7显示本发明芯片模块200的制作方法一优选实施例。首先，如图3所示，提供基板210。随后，设置粘着层270于基板210上，并将芯片220，例如功率放大器(power amplifier)芯片，设置于此粘着层270上。此芯片220透过粘着层270粘附于基板210上。接下来，如图4所示，设置多条导线230，连接芯片220上表面的接触垫(未示出)与基板210上表面的导电图案(未示出)。使芯片220产生的信号可以透过导线230传递至基板210，再经由基板210向外传递。
然后，如图5A与5B所示，装设多个无源元件(passive units)240于基板210上，并且环绕芯片220。就一优选实施例而言，这些无源元件240可以采用表面粘着技术(surface mount technology，SMT)设置于基板210上。
接下来，如图6A与6B所示，填充第一胶体250于这些无源元件240之间。在本实施例中，第一胶体250完全覆盖各个无源元件240。第一胶体250与这些无源元件240构成环绕芯片220与导线230的封闭区域R。芯片220与导线230位于此封闭区域R内。然后，如图7所示，填充第二胶体260于此封闭区域R内并覆盖芯片220与导线230，使其与外界隔绝。
前述第一胶体250与第二胶体260可以选用不同的材料。就一优选实施例而言，由于第一胶体250填充于无源元件240间以定义出封闭区域R，为了工艺上的便利，第一胶体250最好选用容易成型的粘滞性高的材料。另一方面，为确保第二胶体260可以有效包覆导线230，第二胶体260最好选用流动性佳的材料。因此，所选用的第一胶体250的粘滞性最好是高于第二胶体260。
其次，如图6A与6B所示，在本实施例中，各个无源元件240被完全包埋于第一胶体250中。不过，亦不限于此。如图8A与8B所示，在本发明的另一实施例中，第一胶体350只填充于相邻无源元件240间的空隙。无源元件240的部分侧面与顶面仍然裸露于外。不过，在本实施例中，无源元件240与第一胶体350仍然构成封闭区域容纳芯片220与导线230。
本发明亦不限于制作出封闭区域。如第九图所示，在本发明的又一实施例中，第一胶体450虽然填充至无源元件240间，但是，第一胶体450与无源元件240并未构成封闭区域容纳芯片220与导线230。不过，第一胶体450与无源元件240依然可以定义出一内部空间。在本实施例中，为了避免第二胶体(未示出)溢流至第一胶体450与无源元件240的外侧，宜选用粘滞性较高的材料作为第二胶体。
此外，如图10所示，在本发明的又一实施例中，若是无源元件240的排列够紧密，可以直接利用无源元件240作为屏障，填充第二胶体于这些无源元件240所定义出的区域R’内以完成此封装结构，而不需额外填充第一胶体250于无源元件240间。不过，在本实施例中，为了避免第二胶体溢流至第一胶体450与无源元件240的外侧，宜选用粘滞性较高的材料作为第二胶体。
如图2A与2B所示，传统的封装方式必须制作额外的坝状结构160使安装于基板110上的功率放大器芯片120得以受到保护。此坝状结构160的存在无疑会增加封装结构的尺寸，而对于整个芯片模块的可携性有不利影响。相较之下，本发明利用芯片模块中必不可少的无源元件240与第一胶体250，350，450定义出封闭区域，再填充第二胶体260于此封闭空间内以完成功率放大器芯片220的封装结构。因此，可以省略传统封装方式中额外制作的坝状结构，达到缩小芯片模块的尺寸的目的。
以上所述利用优选实施例详细说明本发明，而非限制本发明的范围，而且本领域技术人员皆能明了，适当而作些微的改变及调整，仍将不失本发明的要义所在，亦不脱离本发明的精神和范围。

Claims (10)

1.一种芯片模块，包括：
基板；
芯片，设置于该基板上，并与该基板电性连接；
多个无源元件，设置于该基板上，并且环绕该芯片；
第一胶体，填充于该无源元件之间，并与该无源元件共同定义出封闭区域；以及
第二胶体，填充于该封闭区域并覆盖该芯片。
2.如权利要求1所述的芯片模块，还包括多条导线，电性连接该芯片与该基板。
3.如权利要求2所述的芯片模块，其中，该第二胶体还包覆该导线。
4.如权利要求1所述的芯片模块，其中，该无源元件包埋于该第一胶体中。
5.如权利要求1所述的芯片模块，其中，该第一胶体的粘滞性高于该第二胶体。
6.一种芯片模块的制作方法，包括：
提供基板；
装设芯片于该基板上，并使该芯片电性连接至该基板；
装设多个无源元件于该基板上，并且环绕该芯片；
填充第一胶体于该无源元件之间，并与该无源元件共同定义出封闭区域；以及
填充第二胶体于该封闭区域并覆盖该芯片。
7.如权利要求6所述的制作方法，还包括设置多条导线，电性连接该芯片与该基板。
8.如权利要求7所述的制作方法，其中，该第二胶体还包覆该导线。
9.如权利要求6所述的制作方法，填充该第一胶体的步骤是将该无源元件包埋于该第一胶体中。
10.如权利要求6所述的制作方法，其中，该第一胶体的粘滞性高于该第二胶体。
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