CN101180794A - 生产震动微机械结构的方法 - Google Patents
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Abstract
使用双晶片过程制造单晶硅微机械谐振器的方法,包括绝缘体上硅(SOI)(104)或绝缘基础晶片和谐振器晶片(108),其中谐振器锚(122,124)、电容气隙(116)、隔离沟(128,130)和校准标记被微机械加工于基础晶片的活性层(114)中;谐振器晶片(124)的活性层直接结合至基础晶片的活性层;除去谐振器晶片的柄层(144)和电介质层(140);观察窗开口于谐振器晶片的活性层中;使用光致抗蚀剂材料掩蔽谐振器晶片的单晶硅半导体材料活性层;使用硅干燥蚀刻微机械加工技术在谐振器晶片的活性层中机械加工单晶硅谐振器;且随后干燥剥离光致抗蚀剂材料。
Description
发明领域
本发明涉及使用绝缘体上硅(Silicon-on-insulator)(SOI)晶片制造微机械谐振器的方法,且特别涉及使用单晶硅晶片材料制造微机械谐振器的方法。
发明背景
如Yoon等在2002年12月3日的美国专利6,490,147“High-QMicromechanical Device and Method of Tuning Same(高Q微机械装置及其调试方法)”(其通过引用结合入本文)中,以及Nguyen等在2001年6月19日的美国专利6,249,073“Device Including a MicromechanicalResonator Having an Operating Frequency and Method of ExtendingSame(包括具有操作频率的微机械谐振器的装置及其扩展方法)”(其通过引用结合入本文)中所公开的,由多晶型硅(公知为多晶硅)形成的震动微机械谐振器已知为多种高Q振荡器和过滤应用中晶体的缩微替代品。现有技术的微机械谐振器制造技术使用多晶硅生产微机械谐振器装置,通过硅牺牲表面微机械加工方式生产。
该使用牺牲表面微机械加工的现有技术生产方法生产实现装置性能的,具有内在应力、应力梯度或两者都有的多晶硅谐振器或其他薄膜谐振器。这些内在应力和应力梯度在生产过程中是难以控制的。然而,这些内在应力和应力梯度的控制对于装置在需要高重复性和再现性的应用中是关键的。
该使用多晶硅的现有技术的生产方法还需要使用湿蚀刻技术除去材料的牺牲层,该蚀刻技术使生产过程复杂并通常由于难以除去谐振器与下部电极之间小隙中的牺牲材料而导致低产率。该使用多晶硅的生产方法还导致静摩擦,其进一步降低产率。
对于例如为补偿制造公差或为调试或为用作可调谐振器和过滤器而要求很小电容气隙的装置,除去牺牲层变得极其困难,因为液体或甚至气体蚀刻技术无法轻易穿透谐振器的下面以形成独立结构(free standing stucture)。为形成电容隙而除去经蚀刻的牺牲材料是是方法及操作的产率限制因素(yield limiter)(对于300埃或更小级别的小气隙而言)。
另外,多晶硅薄膜中存在的杂质降低了装置性能,并且还导致较低的谐振Q。
图1和2分别展示了Yoon等在美国专利6,490,147中所教导的可调电容器10的概念图和透视图。该电容器10具有固定至基底物14的电容器底板12和悬在底板12之上的电容器顶板16。电容器顶板16也锚定于基底物14。板12和16由铜(Cu)构成,以最小化其总串连电阻,目的是最大化装置的品质因子,Q。
电介质板18悬于板12和板16之间,并在板12和板16之外通过弹簧结构20锚定于基底物14。该电介质18通过静电位移而自由移动,以改变其与电容器板12和16之间的交叠或其间的弥散场。在前一种情况下,如图1所示,当DC偏压应用于两板12和16之间时,电容器板12和16上的电荷对电介质18中诱导的电荷施加静电力,以将电介质18拉入板12和16之间的间隙。图2中显示的“格栅结构”形状的电容器10预期将给定的电容变化所要求的移行距离或所需电压最小化,并在通过蚀刻除去薄牺牲层的制造工艺步骤中提供蚀刻剂进入路径。
图3A-3E是侧面剖视图,其表明生产电容器10所描述的类型的微机械谐振器的现有技术的一种制造方法。如Yoon等在美国专利6,490,147中所教导的,现有技术方法开始于用作最后金属结构与硅晶片或基底物32之间的隔离或电介质层的1微米SiO2层30的热生长,见图3A。然后,先蒸发300埃/2000埃Cr/Cu种子层34,再电镀5微米铜(Cu)层36以形成电容器底板12。然后在上述Cu层36上电镀3000埃的镍(Ni)层38,以作为缓冲层来防止Cu在随后的反应性离子蚀刻(RIE)过程中污染蚀刻室。
图3B表明2000埃的第一铝(Al)牺牲层40被蒸发并图案化(patterned)以形成通路(vias),随后的层PECVD氮化物电介质膜42通过该通路连至下面的Ni层38。如图3C所示,氮化物膜42经由RIE图案化以形成可移动的电介质板18,然后沉在0.9微米的第二牺牲Al膜44之下,该Al膜44限定了电介质板18与最后的顶金属板16的间距。由于被蚀刻的电介质的指之间山谷状的表面状况,当顶板16与电介质18接合时,0.9微米的Al层44的沉积实际在顶板16与电介质18之间仅产生0.3微米的隙。
如图3D所示,在蚀刻穿过Al层44的通路以限定顶板锚(显示于图3C中)之后,通过如下方式形成顶板16:首先蒸发薄Cr/Cu种子层46,然后通过限定的光致抗蚀剂材料模子50电镀Cu层48,至厚度足以保证顶板16在所应用的驱动电压下不弯曲。除去PR和PR下的种子层。使用K3Fe(CN)6/NaOH溶液(其攻击Al,但保留Cu和氮化物电介质42不受损伤)选择性蚀刻两个Al牺牲层40和44,以释放电介质42,生成如图3E所示的最终横切面。释放后,通常使用升华或临界点干燥器干燥电容器10,以防止静摩擦。
另外,对于小隙而言,清洁和除去牺牲层是极其困难的,并经常需要使用表面活性剂。
如Nguyen等在美国专利6,249,073中所教导的,图4表明两端自由梁(free-free beam)的、弯曲模式的微机械装置或谐振器52的透视图和电传感(electrical pick off)方案。装置52包括两端自由的微机械弯曲谐振器梁54,在其弯曲节点56处由四个扭转梁58支撑,各扭转梁通过固定接触锚60锚定于基底物59。两端自由谐振器梁54下面的驱动电极62通过应用的AC电压Vi产生静电刺激,并脱离DC偏压的(经Vp)谐振器结构64直接检测输出电流。扭转支持梁58被设计为具有四分之一波长尺度,其实现了将两端自由谐振器梁54与固定锚60分离的阻抗转化。理想地,两端自由谐振器梁54与其支持物或梁58之间为零阻抗,从而有效地运作,如同无任何支持物一样悬浮。结果,大大抑制了通常在之前的两端夹紧(clamped-clamped)梁谐振器中发现的锚耗散机制,实现了高得多的装置Q。然而,多个驱动电极可用于推-拉刺激。电极还可以用于传感、调频和输出检测。
通常,通过用于去除薄牺牲氧化物层的牺牲表面微机械加工方法和用于最终释放弯曲谐振器梁54以形成电容器隙的牺牲层湿蚀刻来完全确定传感器电容器隙间距。
如Nguyen等在美国专利6,249,073中所教导的,图5A和5B表明传感器电容器隙间距,其不完全是如在之前两端夹紧梁高频装置中进行(有难度)的一样,通过薄牺牲氧化物来确定。而是如Nguyen等所教导的,电容器隙66由定时蚀刻设置的间隔物或凹座68的高度确定。凹座68的高度使当足够大的DC偏压Vp应用于驱动电极62和谐振器梁54之间时,整体结构下降并靠凹座68支撑,凹座68位于弯曲节点56。间隔物68形成于谐振器梁54或基底物59之上。
如Nguyen等在美国专利6,249,073中所教导的,使用凹座来设置电容器隙间距66目的是允许使用厚得多的牺牲氧化物间隔物,从而缓解了之前的问题,该问题归因于在传感器电容器隙间距完全由用于去除薄牺牲氧化物的牺牲表面微机械加工确定时,所使用的超薄牺牲层中的针孔和不均匀性。同时,较厚的牺牲氧化物预期比之前较薄的牺牲氧化物更容易除去,减少了所需要的HF释放蚀刻时间,并减少了蚀刻副产物保留于隙66中(副产物在这里可能干扰谐振器操作和Q)的可能性。
如Nguyen等在美国专利6,249,073中所述,图6A、6B和6C表明一现有技术的用于生产微机械谐振器的方法,其中使用美国专利6,249,073中所示的工艺流程所描述的五-掩蔽物、多晶型硅或“多晶硅”、表面微机械加工技术来制造装置52。Nguyen等所教导的制造顺序开始于:在<100>轻微掺杂的p型起始硅晶片74上,分别通过2微米热氧化物和2000埃LPCVD Si3N4的连续的生长和沉积而形成的分离层70和72。然后,在585℃下沉积3000埃的LPCVD多晶硅并通过注入掺杂磷,然后图案化以形成平面64和互连(interconnect)。然后将LPCVD牺牲氧化物层78沉积至计算确定的厚度,之后,连续的掩蔽步骤形成凹座和锚开口80,82。凹座开口82通过必须精确控制的反应性离子蚀刻来产生。锚开口80仅仅在缓冲的氢氟酸(BHF)溶液中湿蚀刻。
然后,在图6B中,结构多晶硅经LPCVD在585℃下沉积,并通过离子注入引入磷掺杂剂,以提供弯曲的谐振器梁54。然后,经LPCVD在900℃下沉积2000埃厚的氧化物掩蔽物,之后,晶片必须在1000℃下退火1小时,以减轻应力并分布掺杂剂。
如图6C中所示例的,牺牲层的湿蚀刻用于最终释放弯曲谐振器梁54,以形成电容器隙66。氧化物掩蔽物和结构层分别通过基于SF6/O2的和基于Cl2的RIE蚀刻来图案化。然后通过5分钟在48.8%重量HF中的蚀刻来释放结构54和58。如Nguyen等在美国专利6,249,073中所教导的,该5分钟释放蚀刻时间显著短于之前的两端夹紧梁谐振器所需要的时间(约1小时),因为如Nguyen等所教导的,其不收益于凹座激活的隙间距。之前两端夹紧的梁谐振器要求牺牲氧化物厚度在数百埃的级别。在由牺牲层的湿蚀刻造成的结构释放后,铝被蒸发,并通过搬离(lift-off)于多晶硅互连(interconnect)上图案化,以减少串联阻抗。
因此,使用多晶硅的现有技术的生产方法生产实现装置性能的具有内在应力、应力梯度或两者都有的谐振器。这些使用多晶硅的现有技术的生产方法还需要使用湿蚀刻技术除去材料的牺牲层,该蚀刻技术使生产过程复杂,并通常由于难以除去谐振器与下部电极之间小隙中的牺牲材料而导致低产率。该使用多晶硅的生产方法还导致静摩擦,其进一步降低产率,并且多晶硅薄膜中存在的杂质降低装置性能并导致较低的谐振器Q。
因此,需要改良的装置和生产方法。
发明概述
使用双晶片过程制造单晶硅(SCS)微机械谐振器的方法,所述双晶片过程包括绝缘体上硅(SOI)或绝缘基础晶片和SOI谐振器晶片,其中谐振器锚、电容气隙、隔离沟、传输线和校准标记被微机械加工于基础SOI晶片的单晶硅半导体材料活性层中。当使用绝缘晶片(例如玻璃、硼硅酸玻璃、石英或氧化硅)实施时,校准标记、电容气隙、传输线和谐振器锚在绝缘晶片上制造,结合使用体和表面微机械加工与金属沉积和蚀刻。谐振器晶片的单晶硅半导体材料活性层直接结合至基础晶片的活性层,使用晶片平面用于校准。除去谐振器晶片的柄和电介质层。根据本发明的一个方面,观察窗开口于谐振器晶片的活性层,以通向基础晶片的活性层中的校准标记。或者,使用常规双面校准器实现校准。用光致抗蚀剂材料掩蔽谐振器晶片的SCS半导体材料活性层;并且使用硅干燥蚀刻微加工技术(例如反应性离子蚀刻(RIE)或深反应离子蚀刻(DRIE))在谐振器晶片的单晶硅半导体材料活性层中制造单晶硅谐振器。随后干燥剥离除去光致抗蚀剂材料。
根据本发明的一个方面,仅使用两个或多个叠加晶片的晶片平面校准来实现用于将谐振器晶片的单晶硅(SCS)半导体材料活性层与基础晶片结合的校准。
根据本发明的另一方面,使用双面校准器实现用于将谐振器晶片的单晶硅(SCS)半导体材料活性层与基础晶片结合的校准。
根据本发明的另一方面,进一步使用常规的光刻法掩蔽和干燥蚀刻微机械加工方法,在基础SOI晶片的活性层中机械加工谐振器梁锚、电容气隙、传输线、隔离沟和校准标记。
根据本发明的另一方面,在绝缘基底物(例如硼硅酸玻璃、玻璃、石英、氧化硅或氮化物)上机械加工谐振器梁锚、电容气隙、传输线、隔离沟和校准标记,使用蚀刻绝缘层和金属沉积以产生这些特征。
根据本发明的另一方面,两个晶片通过熔合结合、阳极结合或烧结结合方法而结合。
根据本发明的另一方面,在谐振器晶片的单晶硅半导体材料活性层中硅干燥蚀刻机械加工单晶硅谐振器梁,形成单晶硅两端夹紧的谐振器梁。
根据本发明的另一方面,在谐振器晶片的单晶硅半导体材料活性层中硅干燥蚀刻机械加工单晶硅谐振器梁,形成单晶硅一端夹紧(clamped-free)的谐振器梁。
根据本发明的另一方面,在谐振器晶片的单晶硅半导体材料活性层中硅干燥蚀刻机械加工单晶硅谐振器梁,形成单晶硅两端自由的谐振器梁。
根据本发明的另一方面,在谐振器晶片的单晶硅半导体材料活性层中硅干燥蚀刻机械加工单晶硅谐振器梁,形成单晶硅膜或片(disc)。
根据本发明的另一方面,单晶硅两端夹紧谐振器梁是互连的双重谐振器,构成该互连的双重谐振器以形成过滤器装置。
根据本发明的一方面,单晶硅晶片机械谐振器构成两端夹紧的互连双重梁谐振器,用作过滤器。
根据本发明的另一方面,单晶硅晶片机械谐振器构成一端夹紧的互连双重梁谐振器,用作过滤器。
根据本发明的另一方面,单晶硅晶片机械谐振器构成两端自由的互连双重梁谐振器,用作过滤器。
根据本发明的另一方面,单晶硅晶片机械谐振器构成一片或多片互连的谐振器,用作过滤器。
根据本发明的另一方面,使用本发明方法提供了由单晶硅晶片材料构成的改良的微机械谐振器。
附图简述
本发明的前述方面和许多伴随的优点将变得更加容易理解,因为其通过参考以下详述,并结合附图时,更好理解,其中:
图1和2分别展示了Yoon等在美国专利6,490,147中所教导的现有技术的可调电容器的概念图和透视图;
图3A-3E是侧面剖视图,其表明用于图1和2中所示例的电容器的一种现有技术的制造方法,如Yoon等在美国专利6,490,147中所教导的;
图4表明两端自由梁的、弯曲模式的、微机械装置或谐振器的透视图和电传感方案,如Nguyen等在美国专利6,249,073中所教导的;
图5A和5B表明现有技术的传感器电容器隙间距,如Nguyen等在美国专利6,249,073中所教导的;
图6A、6B和6C表明一现有技术的生产方法,使用了如Nguyen等在美国专利6,249,073中教导的工艺流程所描述的五-掩蔽物、多晶硅、表面微机械加工技术。
图7是横截面视图,其表明本发明的由两个结合的绝缘体上硅(SOI)晶片元件形成的微机械谐振器装置的结构;
图8是具有埋入的电介质层的SOI基础晶片元件的横截面视图,所述电介质层夹于相对较厚的半导体材料柄和较薄的活性层之间;
图9是本发明SOI基础板的横截面视图,并表明形成于SOI基础晶片元件的活性层中的电容气隙;
图10是本发明SOI基础板的另一横截面视图,并表明SOI基础晶片元件的半导体材料活性层的微机械加工,从而形成结构特征;
图11是安置有SOI谐振器晶片元件的本发明SOI基础板的侧视图;
图12是具有SOI谐振器晶片元件的本发明微机械谐振器装置的横截面视图,所述谐振器晶片元件被机械加工以形成微机械硅谐振器和可能需要的附加的有用特征;和
图13是具有单晶硅谐振器的本发明一个装置的部分平面图,所述单晶硅谐振器为具有第一和第二单晶硅谐振器梁的两端夹紧的双梁谐振器,所述单晶硅谐振器梁与连梁(coupling beam)相连以形成过滤器装置。
优选实施方案的详述
在附图中,同样的数字代表同样的元件。
本发明是使用双晶片过程制造微机械谐振器的装置和方法,所述双晶片过程包括绝缘体上硅(SOI)基础晶片和SOI谐振器晶片,或者绝缘基础晶片和单晶硅(SCS)或SOI谐振器晶片。
图7是横截面视图,其表明本发明的由形成于SOI基础晶片104中的SOI基础板102和形成于SOI谐振器晶片108(示于后图并描述于下文)中的单晶硅微机械谐振器106所形成的微机械谐振器100的构造。SOI基底和谐振器晶片是一般商业可获得的类型。SOI基础晶片元件104包括埋入的通常厚度约0.5微米至2.0微米的电介质层110,其夹于相对较厚的“柄”层和“活性”层112、114之间,两者都为单晶硅(SCS)半导体材料。
谐振器106位于电容气隙116之上,其中谐振器106可面外移动。单晶硅谐振器106在末端118,120处直接地与形成于基础晶片104的活性层114中的单晶硅锚122,124直接结合或熔合结合,从而其在两端结合至基础板102,以提供两端夹紧类型的谐振器。如现有技术已知的,这种两端夹紧类型的谐振器相对容易实现小质量和高硬度。这对通信级谐振器而言是首要的,因为硬度直接影响使用这种谐振器的电路的动态范围。
根据本发明的一个实施方案,当基础晶片104为SOI晶片时,谐振器106直接结合或熔合结合至SCS锚122,124。或者,谐振器106烧结结合至SOI基础晶片104的SCS锚122,124。
根据本发明的另一实施方案,当基础晶片104为本文描述类型的绝缘基底时,谐振器106阳极结合或烧结结合至锚122,124。
与多晶膜(例如多晶硅等)相比较,用于谐振器106的单晶硅(SCS)半导体材料是用于微谐振器的更好的结构材料,因为SCS半导体材料表现出较低的内部摩擦和由此产生的较高的机械Q、较低的内部应力并独立于各种过程参数。
图8是具有埋入的电介质层110的SOI基础晶片104的横截面视图,所述电介质层110夹于相对较厚的SCS半导体材料柄层和活性层112,114之间,藉此形成SOI基础板102。
图9是SOI基础板102的横截面视图,表明由光刻法生成的校准标记132和SCS活性层114的蚀刻。校准标记132用于在活性层114上参考校准,并用于以后SOI谐振器晶片108的校准。电容气隙116也形成于SOI基础晶片104的活性层114中。所述在活性层114中形成电容气隙116与现有技术的两端夹紧、一端夹紧和两端自由梁高频装置(其中传感器电容器隙间距通过除去薄牺牲层来确定)形成直接对比。使用例如但不限于常规光刻法掩蔽和湿蚀刻技术来机械加工活性层114。或者,使用干燥蚀刻方法机械加工活性层114,例如RIE(反应性离子蚀刻)或DRIE(深反应离子蚀刻)方法。例如,这种方法包括商业上称为“BOSCH”和“ALCATEL”的深沟干燥硅蚀刻方法,RIE和DRIE方法都获得了蚀刻特征的大致垂直的侧壁,且不考虑蚀刻基底的结晶取向,从而得到更紧凑的MEMS装置,因而使得每个晶片能制造更多的装置,以产生显著的成本优势。
例如但不限于,使用氮化硅沉积机械加工活性层114,使用光致抗蚀剂掩蔽材料在其上形成光刻图案,随后蚀刻氮化硅并剥离光致抗蚀剂以在活性层114上形成氮化硅掩蔽物,且具有形成掩蔽图案的沟。氧化硅通过热氧化在沟中生长。进行氧化硅/氮化硅蚀刻以生成气隙116,该气隙为基础板活性层114中具有非常精确深度的凹进部分。形成气隙116的凹进部分的精密度比使用光致抗蚀剂作为牺牲材料更精确。与现有技术的湿蚀刻方法相反,本发明方法能够提供精确的且非常小的电容器气隙116,因为间距仅由氧化而非光致抗蚀剂材料的湿蚀刻来控制。气隙116的深度是根据具体应用的设计和性能参数而定的。可使用该技术获得几埃级别的精确凹陷的气隙116。根据本发明的一个实施方案,热氧化和随后的蚀刻用以在基础板活性层114中形成约300的凹进部分。
图10是SOI基础板102的另一横截面视图,并表明SOI基础晶片元件104的半导体材料活性层114的微机械加工,从而形成结构特征。例如,形成谐振器锚122,124,用于相对于气隙116支持谐振器106,还形成传输线126,该传输线的结构图案与谐振器106相配合。形成一个或多个隔离沟128,130,其达到埋入的电介质层110,用于电隔离不同的锚122,124和结构特征的RF传输线126。通过使用光刻法图案化的光致抗蚀剂掩蔽材料来图案化这些特征,随后进行硅蚀刻(例如RIE或DRIE),所述硅蚀刻停止于SOI基础晶片104中埋入的氧化物电介质层110,从而形成锚122,124、传输线126和隔离沟128,130。然后除去光致抗蚀剂掩蔽材料,并清洁所得的SOI基础板102。
图11是与SOI谐振器晶片108熔合结合并安置的SOI基础晶片104的侧视图。SOI谐振器晶片元件108包括埋入的厚度约0.4微米或更薄至约2.0微米的电介质层140,其夹于相对较厚的“活性”层和“柄”层142,144之间,两者都为半导体材料。
SOI谐振器晶片108(处于尚未图案化的状态)垂直倒转,使其活性层142面向SOI基础晶片104的活性层114,所述SOI基础晶片104的活性层114具有由电容气隙特征116分离的谐振器锚特征122,124、RF传输线特征126、分离沟特征128,130和校准标记特征132。未图案化的并倒转的SOI谐振器晶片108用SOI基础晶片104进行平面校准,使用两个晶片的主平面或次平面。SOI谐振器晶片108仅需要平面校准,因为其尚未图案化,以致现有技术要求的精确校准是不必要的。
图12是具有SOI谐振器晶片108的本发明微机械谐振器装置100的横截面视图,所述谐振器晶片108被微机械加工以形成微机械硅谐振器106和可能需要的附加的有用特征。柄层144和内部氧化物电介质层140从SOI谐振器晶片元件108的活性层142剥离。根据本发明的一个实施方案,使用光刻法和硅蚀刻,蚀刻一个或多个窗148,以开放通向基础晶片104的活性层114上的校准标记132的通路。窗148比校准标记132大并与其对准。校准标记132用于随后对SOI谐振器晶片活性层142的光刻法校准步骤。
虽然校准窗导致更好的校准准确度,但校准任选由另一方法完成。或者,例如,在SOI基础晶片102的背面149中形成校准标记物132′,并用于前后(front to back)校准。下一步骤包括在一个或多个接触垫150的选定位置对活性层142掺杂磷,随后进行常规的金属沉积,用于沉积金属(如金和铝),以形成接触垫150和基础晶片104背面上用于接地的金属(如金或铝)沉积。
使用观察窗148来相对SOI谐振器晶片元件108上的校准标记132校准,或使用另一校准方法,通过光刻法使用光致抗蚀剂掩蔽材料来图案化活性层142。因此,消除了现有技术方法对精确熔合结合校准的要求。使用RIE或DRIE机械加工来对活性层142进行硅干燥蚀刻,以形成活性层142中的单晶硅谐振器106。因此,与释放谐振器的现有技术方法相反,本发明不要求湿蚀刻释放,因为没有为释放本发明的硅谐振器106而除去牺牲层。光致抗蚀剂掩蔽材料被干燥剥离,由此微机械谐振器装置100释放。
当通过熔合结合或直接结合而连接时,界面146将单晶硅谐振器106结合至SOI基础板102的单晶硅锚特征122,124。因此,根据本发明的任一实施方案,谐振器106由单晶硅形成。相应地,本发明实现了优于现有技术的几个优点。装置谐振器106为单晶硅。与现有技术的多晶硅谐振器相比较,单晶谐振器106导致较高的Q且不含有任何存在于多晶硅或“多晶硅”薄膜中或其他材料薄膜中降低装置性能的杂质。单晶硅用于谐振器106还消除了影响基于多晶硅谐振器的现有技术装置性能的内在应力和应力梯度,其对于在要求高重复性和再现性的应用中使用的装置而言是关键的性质。谐振器106的干燥蚀刻释放和余下的光致抗蚀剂掩蔽材料的干燥剥离消除了现有技术方法的牺牲表面湿蚀刻微机械加工,该加工使现有技术生产方法复杂且通常由于难以除去谐振器与下部电极之间小隙中的牺牲材料而导致低产率,并导致进一步降低产率的静摩擦或粘附。与现有技术方法不同,在基础晶片104的活性层114中形成电容气隙116,导致精确的深度控制和非常小的电容器气隙116。倒转的SOI谐振器晶片108的活性层142适当地置于基础板102上,微机械加工谐振器106,这样消除了精确熔合结合校准的必要,且取而代之的是仅靠视觉,通过观察窗148进行的更简单的平面校准。
根据本发明的实施方案,其中基础晶片104是单晶硅SOI晶片,其导致比现有技术已知的锚更坚硬的单晶硅锚122,124。当通过熔合结合连接时,界面146将谐振器106结合至SOI基础板102的具有锚特征122,124的单晶硅。因此,根据本发明的该熔合结合的实施方案,谐振器106和锚122,124被结合成由均一的单晶硅形成的完整单元。因此,本发明该熔合结合的实施方案实现了超过现有技术的其他优点。装置谐振器106与支持锚122,124整合,以致消除了现有技术装置中产生于材料差异和热膨胀系数差异的界面应力。因此,与现有技术的多晶硅谐振器梁不同,本发明整合的单晶谐振器106和支持锚122,124消除了多晶硅谐振器与下面的硅支持锚的界面处的热梯度和内在应力,所述热梯度和内在应力出现于现有技术装置中并降低装置性能。
图13是具有单晶硅谐振器106的本发明一个示例性装置100的部分平面图,所述单晶硅谐振器106为具有第一和第二单晶硅谐振器梁152,154的两端夹紧的双梁谐振器,所述单晶硅谐振器梁152,154与连梁156相连以形成过滤器装置。根据本发明的方法,第一和第二谐振器梁152,154通过熔合结合、阳极结合或共熔结合连接至SOI基础板102的单晶硅支持锚122,124,从而装置100能够同时获得高Q和高硬度,其对于通信级谐振器而言是首要的。
或者,单晶硅谐振器106为单晶硅一端夹紧谐振器梁、两端自由谐振器梁或单晶硅膜或片。
根据本发明的一个实施方案,两端夹紧谐振器106是互连的双谐振器,构成该互连的双谐振器以用作过滤器装置。
根据本发明不同的实施方案,单晶硅晶片机械谐振器106构成一端夹紧的互连双梁谐振器,其构成用作过滤器装置。
或者,单晶硅晶片机械谐振器106构成两端自由的互连双梁谐振器,其构成用作过滤器装置。
或者,单晶硅晶片机械谐振器106构成单片或多片互连谐振器,其构成用作过滤器装置。
根据本发明的不同实施方案,SOI谐振器晶片108的活性层142熔合结合至SOI基础晶片元件104的活性层114,成为单个基底,其被微机械加工以生成谐振器106,例如但不限于第一和第二单晶硅谐振器梁152,154,其与SOI基础板102的单晶硅支持锚122,124整合。所得到的装置100提供了现有技术单晶硅谐振器的全部优点,而且还提供了在形成单个整合基底的谐振器梁152,154和支持锚122,124中固有的附加优点。
根据本发明不同的实施方案,基础晶片104是绝缘晶片类型基底,其中使用湿和/或干燥蚀刻技术通过体微蚀刻在绝缘基底中蚀刻气隙116和校准标记132,132′。使用金属沉积,在基底物上的蚀刻穴内形成传输线,例如,通过E梁金属沉积或溅射。使用阳极结合或烧结结合,任选将玻璃或绝缘晶片类型的基底物结合至梁SOI晶片108。这样的实施方案也导致为单晶硅的谐振器106,从而实现本文讨论的优点。
虽然已经示例并描述了本发明的优选实施方案,但应该理解,可以进行各种改变且不脱离本发明的精神和范围。
Claims (10)
1.一种形成震动梁微机械结构(100)的方法,该方法特征为:
在基础基底物(104)中形成邻近电容气隙(116)的一个或多个谐振器锚(122,124);
将绝缘体上硅谐振器晶片(108)的单晶硅半导体材料活性层(142)结合至所述基础基底物(104)的谐振器锚(122,124),所述绝缘体上硅谐振器晶片(108)在半导体材料柄层(144)和半导体材料活性层(142)之间具有电介质层(140);
除去所述绝缘体上硅谐振器晶片(108)的柄层和电介质层(144,140);和
在所述绝缘体上硅谐振器晶片(108)的单晶硅半导体材料活性层(142)中硅干燥蚀刻机械加工单晶硅谐振器(106)。
2.权利要求1的方法,其中所述基础基底物(104)进一步特征为,该基础基底物(104)是绝缘体上硅基础晶片;并且
其中所述绝缘体上硅谐振器晶片(108)的活性层(142)与所述绝缘体上硅基础晶片(104)的活性层(114)的结合的进一步特征为,结合方法选自如下结合方法:二者的直接结合方法、熔合结合方法、烧结结合方法和低温结合方法。
3.权利要求1的方法,其中所述基础基底物(104)进一步特征为,该基础基底物(104)是绝缘晶片;并且
所述绝缘体上硅谐振器晶片(108)的活性层(142)与所述基础基底物(104)的谐振器锚(122,124)的结合的进一步特征为,结合方法选自如下结合方法:二者的阳极结合方法、共熔结合方法、热压结合方法、粘合结合方法和低温结合方法。
4.前述权利要求任一项的方法,其中在第二绝缘体上硅晶片(108)的单晶硅半导体材料活性层(142)中硅干燥蚀刻机械加工单晶硅谐振器(106)的进一步特征为,反应性离子蚀刻和深反应离子蚀刻之一。
5.前述权利要求任一项的方法,其中在所述绝缘体上硅谐振器晶片(108)的单晶硅半导体材料活性层(142)中硅干燥蚀刻机械加工单晶硅谐振器(106)的进一步特征为,使用光致抗蚀剂材料掩蔽和随后干燥剥离所述光致抗蚀剂材料。
6.前述权利要求任一项的方法,其中形成所述电容气隙(116)和一个或多个谐振器锚(122,124)的进一步特征为,体和表面微机械加工与金属沉积和蚀刻的结合。
7.权利要求1的方法,其进一步特征为,在所述基础基底物(104)中形成一个或多个校准标记(132);并且
在所述绝缘体上硅谐振器晶片(108)的活性层(142)中形成一个或多个窗(148),以便用所述基础基底物(104)中的一个或多个校准标记(132)进行校准。
8.权利要求1的方法,其中在所述绝缘体上硅谐振器晶片(108)的单晶硅半导体材料活性层(142)中硅干燥蚀刻机械加工单晶硅谐振器(106)的进一步特征为,使用双面校准器进行校准。
9.权利要求1的方法,其中在所述绝缘体上硅谐振器晶片(108)的单晶硅半导体材料活性层(142)中硅干燥蚀刻机械加工单晶硅谐振器(106)的进一步特征为,机械加工单晶硅谐振器(106),用作两端夹紧谐振器梁、一端夹紧谐振器梁、两端自由谐振器梁、单晶硅膜和单晶硅片其中之一。
10.权利要求9的方法,其进一步特征为,在所述基础基底物(104)中机械加工一个或多个传输线(126);并且
其中机械加工单晶硅谐振器(106)的进一步特征为,机械加工构成过滤装置的单晶硅谐振器。
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CN113316486A (zh) * | 2018-11-16 | 2021-08-27 | 维蒙股份公司 | 电容式微机械超声换能器及其制造方法 |
CN114730154A (zh) * | 2019-09-16 | 2022-07-08 | 里什蒙国际公司 | 在晶片中制造多个谐振器的方法 |
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US7836574B2 (en) | 2010-11-23 |
EP1861926A1 (en) | 2007-12-05 |
EP1861926B1 (en) | 2008-12-03 |
DE602006004019D1 (de) | 2009-01-15 |
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