CN101123200A - Stage for plasma processing apparatus, and plasma processing apparatus - Google Patents
Stage for plasma processing apparatus, and plasma processing apparatus Download PDFInfo
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- CN101123200A CN101123200A CNA2007101403870A CN200710140387A CN101123200A CN 101123200 A CN101123200 A CN 101123200A CN A2007101403870 A CNA2007101403870 A CN A2007101403870A CN 200710140387 A CN200710140387 A CN 200710140387A CN 101123200 A CN101123200 A CN 101123200A
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- dielectric layer
- plasma
- mounting table
- high frequency
- processing apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6831—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using electrostatic chucks
- H01L21/6833—Details of electrostatic chucks
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
Abstract
The invention relates to a carrying table for the plasma treatment device and a plasma treatment device of the carry table, which can improve the in-plane uniformity of the electric field strength in the plasma and process a plasma treatment with a high in-plane uniformity to the substrate. The carrying table for the plasma treatment device comprises: a conductor member of a lower electrode for generating the plasma; a dielectric layer to apply a high frequency electric field to the plasma from a treated substrate (wafer W), which covers the upper central portion of the conductive parts; and a electrostatic chuck laminated on the dielectric layer, provided with a plurality of electrode film which are isolative mutually in the redial direction of the carrying table with the high frequency passing through. The outer edge of the dielectric layer is arranged just under the inner edge of the insulated area of the divided electrode films or closed to the outside. The divided electrode films are insulated mutually relative to the high frequency.
Description
Technical field
The present invention relates to the mounting table that processed substrates such as semiconductor wafer that mounting is implemented plasma treatment are used, and the plasma processing apparatus with this mounting table.
Background technology
In the manufacturing process of semiconductor device, major part is this operations that will handle gaseous plasmaization, carry out processing substrate such as dry etching or ashing.In the plasma device that carries out this processing, use mostly as lower device, by at the relative electrode of a pair of for example parallel flat shape of configuration up and down, and between electrode, apply high frequency, processing gaseous plasmaization with gatherer, on processed substrates such as the semiconductor wafer of mounting on the lower side electrode (below, abbreviate wafer as), implement to handle the device that waits this type then.
Recently, in plasma treatment, require ion energy in the plasma low and processing " low-yield, high-density plasma " that electron density is big is more and more.Therefore, the frequency that produces the high frequency of plasma is compared with present (for example about tens MHz), becomes for example 100MHz sometimes, and is very high.Yet, if the frequency of high frequency is risen, be equivalent to the field that electrode surface central authorities are wafer central authorities so, the electric field strength grow, and on the other hand, the electric field strength of its periphery but has the trend that dies down.So, if the skewness of electric field strength, the plasma electron density of Chan Shenging also will become inhomogeneous so.Because the position different disposal speed in the wafer etc. are also different, so can't obtain the good result of inner evenness.
For this problem, patent documentation 1 has proposed a kind of plasma processing apparatus, and its dielectric layer with pottery etc. is embedded in for example side's electrode apparent surface middle body, and electric-field intensity distribution is become evenly, improves the inner evenness of plasma treatment.
About burying underground of this dielectric layer, utilize Figure 13 (a) to describe.If high frequency electric source 93 applies high frequency to the lower electrode 91 of plasma processing apparatus 9, then propagate and arrive the high frequency on top on the surface of lower electrode 91 by kelvin effect, along the surface current of wafer W to central authorities, simultaneously, a part is leaked to lower electrode 91 sides, flows to the outside then in lower electrode 91.Here, at the position that is provided with the dielectric layer 94 of plasma homogenizing, high frequency slips into deeplyer than other positions, produce the cavity cylinder resonance of TM pattern, as a result, can reduce the electric field of the middle body of supplying with to plasma from the wafer W face, thereby make the electric field in the wafer W face even.In addition, 92 among the figure represents upper electrode, and PZ represents plasma.
, how plasma treatment carries out under reduced pressure the vacuum.In this case, shown in Figure 13 (b), use electrostatic chuck 95 fixed wafer W more.Electrostatic chuck 95 has, below for example aluminium oxide etc. forms by spraying plating between two dielectric layers of side and upper face side, and the structure of clamping the electrode film 96 of conductivity.So, apply high voltage DC power by high-voltage DC power supply 97 to this electrode film 96, utilize the Coulomb force that generates on the dielectric layer surface, the Electrostatic Absorption wafer W, and fix.
Yet, if on be embedded with the lower electrode 91 that reduces the dielectric layer 94 that plasma potential uses, electrostatic chuck 95 is set, carries out the plasma treatment of wafer W, then high frequency can not see through the electrode film 96 of electrostatic chuck 95, flows to the outside at electrode film 96.In other words, because the electrode film 96 that electrostatic chuck is used exists, plasma and dielectric layer 94 are isolated, can not bring into play the effect of the plasma potential that reduces the zone that is embedded with electrostatic chuck 95.As a result, because the plasma potential of the central portion of wafer W top raises, the current potential of periphery reduces, and the central portion of wafer W is different with the processing speed of periphery, thereby becomes in the plasma treatment of etching etc. uneven main cause in the face.
Patent documentation 1: TOHKEMY 2004-363552 communique, the 15th page the 84th section～the 85th section.
Summary of the invention
The present invention is based on the problems referred to above and propose, purpose is, a kind of inner evenness that can improve the electric field strength in the plasma is provided and can carries out the mounting table that the plasma processing apparatus of the higher plasma treatment of inner evenness is used substrate, and the plasma processing apparatus that possesses this mounting table.
The mounting table that the plasma processing apparatus that the present invention relates to is used is to be used for mounting table that the plasma processing apparatus of processed substrate-placing on mounting surface used, it is characterized in that, comprising:
The electric conductor parts are connected in high frequency electric source, and double as is the electrode that the ion in plasma generation usefulness or the plasma is introduced usefulness;
Dielectric layer is provided with in the mode of the upper central portion that covers these electric conductor parts, is used to make by processed substrate even to the high-frequency electric field that plasma applies; And
Electrostatic chuck, lamination can be embedded with by mode therebetween with high frequency and upwards to isolate mutually in the footpath of mounting table and be divided into a plurality of electrode films on this dielectric layer, wherein,
The outward flange of above-mentioned dielectric layer, be positioned at area of isolation internal edge between divided electrode film under or position more in the outer part,
Divided electrode film is with respect to the high frequency mutually insulated.
Moreover, above-mentioned dielectric layer, so that more down outward flange is offside in the mode lamination multilayer of inboard, above-mentioned electrode film cut apart number, become than the number of plies of dielectric layer Duo at least one also passable.
In addition, in the mounting table of same type, have and burying the electrostatic chuck that forms the electrode film of porose portion in the position corresponding to the mounting table central portion underground, above-mentioned dielectric layer can be positioned at the below of this hole portion.
Here, above-mentioned dielectric layer forms cylindric, and under the situation of the cavity cylinder resonance that produces the TM pattern, the thickness of its periphery can be less than central portion.In addition, the frequency of the High frequency power of supplying with from high frequency electric source is preferably more than the 13MHz.
According to the present invention, by between the electrode film of cutting apart, area of isolation being set, or on electrode film, form hole portion in position corresponding to the mounting table central portion, the high frequency of propagating on the processed substrate of wafer etc. just can pass these area of isolation and hole portion.Pass these regional high frequencies, the cavity cylinder resonance of TM pattern is produced, make the below of slipping into dielectric layer become possibility, dielectric layer is used to make that to put on the high-frequency electric field of plasma by processed substrate even.The result, be provided with under the situation of electrostatic chuck, utilize above-mentioned dielectric layer that the cavity cylinder resonance of TM pattern is produced, so can reduce the electric field of the middle body of supplying with to plasma from the face of processed substrate, that is to say, can make the big zone of electric field strength of electric-field intensity distribution of mountain shape smooth.As a result, can improve for example inner evenness of etch processes of plasma treatment.
Description of drawings
Fig. 1 is the vertical disconnected side schematic view of an example with plasma processing apparatus of the mounting table that first execution mode of the present invention relates to.
Fig. 2 is the vertical disconnected side schematic view of an example of the mounting table that relates to of first execution mode.
Fig. 3 be the explanation electrostatic chuck electrode film shape and reduce the schematic diagram of shape etc. of the dielectric layer of plasma potential.
Fig. 4 is the schematic diagram of the effect of the mounting table that relates to of execution mode.
Fig. 5 is the explanation schematic diagram of the variation of the mounting table that relates to of first execution mode.
Fig. 6 is the vertical disconnected side schematic view of an example of the mounting table that relates to of second execution mode.
Fig. 7 is the explanation schematic diagram of an example of lamination mounting table that the multilayer dielectric layer is arranged.
Fig. 8 is the explanation schematic diagram of the variation of the electrode film that relates to of execution mode.
Fig. 9 is the explanation schematic diagram of the variation of the dielectric layer that relates to of execution mode.
Figure 10 is the vertical disconnected side schematic view of formation of each mounting table that carries out the simulation of electric-field intensity distribution.
Figure 11 is the characteristic schematic diagram for the result who confirms the embodiment that effect of the present invention is carried out.
Figure 12 is the characteristic schematic diagram for the result who confirms the embodiment that effect of the present invention is carried out.
Figure 13 is the key diagram that the existing example of the plasma processing apparatus with mounting table is described.
[symbol description]
PZ: plasma
W: wafer
1: plasma processing apparatus
2: mounting table
9: plasma processing apparatus
11: container handling
11a: upper chambers
11b: bottom compartment
12: exhaust outlet
13: blast pipe
14: exhaust apparatus
15: move into and take out of mouth
16: gate valve
17; Supported box (case)
18: dividing plate
21: lower electrode
21a: supporting station
22: dielectric layer
22a: first dielectric layer
22b: second dielectric layer
23: electrostatic chuck
23a: dielectric film
23b: electrode film (first electrode film)
23c: area of isolation (first area of isolation)
23d: electrode film (second electrode film)
23e: second area of isolation
23f: third electrode film
24: insulating element
25: through hole
26: refrigerant flow path
27: gas flow path
28: focusing ring
31: upper electrode
32: the gas supply hole
33: gas introduction tube
35: handle the gas supply source
41a: high frequency electric source (first high frequency electric source)
41b: high frequency electric source (second high frequency electric source)
42a, 42b: adaptation
43a, 43b: high impedance circuit
44: switch
45: resistance
46: high-voltage DC power supply
47a, 47b: multipole ring magnet
91: lower electrode
92: upper electrode
93: high frequency electric source
94: dielectric layer
95: electrostatic chuck
96: electrode film
97: high-voltage DC power supply
Embodiment
With reference to Fig. 1, illustrate that the mounting table that will the present invention relates to is applied to as the execution mode in the plasma processing apparatus of Etaching device.Fig. 1 is RIE (Reactive Ion Etching: plasma processing apparatus 1 example reactive ion etching).Plasma processing apparatus 1 comprises: for example become the container handling 11 that the vacuum chamber of confined space constitutes by inside; The mounting table 2 that sets in the bottom surface of this container handling 11 central authorities; And the upper electrode 31 that above mounting table 2, is being provided with in the mode relative with this mounting table 2.
Container handling 11 comprises upper chambers 11a cylindraceous and the big bottom compartment 11b cylindraceous of diameter that diameter is little.Upper chambers 11a and bottom compartment 11b interconnect, and entire process container 11 constitutes airtightly.In upper chambers 11a, accommodate mounting table 2 and upper electrode 31.In bottom compartment 11b, accommodate supporting mounting table 2 and accommodate the supported box 17 of pipe arrangement etc.The exhaust outlet 12 of bottom compartment 11b bottom surface is connected with exhaust apparatus 14 via blast pipe 13.This exhaust apparatus 14 is connected with the pressure adjustment part that does not show among the figure, and this pressure adjustment part to carrying out vacuum exhaust in the entire process container 11, is kept desired vacuum degree according to the signal from the control part that does not show among the figure.On the other hand, be provided with in the side of upper chambers 11a as moving into of the wafer W of processed substrate and take out of mouthfuls 15, this is moved into and takes out of mouthfuls 15 and can open and close by gate valve 16.Container handling 11 is made of electroconductive components such as aluminium, and ground connection.
The structure of mounting table 2 is, begin successively from the below that lamination has, the electrostatic chuck 23 that generates the lower electrode 21 of usefulness, uses for dielectric layer 22 that the electric field adjustment is evenly buried underground in the mode of the upper central portion that covers lower electrode 21 and fixed wafer W as the plasma of the electric conductor parts that form by for example aluminium.Lower electrode 21 is fixed on the supporting station 21a that is arranged on the supported box 17 via insulating element 24, becomes the electric fully state that floats with respect to container handling 11.
Be formed with the refrigerant flow path 26 of cold-producing medium circulation usefulness in lower electrode 21, flow through this refrigerant flow path 26 by cold-producing medium, lower electrode 21 is cooled, so the wafer W of institute's mounting is cooled to desired temperature on mounting surface.
In addition, electrostatic chuck 23 is provided with through hole 25, the rear portion gas (backsidegas) of the heat conductivity that the heat conductivity between this through hole release raising mounting surface and the wafer W back side is used.This through hole 25 is communicated in and waits the gas flow path 27 that forms in lower electrode 21, via this gas flow path 27, and the rear portion gas of the helium (He) that the gas supply part that release does not show from figure is supplied with etc.
In addition, lower electrode 21 respectively by adaptation 42a, 42b be connected with supply with frequency for example be 100MHz high frequency the first high frequency electric source 41a and supply with the second high frequency electric source 41b of the high frequency of the low for example 3.2MHz of the frequency ratio first high frequency electric source 41a.From the high frequency that the first high frequency electric source 41a supplies with, performance is with the effect of processing gaseous plasmaization described later.From the high frequency that the second high frequency electric source 41b supplies with, performance applies the effect that biasing electric power is also guided to the ion in the plasma wafer W surface thus to wafer W.
And peripheral part on lower electrode 21 disposes focusing ring 28 in the mode of surrounding electrostatic chuck 23.Focusing ring 28 plays the effect of the plasmoid of the peripheral outer region of adjusting wafer W, plays and for example plasma is expanded also broadlyer than wafer W, the inhomogeneity effect that improves the etching speed in the wafer face.
The outside, bottom at supporting station 21a is provided with dividing plate 18 in the mode of surrounding mounting table 2.Dividing plate 18 makes the processing gas in the upper chambers 11a flow into bottom compartment 11b via the space that forms between dividing plate 18 and upper chambers 11a wall portion, thus, works as adjusting the cowling panel of handling gas flow.
In addition, upper electrode 31 forms hollow form, for example evenly is formed with dispersedly in its lower section to disperse to supply with in container handling 11 to handle a plurality of gas supply holes 32 that gas is used, and thus, constitutes the gas spray head.The upper central of upper electrode 31 is provided with gas introduction tube 33, and this gas introduction tube 33 connects the upper central of container handling 11, is connected with processing gas supply source 35 in the upstream.This handles gas supply source 35, has the controlling organization of the processing gas delivery volume that does not show among the figure, processing gas delivery volume that can article on plasma body processing unit 1 give disconnected and increase and decrease is controlled.In addition, by upper electrode 31 being fixed on the wall portion of upper chambers 11a, between upper electrode 31 and container handling 11, form conductive path.
And, around upper chambers 11a, move into take out of mouthfuls 15 about, dispose two multipole ring magnet 47a, 47b.Dispose multipole ring magnet 47a, 47b, make a plurality of anisotropy segmentations (segment) columnar magnet be mounted to the casing of ring-shaped magnetic body, the mutual each other reverse configuration of a plurality of segmentation columnar magnets of adjacency.Thus, the magnetic line of force forms between the segmentation columnar magnet of adjacency, thereby the periphery in the processing space between upper electrode 31 and lower electrode 21 forms magnetic field, plasma can be enclosed in to handle the space.In addition, also can constitute the device that does not have multipole ring magnet 47a, 47b.
By each above apparatus structure, in the container handling 11 (upper chambers 11a) of plasma processing apparatus 1, be formed with the pair of parallel plate electrode that constitutes by lower electrode 21 and upper electrode 31.Adjust container handling 11 inside to the pressure of appointment, handle gas by importing, from high frequency electric source 41a, 41b supply high frequency electric power, handle gaseous plasmaization, high frequency flows through the path that the wall portion → the earth by lower electrode 21 → plasma → upper electrode 31 → container handling 11 constitutes.By this effect of plasma processing apparatus 1, implement to utilize the etching of plasma to being fixed on wafer W on the mounting table 2.
Then, with reference to Fig. 2, Fig. 3, describe the mounting table 2 that present embodiment relates in detail.In addition, in the vertical disconnected side view of mounting table shown in Figure 22, omitted the explanation of the through hole 25 etc. of refrigerant flow path 26 and rear portion gas.
In the upper central portion of lower electrode 21, shown in Fig. 2 (a), be embedded with dielectric layer 22.Dielectric layer 22 has the effect that is reduced in the plasma potential on these dielectric layer 22 zones of burying underground of quilt.Dielectric layer 22 is by for example with aluminium oxide (Al
2O
3) for principal component, than dielectric constant by 10 the pottery constituted.Shown in Fig. 2 (b), dielectric layer 22 has for example thickness t
D=5mm, diameter of phi
DThe disc-shape of=240mm.
Then, describe with regard to electrostatic chuck.Shown in Fig. 2 (a), the structure of electrostatic chuck 23 is, for example at spraying plating aluminium oxide etc. and below forming between the dielectric film 23a of side and upper face side, accompanies electrode film.Electrode film is roughly 1.0 * 10 by resistivity
-4The electrode material of Ω m constitutes.In the present embodiment, electrostatic chuck 23 shown in Fig. 3 (a), is made of first electrode film 23b of toroidal and the circular second electrode film 23d that is provided with in the mode of surrounding the first electrode film 23b via the area of isolation 23c that does not have electrode film.That is, these electrode films 23b, 23d upwards isolate mutually in the footpath of mounting table 2, are divided into polylith.Here, the diameter of phi of the first electrode film 23b for example
C1=158mm, the internal diameter Φ of the second electrode film 23d
C2=162mm, external diameter Φ
C3=298mm.
Shown in Fig. 2 (a), electrode film 23b, 23d are connected to high impedance circuit 43a, 43b, constitute the high frequency independent circuits, and are connected in high-voltage DC power supply 46 by common switch 44 and resistance 45.If apply high voltage DC power to electrode film 23b, 23d from high-voltage DC power supply 46, then pass through in the Coulomb force of the surface of electrostatic chuck 23 generation, can be with on the wafer W Electrostatic Absorption be above as the electrostatic chuck 23 of mounting surface.Because high impedance circuit 43a, 43b are with respect to the high frequency of supplying with lower electrode 21, it is the circuit (low pass filter: LPF) that becomes high impedance, and in the present embodiment, first, second electrode film 23b, 23d are connected in common high-voltage DC power supply 46, so be set to respect to high-frequency insulation between these electrode films 23b, the 23d.And, make these electrode films 23b, 23d be not limited to above-mentioned example with respect to the method for high-frequency insulation, for example high-voltage DC power supply and high impedance circuit (LPF) can be set on electrode film 23b, 23d respectively.In addition, two electrode film 23b, 23d link together by the electrode film pattern as the inductor composition, for example can only the electrode film 23 in the outside be connected in high-voltage DC power supply 46, thus, make between each electrode film 23b, 23d with respect to high-frequency insulation via high impedance circuit 43a.
In the state of lamination lower electrode 21, dielectric layer 22 and electrostatic chuck 23, the position relation of electrode film 23b, the 23d of dielectric layer 22 and electrostatic chuck 23, shown in the vertical section enlarged drawing of Fig. 2 (b), the outward flange of setting dielectric layer 22 is positioned at the outward flange position more in the outer part than electrode film 23b.Promptly, shown in Fig. 3 (c), if observe dielectric layer 22 with respect to the vertical plane of the mounting surface of wafer W and the vertical plane of electrode film 23b, 23d similarly from the mounting surface side, then the outward flange of dielectric layer 22 is in the inward flange position more in the outer part than the area of isolation 23c between divided electrode film 23b, the 23d.
Below, the effect of the mounting table 2 that above-mentioned execution mode is related to describes.Shown in Fig. 4 (a), from the high-frequency current that the first high frequency electric source 41a supplies with and propagates on the surface of lower electrode 21, its part is leaked to electrostatic chuck 23 sides from the surface of wafer W.At this moment, the electrode film 23b, the 23d that are embedded in the electrostatic chuck 23 are cut apart, and are buried underground with the state of isolating mutually in the footpath direction, and thus, shown in the arrow among the figure, high frequency may arrive dielectric layer 22.In the zone that dielectric layer 22 is buried underground, high frequency slips into deeplyer than other zones, thereby can reduce the current potential of this regional plasma.
According in effect discussed above, even pass through this mounting table 2 of electrostatic chuck 23 fixed wafer W, its effect that utilizes dielectric layer 22 to reduce plasma potentials can not suffer damage because of the existence of electrode film 23b, 23d yet.Thus, the peak value that does not have to become under the situation of performance the electric-field intensity distribution of mountain shape in the effect of dielectric layer 22 can become smooth because of the performance of this effect, so, electron density in the plasma can obtain high inner evenness, for example can improve the inner evenness about the plasma treatment of etch processes etc.
At this, in order to bring into play the effect of utilizing dielectric layer 22 to make electric field homogenizing, the outward flange of dielectric layer 22 can be positioned at the inward flange position more in the outer part than area of isolation 23c.So as shown in Figure 5, the diameter of dielectric layer 22 shortens, and the outward flange of dielectric layer 22 is between the inward flange and outward flange of area of isolation 23c.The mounting table 2 of this structure also is included in the technical scope of the present invention.
Then, the structure of the mounting table 2 that second execution mode is related to describes.Second execution mode, the outward flange of its dielectric layer 22 be positioned at area of isolation 23c inward flange under, this point is different with first execution mode that is positioned at than the inward flange position more in the outer part of area of isolation 23c.
Specifically, for example, as shown in Figure 6, the size of the dielectric layer 22 and the first electrode film 23b forms roughly the same, and so that the mode of these central portion unanimity is assembled mounting table 2.As a result, the outward flange of dielectric layer 22 be positioned at area of isolation 23c inward flange under.
So, shown in the arrow among Fig. 4 (b), the outward flange of dielectric layer 22 just in time be positioned at area of isolation 23c inward flange under, may arrive dielectric layer 22 from the high frequency on wafer W surface.In the zone that is embedded with dielectric layer 22, high frequency slips into deeplyer than other zones, thereby can reduce this regional plasma potential.In addition, forming on this one side of uniform plasma, electrostatic chuck 23 also can not have the second electrode film 23d.
And, the dielectric layer that reduces plasma potential can not be defined as one deck, as shown in Figure 7, for example can so constitute mounting table 2: at the downside of the first dielectric layer 22a, bury the second dielectric layer 22b again underground, and the outward flange of the second dielectric layer 22b is positioned at the outward flange position more in the inner part than the first dielectric layer 22a.Thus, do not have to become under the situation of performance the zone that the peak value of the electric-field intensity distribution of mountain shape increases in the effect of dielectric layer, high frequency can slip into deeplyer, and it is more smooth that the distribution of electric field strength can become.Under the situation that two-layer dielectric layer 22a, 22b are set, may be partitioned into three cube electrode film 23b, 23d, 23f, area of isolation 23c, 23e are two, and the outward flange of each dielectric layer 22a, 22b can be positioned at each area of isolation 23c, 23e inward flange under or position more in the outer part.And the number of plies of lamination dielectric layer also is not limited to two-layer, but lamination is more than three layers.In this case, the number of cutting apart of preferred electrode film is Duoed one than the number of plies of dielectric layer at least.
In addition, as the variation of execution mode, as shown in Figure 8, the electrode film 23b of electrostatic chuck can be formed the shape that forms porose portion in the position that is equivalent to mounting table central authorities, and dielectric layer 22 is positioned at the below of this hole portion.
And the formation of dielectric layer 22 is not limited to cylindric shown in the above-mentioned execution mode, for example, can form hemisphere protuberance (dome) shape shown in Fig. 9 (a), or can form coniform shown in Fig. 9 (b).So, by the thickness setting with dielectric layer 22 be periphery less than central portion, make the electric field strength of central portion be weaker than periphery, thereby can obtain more smooth distribution.At this moment, electrode film can be split into more than three, and a plurality of area of isolation can be set.
In addition, since generally the linear expansivity of the pottery that uses as dielectric layer be 2 * 10
-6/ ℃～11 * 10
-6/ ℃, so also be preferably near this scope as the linear expansivity of the electric conductor parts of electrode.
[execution mode]
(simulation 1)
With the plasma processing apparatus modelling of as shown in Figure 1 parallel plate-type, simulate, infer the distribution of the electric field strength on the wafer.
A. simulated conditions
The resistivity of electrode film 23b, 23d: 1.0 * 10
-6Ω m
The resistivity of wafer W: 5.0 * 10
-2Ω m
The resistivity of plasma: 1.5 Ω m
The ratio DIELECTRIC CONSTANT of dielectric layer 22: 10
Apply electric power: 2kW (two conditions of frequency 40MHz or 100MHz)
In above-mentioned condition, the electric-field intensity distribution of the radial direction of the wafer W of mounting on the mounting surface of each following embodiment, mounting table 2 that comparative example relates to is simulated.
(embodiment 1)
Shown in Figure 10 (a), mounting table 2 to be simulated, this mounting table has the structure identical with structure illustrated in second execution mode.
Here, the diameter phi of the first electrode film 23b
C1=158mm, the internal diameter Φ of the second electrode film 23d
C2=162mm, external diameter Φ
C3=298mm, the diameter of phi of dielectric layer
D=158mm.
(embodiment 2)
Shown in Figure 10 (b), mounting table 2 to be simulated, this mounting table has the structure identical with illustrated in the first embodiment structure.
At this, the size of the first electrode film 23b, the second electrode film 23d is identical with embodiment 1, the diameter of phi of dielectric layer 22
D=240mm.
(comparative example 1)
Shown in Figure 10 (c), mounting table 2 to be simulated, this mounting table is not buried dielectric layer 22 underground, and the electrode film 23b of electrostatic chuck 23 is not cut apart.
(comparative example 2)
Shown in Figure 10 (d), mounting table 2 is simulated, though this mounting table is embedded with dielectric layer 22, electrode film 23b is not cut apart.And, the diameter of phi of dielectric layer 22
D=160mm.
(comparative example 3)
Shown in Figure 10 (e), mounting table 2 is simulated, though electrode film 23b, 23d and first embodiment and second embodiment are cut apart equally, but, because the diameter of dielectric layer 22 is less than electrode film 23b, so the outward flange of dielectric layer 22 is positioned at the inward flange position more in the inner part than area of isolation 23c.
Here, the size of the first electrode film 23b, the second electrode film 23d is identical with embodiment 1, the diameter of phi of dielectric layer 22
D=100mm.
B. analog result
The analog result of the electric-field intensity distribution in each embodiment, the comparative example as shown in figure 11.Figure 11 (a) is the analog result of the frequency of the high frequency that applies when being 40MHz.Figure 11 (b) is the result of frequency when being 100MHz.It is under the situation of wafer W central authorities that the transverse axis of each figure is illustrated in " 0 ", the distance from central authorities to the radial direction (mm).The longitudinal axis is represented " than electric field strength (the maximum E of the analog result of the electric field strength E of each position that=analog result obtains/all positions
Max) ".About each analog result, (△) maps to embodiment 1 with triangle, with del () embodiment 2 mapped respectively, and (◇) maps to comparative example 1 with rhombus, with quadrangle (■) comparative example 2 is mapped, comparative example 3 is mapped with circular (●).
According to Simulation result, in the comparative example 1 of not burying dielectric layer 22 underground, no matter frequency is 40MHz or 100MHz, and its electric-field intensity distribution all is that the electric field strength of the middle section of wafer W becomes maximum ((◇) of Figure 11 (a) and (b)).In addition, though be embedded with dielectric layer 22 do not cut apart electrode film 23b comparative example 2 (■) though and electrode film 23b, 23d cut apart but the diameter of dielectric layer 22 less than the analog result of the comparative example 3 (●) of electrode film 23b, also identical with comparative example 1, the electric field strength that its electric-field intensity distribution all is the middle section of wafer W becomes maximum.This presentation of results, by the electrode film 23b of electrostatic chuck is set between wafer W and dielectric layer 22, dielectric layer 22 is covered, and can't bring into play by the effect that dielectric layer 22 reduces plasma potential.
Relative with these comparative examples is, in the analog result of the embodiment 1 that is equivalent to second execution mode, frequency at high frequency is under the situation of 40MHz, outer peripheral near zone about the 120mm of distance wafer W central authorities becomes electric field strength and reaches maximum electric-field intensity distribution (Figure 11 (a) (△)).In addition, be under the situation of 100MHz in the frequency of high frequency, at the middle section of wafer W with apart from these two zones of outer peripheral near zone about the 100mm of wafer W central authorities, electric field strength reaches maximum (Figure 11 (b) (△)).In addition, the analog result that is equivalent to the embodiment 2 of first execution mode also is, in each frequency (40MHz, 100MHz), becomes the Electric Field Distribution ((s) of Figure 11 (a) and (b)) roughly the same with embodiment 1.
In the analog result of embodiment 1,2, can't see the sort of high electric-field intensity distribution of electric field strength of having only the middle section of wafer W in the comparative example 1～3.This expression, even between wafer W and dielectric layer 22, exist the electrode film 23b of electrostatic chuck, also can find out the dielectric layer 22 that is embedded in lower electrode 21 by area of isolation 23c, thereby can bring into play the effect of the current potential of the plasma that reduces the zone that is embedded with dielectric layer 22 from plasma.
(experiment 1)
Making has and the embodiment 1,2 of (simulation 1) and the mounting table 2 of the structure same structure shown in the comparative example 2,3, and the difference of structure of investigating each mounting table 2 is for the influence of the plasma treatment of reality.
A. experimental technique
In experiment, use parallel plate-type plasma processing apparatus as shown in Figure 1, it is equipped with embodiment 1,2 among Figure 10 and each mounting table 2 shown in the comparative example 2,3.Then, the wafer W mounting that scribbles resist film in the mounting surface of mounting table 2, is produced plasma, carry out the ashing treatment of resist film.Pressure in the container handling 11 is 7Pa (5mTorr), and processing gas is O
2Gas (supplying with 100sccm) is used for the high frequency that plasma generates, and its frequency is 100MHz, 2kW.After carrying out the ashing treatment of stipulated time,, calculate the ashing speed of time per unit at the thickness of the specified measurement point measurement resist film of wafer W.
B. experimental result
Figure 12 is the curve chart of the ashing speed of calculating from experimental result on each measuring point of wafer W.Figure 12 (a) and (b) are represented the experimental result relevant with the mounting table 2 of comparative example 2, comparative example 3 respectively, and Figure 12 (c), (d) represent the experimental result relevant with the mounting table 2 of embodiment 1, embodiment 2 respectively.At this, to set under the situation of reference axis on the direction shown in Figure 10 (a), the transverse axis of each curve chart is represented, from the central authorities of wafer W to X-direction (facing to the left and right directions of figure, the right side is for just) and the distance [mm] of Y direction (facing to figure, to the direction of inboard, the inboard just is from nearby).The longitudinal axis is represented ashing speed [nm/min].About each experimental result, with rhombus (◆) ashing speed of X-direction is mapped, (△) maps to the ashing speed of Y direction with triangle.In addition, the numerical value of being put down in writing among each figure, the mean value of representing the ashing speed in each experiment condition and relative amplitude of variation [%] with respect to the experimental result of this mean value.
According to experimental result, in full terms (comparative example 2, comparative example 3, embodiment 1, embodiment 2), can not see the difference because of the axial different ashing speeds that cause of X-axis and Y-axis, ashing speed distributes diametrically symmetrically with respect to the central authorities of wafer W.Shown in Figure 12 (a) and (b), in the experimental result of comparative example 2, comparative example 3, become the distribution of ashing speed maximum of the middle section of wafer W.This be because, electrode film 23b is not cut apart, area of isolation 23c does not form, and thus, becomes the state that can't find out dielectric layer 22 from plasma, thereby can't bring into play the effect that utilizes dielectric layer 22 to reduce the current potential of plasmas.
In contrast, shown in Figure 12 (c), (d), in the experimental result of embodiment 1, embodiment 2, at the middle section of wafer W, the peak value of ashing speed does not exist.And the amplitude of variation of ashing speed is compared with comparative example 3 (27.6%～28.5%) with comparative example 2, probably is reduced to half (12.7～14.7%).This be because, trend is consistent with the analog result of the electric-field intensity distribution of the various embodiments described above, even between wafer W and dielectric layer 22, there is the electrode film 23b of electrostatic chuck, also can find out the dielectric layer 22 that is embedded in lower electrode 21 via area of isolation 23c from plasma, thereby given play to the effect of the plasma potential that reduces the zone be embedded with dielectric layer 22, so obtain becoming under the situation that the effect at dielectric layer 22 not have to bring into play the result that the peak value of the electric-field intensity distribution of mountain shape also can be flattened.In addition, the condition that obtains this effect is not limited to apply the situation of frequency for the High frequency power of the frequency of model shown in simulation or the experiment.For example, applying under the situation of High frequency power that frequency is 13MHz or 27MHz, also can access same effect.
Claims (7)
1. mounting table that plasma processing apparatus is used, it is used for the processed substrate of mounting on mounting surface, is characterised in that, comprising:
The electric conductor parts are connected in high frequency electric source, and double as is the electrode that the ion in plasma generation usefulness or the plasma is introduced usefulness;
Dielectric layer is provided with in the mode of the upper central portion that covers these electric conductor parts, is used to make by processed substrate even to the high-frequency electric field that plasma applies; With
Electrostatic chuck, lamination can buried underground by mode therebetween with high frequency and upwards to isolate mutually in the footpath of mounting table and be divided into a plurality of electrode films on this dielectric layer, wherein,
The outward flange of described dielectric layer, be positioned at area of isolation internal edge between divided electrode film under or position more in the outer part,
Divided electrode film is with respect to the high frequency mutually insulated.
2. the mounting table that plasma processing apparatus as claimed in claim 1 is used is characterized in that:
Described dielectric layer, so that down outward flange is offside in the mode lamination multilayer of inboard more,
Described electrode film cut apart number, Duo one at least than the number of plies of dielectric layer.
3. mounting table that plasma processing apparatus is used, it is used for the processed substrate of mounting on mounting surface, is characterised in that, comprising:
The electric conductor parts are connected in high frequency electric source, and double as is the electrode that the ion in plasma generation usefulness or the plasma is introduced usefulness;
Dielectric layer is provided with in the mode of the upper central portion that covers these electric conductor parts, is used to make by processed substrate even to the high-frequency electric field that plasma applies; And
Electrostatic chuck, lamination are being buried the electrode film that forms porose portion in the position corresponding to the mounting table central portion underground in the mode that high frequency can pass through on this dielectric layer, wherein,
Described dielectric layer is positioned at the below of this hole portion.
4. the mounting table of using as each described plasma processing apparatus in the claim 1～3 is characterized in that:
Described dielectric layer forms cylindric.
5. the mounting table of using as each described plasma processing apparatus in the claim 1～3 is characterized in that:
The thickness of described dielectric layer at periphery less than central portion.
6. the mounting table of using as each described plasma processing apparatus in the claim 1～5 is characterized in that:
The frequency of the high frequency of supplying with from described high frequency electric source is more than the 13MHz.
7. a plasma processing apparatus is characterized in that, comprising:
Processed substrate is carried out the container handling of plasma treatment;
The processing gas introduction part that gas imports this container handling will be handled;
Be arranged on the mounting table of using as each described plasma processing apparatus in the claim 1～6 in the described container handling;
Be arranged on the upper electrode of the upper side of this mounting table in the mode relative with this mounting table; With
Be used for carrying out the unit of vacuum exhaust in the described container handling.
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006217871A JP5233092B2 (en) | 2006-08-10 | 2006-08-10 | Mounting table for plasma processing apparatus and plasma processing apparatus |
| JP2006217871 | 2006-08-10 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101123200A true CN101123200A (en) | 2008-02-13 |
| CN100593234C CN100593234C (en) | 2010-03-03 |
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ID=39085458
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200710140387A Expired - Fee Related CN100593234C (en) | 2006-08-10 | 2007-08-10 | Stage for plasma processing apparatus, and plasma processing apparatus |
Country Status (4)
| Country | Link |
|---|---|
| JP (1) | JP5233092B2 (en) |
| KR (1) | KR100924855B1 (en) |
| CN (1) | CN100593234C (en) |
| TW (1) | TWI397121B (en) |
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| CN101677053A (en) * | 2008-09-19 | 2010-03-24 | Ips株式会社 | Electrostatic chuck and manufacturing method thereof |
| CN101896033A (en) * | 2009-03-06 | 2010-11-24 | 东京毅力科创株式会社 | The electrode that plasma processing apparatus and plasma processing apparatus are used |
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| JPH06177081A (en) * | 1992-12-04 | 1994-06-24 | Tokyo Electron Ltd | Plasma processor |
| JPH08186094A (en) * | 1994-12-28 | 1996-07-16 | Sumitomo Metal Ind Ltd | Plasma treatment device |
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- 2007-08-09 KR KR1020070080166A patent/KR100924855B1/en active IP Right Grant
- 2007-08-09 TW TW096129447A patent/TWI397121B/en not_active IP Right Cessation
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Also Published As
| Publication number | Publication date |
|---|---|
| TW200826187A (en) | 2008-06-16 |
| CN100593234C (en) | 2010-03-03 |
| TWI397121B (en) | 2013-05-21 |
| JP5233092B2 (en) | 2013-07-10 |
| KR100924855B1 (en) | 2009-11-02 |
| JP2008042115A (en) | 2008-02-21 |
| KR20080014660A (en) | 2008-02-14 |
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