CN101013884A - Unilateral hysteresis comparator - Google Patents

Abstract

The invention discloses one single retard comparer, which is of low voltage and power consumption chips protection circuit or circuit special design, wherein, it has the circuit current power, two input MOS tubes, three load MOS tubes and retard adjusters, wherein, the retard adjuster is to adjust comparer valve value composed of load MOS tube, feedback MOS tube and switch; the circuit single valve value is irrelative to the circuit parts.

Description

Unilateral hysteresis comparator

Technical field

The invention belongs to field of analog integrated circuit, relate to a kind of unilateral hysteresis comparator, be particularly useful for using in the integrated circuit (IC) chip.

Background technology

In the application of integrated chip,, should comprise protection and testing circuit in its control circuit for guaranteeing the reliability of chip under normal and improper operating position.Protective circuit possesses the function of autoprotection and load protection two aspects, in case break down, makes the chip circuit comparator that quits work immediately.Testing circuit is the different operating state of testing circuit, makes chip make suitable reaction at different operating states.

Traditional hysteresis comparator that has internal positive feedback as shown in Figure 1.It is to use internal positive feedback to realize sluggish comparator in the input stage of high-gain open loop comparator.This comparator by N-channel MOS transistor N1, that N2 constitutes differential input is right; P channel MOS transistor P1, P2 that diode connects do load; Constant current source I1 constitutes positive feedback loop composition hysteresis comparator as current source and inner P channel MOS transistor P3, P4.

Have two feedback paths in this circuit, article one is the series current feedback by the common source node of transistor N1 and N2, and this feedback network is negative feedback; Second is the shunt voltage feedback that connects P3 and P4 source-drain electrodes, and this feedback network is positive feedback.When this positive feedback coefficient during less than degeneration factor, entire circuit will show as negative feedback, lose sluggish effect simultaneously; When positive feedback coefficient during greater than degeneration factor, entire circuit will show as positive feedback, will occur sluggishness simultaneously in voltage transmission curve.

This comparator is because four pipes of decision level are symmetrical in twos, and promptly P1 is identical with P2 pipe breadth length ratio, and P3 is identical with P4 pipe breadth length ratio, and then the threshold voltage of comparator is symmetrically distributed for input reference voltage; And particularly may require the threshold voltage of comparator not necessarily symmetrical under the Low-voltage Low-power condition in the reality for reference voltage.Secondly, the positive threshold value of comparator shown in Figure 1 is all relevant with the breadth length ratio of device with negative threshold value, is subjected to the influence of flow-route and temperature, and may require in practice comparator just/negative threshold value and reference voltage are identical, and have certain sluggish effect.Therefore need unilateral hysteresis comparator.

Summary of the invention

The object of the present invention is to provide a kind of unilateral hysteresis comparator, this comparator has high accuracy unilateral hysteresis function.

Unilateral hysteresis comparator provided by the invention, a kind of structure is: it comprises NMOS pipe N1 and N2, PMOS pipe P1, P2, P5 and sluggish adjuster, sluggish adjuster is made of load PMOS pipe P7, feedback pmos P8 and feedback switch S1, is used to regulate the threshold value of comparator; NMOS pipe N1 and N2 symmetry, the breadth length ratio of PMOS pipe P1, P2, P5 and P7 equates; Wherein, NMOS pipe N1 tube grid is as positive input terminal V _In1, the grid of NMOS pipe N2 pipe is as negative input end V _In2, their source electrode links to each other, and connects the anode of tail current source I1 simultaneously; The negativing ending grounding of current source I1; NMOS pipe N1 drain electrode links to each other with PMOS pipe P1 drain electrode, and is connected to that load PMOS pipe P7 in the sluggish adjuster drains and the negative pole of feedback switch S1; The positive pole of switch S 1 links to each other with the drain electrode of PMOS pipe P8; PMOS pipe P1 leaks level and links to each other with the grid level, becomes diode to connect; The drain electrode of N2 links to each other with PMOS pipe P2 drain electrode, is connected to the drain electrode of PMOS pipe P5 simultaneously; PMOS pipe P2 drain electrode links to each other with its grid, becomes the diode syndeton; PMOS pipe P1 links to each other with the P5 grid, and the grid of PMOS pipe P7, P8 links to each other with PMOS pipe P2 grid in the sluggish adjuster; PMOS pipe P1, P2, P5, P7, P8 source electrode link to each other, and insert power supply V together _DDThe negative output terminal V of comparator _O1Draw the positive output end V of comparator from the drain electrode of NMOS pipe N1 _O2Draw from the drain electrode of NMOS pipe N2 pipe.

Unilateral hysteresis comparator provided by the invention, another kind of structure is: it comprises PMOS pipe P9 and P10, NMOS pipe N3, N4, N5 and sluggish adjuster, sluggish adjuster is made of load NMOS pipe N7, feedback NMOS pipe N8 and feedback switch S1, is used to regulate the threshold value of comparator; PMOS pipe P9 and P10 symmetry, the breadth length ratio of NMOS pipe N3, N4, N5 and N7 equates; PMOS pipe P9 tube grid is as positive input terminal V _IP9, the grid of PMOS pipe P10 pipe is as negative input end V _IP10, their source electrode links to each other, and connects the anode of tail current source I1 simultaneously; The negativing ending grounding of current source I1; PMOS pipe P9 drain electrode links to each other with NMOS pipe N3 drain electrode, and is connected to that load NMOS pipe N7 in the sluggish adjuster drains and the negative pole of feedback switch S1; The positive pole of switch S 1 links to each other with the drain electrode of NMOS pipe N8; NMOS pipe N3 leaks level and links to each other with the grid level, becomes diode to connect; The drain electrode of PMOS pipe P10 links to each other with NMOS pipe N4 drain electrode, is connected to the drain electrode of NMOS pipe N5 simultaneously; NMOS pipe N4 drain electrode links to each other with its grid, becomes the diode syndeton; NMOS pipe N3 links to each other with the N5 grid, and the grid of NMOS pipe N7, N8 links to each other with NMOS pipe N4 grid in the sluggish adjuster; NMOS pipe N3, N4, N5, N7, N8 source electrode link to each other, and insert power supply V together _DDThe negative output terminal V of comparator _O1Draw the positive output end V of comparator from the drain electrode of PMOS pipe P9 _O2Draw from the drain electrode of PMOS pipe P10 pipe.

Unilateral hysteresis comparator circuit of the present invention is to realize that by internal positive feedback sluggish comparator improvement forms, constitute the threshold voltage generation part of this hysteresis comparator circuit by the positive feedback loop of dissymmetrical structure, add the output-stage circuit that corresponding output voltage swing and reasonable output resistance are provided again, formed the core of this hysteresis comparator circuit jointly.By adjusting, can realize that then a threshold value is fixed as reference voltage V to the threshold voltage adjustments device _Ref, the effect that another threshold voltage is adjustable.Therefore can realize the hysteresis voltage V of different sizes _HYS

Behind each parameter setting of this hysteresis comparator circuit, circuit can be operated in chip internal under the situation of low-tension supply power supply.For example working as this hysteresis comparator circuit is applied in the Switching Power Supply managing chip, in soft start-up process, output voltage is detected, when output voltage is lower than the turn threshold that this circuit sets, this circuit output control signal corresponding will make circuit keep the soft start stage; When output voltage is higher than the turn threshold that this circuit sets, this circuit output control signal corresponding will make that circuit is in normal work stage.Unilateral hysteresis comparator among the present invention can also be operated in the under-voltage protection module, and when output voltage is lower than the turn threshold that this circuit sets, circuit output control signal corresponding will be turn-offed the most of module in the chip, to play a protective role.Because the negative threshold value in this circuit is only relevant with input voltage, therefore monolateral threshold value can accurately be determined and not be subjected to the influence of circuit devcie technology.And another threshold voltage is only fed back the breadth length ratio of pipe and determine, makes the hysteresis circuitry amount of hysteresis accurately to be controlled in the 10mV.Added positive feedback loop in the circuit and made circuit that acceleration be arranged, and made the gain of comparator become big, precision can reach 0.15uV.This circuit has reduced the quiescent dissipation in the circuit, probably is about 50uW.Circuit can be operated under the low-voltage and low-power dissipation pattern, is applicable to the integrated of chip and use.

Description of drawings

Fig. 1 is the circuit theory diagrams of existing hysteresis comparator circuit;

Fig. 2 adopts the circuit theory diagrams of the unilateral hysteresis comparator adjustable threshold value of NMOS input for the present invention;

Fig. 3 is the unilateral hysteresis comparator circuit theory diagrams corresponding to the employing PMOS input of Fig. 2;

Fig. 4 is the circuit diagram corresponding to a kind of execution mode of Fig. 2.

Embodiment

To be illustrated in conjunction with the accompanying drawings by the typical application example below.

Unilateral hysteresis comparator of the present invention comprises current source I1, two input metal-oxide-semiconductors, three load metal-oxide-semiconductors and sluggish adjuster 11, and wherein sluggish adjuster 11 is used to regulate the threshold value of comparator.When the input metal-oxide-semiconductor was the NMOS pipe, the load metal-oxide-semiconductor adopted the PMOS pipe; When the input metal-oxide-semiconductor was the PMOS pipe, the load metal-oxide-semiconductor adopted the NMOS pipe.

When importing metal-oxide-semiconductor is that NMOS pipe, load metal-oxide-semiconductor are the PMOS pipe, and sluggish adjuster 11 adopts load PMOS pipe P7, a feedback pmos P8 and feedback switch S1 to form, and the concrete structure of circuit as shown in Figure 2.Wherein, input pipe N1, N2 are symmetrical fully in the invention.The breadth length ratio of P1, P2, P5, P7 (W/L) _P1, (W/L) _P2, (W/L) _P5, (W/L) _P7Equate i.e. (W/L) _P1=(W/L) _P2=(W/L) _P5=(W/L) _P7And the breadth length ratio of P8 (W/L) in the hysteresis modulator _P8Can regulate according to amount of hysteresis.

The concrete operation principle of enforcement circuit of the present invention is described in detail as follows.This circuit can produce the effect of unilateral hysteresis by the effect of sluggish adjuster.V _In1Be the anode of comparator, V _In2Negative terminal for comparator.Work as V _In1Be far smaller than V _In2The time, feedback switch S1 conducting this moment, NMOS pipe N1 ends, and this moment, PMOS pipe P1 and P5 ended; Because V _In2Make NMOS manage the N2 conducting more greatly, the electric current of tail current source I1 flows through the N2 pipe fully.PMOS pipe P7 in the sluggish adjuster 11 and feedback are closed P8 and are in dark triode state, and no current flows through.

V _In1Increase gradually, and near positive threshold value V _TH+The time, N1 saturation conduction, PMOS pipe P7 in the sluggish adjuster 11 and the linear conducting of feedback pipe P8.Current i as NMOS pipe N1 _N1With pmos current i in the sluggish adjuster 11 _P7With feedback pipe i _P8Electric current and when equal, comparator arrives its positive turn threshold V _TH+Promptly work as i _N1=i _P7+ i _P8The time, comparator arrives its positive turn threshold V _TH+

PMOS pipe P7, P8 in the sluggish adjuster 11 become current-mirror structure with P2, then are in the electric current that the metal-oxide-semiconductor of saturation condition flows through as can be known by the characteristic of current-mirror structure circuit and are directly proportional with its breadth length ratio, that is:

$i_{P7}+i_{P8}=\frac{{(W/L)}_{P7}+{(W/L)}_{P8}}{{(W/L)}_{\mathrm{<figure-callout\; id="2"\; label="P"\; filenames="A20061012512700131.png,A20061012512700151.png"\; state="\{\{state\}\}">P</figure-callout>}2}}\&times;i_{P2}---\left(1\right)$

If (W/L) _P8/ (W/L) _P2=c '

Total current by NMOS pipe N2 and N1 should with tail current source I1 current i ₁Promptly identical:

i _N2+i _N1＝i ₁ (2)

Can draw the sluggish V of the forward of comparator by top analysis _TH+For:

$V_{\mathrm{TH}+}=V_{\mathrm{in}2}{\left(\frac{{2\mathrm{<figure-callout\; id="1"\; label="i"\; filenames="A20061012512700151.png"\; state="\{\{state\}\}">i</figure-callout>}}_1}{{\mathrm{\&beta;}}_1}\right)}^{1/2}\frac{\sqrt{1+c^{\&prime;}}-1}{{(2+c^{\&prime;})}^{1/2}}=V_{\mathrm{in}2}+\mathrm{\&alpha;}---\left(3\right)$

β wherein ₁=μ _nC _Ox(W/L) N ₁

By formula (3), the positive threshold of comparator and parameter c ' have close relation as can be known, fixed the breadth length ratio of P1, P2, P5, P7 in the design and known the size of tail current, as long as regulate the amount of hysteresis that the breadth length ratio of P8 in the hysteresis modulator 11 has determined hysteresis comparator.

Work as V _In1Be far longer than V _In2The time, NMOS pipe N2 ends, and feedback switch S1 turn-offs, and this moment, PMOS managed PMOS pipe P7, the P8 in P2 and the amount of hysteresis modulator 11; Because V _In1Make NMOS manage the N1 conducting more greatly, the electric current of tail current source I1 flows through the N1 pipe fully.PMOS manages the dark triode state of P5 simultaneously, and no current flows through.

V _In2Increase gradually, and near negative threshold value V _TH-The time, N2 saturation conduction, the linear conducting of PMOS pipe P5.When the electric current of NMOS pipe N2 when electric current on the PMOS pipe P5 equates, its negative turn threshold V of comparator arrival _TH-Promptly work as i _N2=i _P5The time, comparator arrives its negative turn threshold V _TH-

PMOS pipe P1 becomes current-mirror structure with P5, then is in the electric current that the metal-oxide-semiconductor of saturation condition flows through as can be known by the characteristic of current-mirror structure circuit and is directly proportional with their breadth length ratio, that is:

$i_{P5}=\frac{{(W/L)}_{P5}}{{(W/L)}_{\mathrm{<figure-callout\; id="1"\; label="P"\; filenames="A20061012512700151.png"\; state="\{\{state\}\}">P</figure-callout>}1}}\&times;i_{\mathrm{<figure-callout\; id="1"\; label="P"\; filenames="A20061012512700151.png"\; state="\{\{state\}\}">P</figure-callout>}1}=i_{N1}---\left(4\right)$

Flow through the current i on the PMOS pipe P1 this moment _P1With the current i that flows through on the input pipe N1 _N1Equate, flow through the current i on the PMOS pipe P5 _P5With the current i that flows through on the input pipe N2 _N2Equate, and should be identical with tail current source I1 current i 1 by the total current of NMOS pipe N2 and N1, that is:

i _N2+i _N1＝i ₁ (5)

The negative threshold value that can be drawn hysteresis comparator by top analysis calculates and can get:

V _TH-＝V _in2 (6)

The positive threshold value V of hysteresis comparator _TH+=V _In2+ α, negative threshold value V _TH-=V _In2Therefore entire circuit has been finished the effect of unilateral hysteresis, and amount of hysteresis is α.

V _In1For also can be used as comparator input negative terminal, V _In2For also can be used as comparator input anode.At this moment, V _O1Be the output plus terminal of comparator, V _O2Output negative terminal for comparator.The positive threshold value that in like manner can get comparator this moment is the positive threshold value V of hysteresis comparator _TH+For:

V _TH+＝V _in2 (7)

The negative threshold value V of hysteresis comparator _TH-For:

$V_{\mathrm{TH}-}=V_{\mathrm{in}2}+{\left(\frac{{2\mathrm{<figure-callout\; id="1"\; label="i"\; filenames="A20061012512700151.png"\; state="\{\{state\}\}">i</figure-callout>}}_1}{{\mathrm{\&beta;}}_1}\right)}^{1/2}\frac{1-\sqrt{1+c^{\&prime;}}}{{(2+c^{\&prime;})}^{1/2}}=V_{\mathrm{in}2}+\mathrm{\&alpha;}---\left(8\right)$

C '=(W/L) wherein _P8/ (W/L) _P2, β ₁=μ _nC _Ox(W/L) _N1

The negative threshold value V of hysteresis comparator _TH-=V _In2+ α, negative threshold value V _TH=V _In2Therefore entire circuit has been finished the effect of unilateral hysteresis, and amount of hysteresis is α.

When importing metal-oxide-semiconductor is that PMOS pipe, load metal-oxide-semiconductor are the NMOS pipe, and when sluggish adjuster 11 adopted NMOS pipe N7 with feedback pipe N8 and feedback switch S1, its circuit concrete structure as shown in Figure 3.Input pipe P9, P10 are symmetrical fully in the circuit.The breadth length ratio of N3, N4, N5, N7 (W/L) _N3, (W/L) _N4, (W/L) _N5, (W/L) _N7Equate i.e. (W/L) _N3=(W/L) _N4=(W/L) _N5=(W/L) _N7And the breadth length ratio of N8 (W/L) in the hysteresis modulator _N8Can regulate according to amount of hysteresis.The operation principle of circuit shown in Figure 3 is identical with Fig. 2 with positive and negative threshold calculations, just the positive termination power V of current source I1 _DD, the continuous ground connection together of the source electrode of all NMOS pipes.

Fig. 4 has provided hysteresis comparator circuit around the constructed a kind of typical enforcement circuit diagram of hysteresis comparator of the present invention 1 as shown in Figure 2.Provide bias voltage by input pin 4 input VB1 for tail current source N9 among the figure.Because the power consumption in the circuit is mainly by tail current source N9 decision, the direct power consumption of decision-making circuit of the size of this biasing VB1 so.So the size that this current source should be set is for " receive peace " magnitude, to reduce the power consumption of this hysteresis comparator circuit.Therefore can distribute to the tail current size of this branch road according to the power estimation that chip allows to distribute to this module.

Feedback switch S1 is replaced by PMOS pipe P9 and inverter INV3 because PMOS pipe P9 is a switching tube, design the time should make that the breadth length ratio of P9 is big as far as possible, but too big breadth length ratio can cause again drive not enough.Therefore add inverter INV3 and increase driving force.The breadth length ratio of feedback pipe P8 is determined by amount of hysteresis.Compare with the breadth length ratio of PMOS load P 2, the breadth length ratio of feedback pipe P8 is big more, and sluggishness is big more.When design circuit, selected suitable sluggishness just can be determined the breadth length ratio size of P8.

Positive input terminal V in the core circuit _In1By V _INReplace negative input end V _In2By the V in the circuit _RefReplace.The threshold voltage V of comparator then _THWith V _RefRelevant.Select suitable V _RefNot only relevant with the level that will compare in the chip, also to make the comparator operate as normal.V _RefSelection to make that input pipe N2 can normally and be operated in the saturation region.

In order to make core circuit Fig. 2 that rational output voltage swing and output resistance can be provided, this hysteresis comparator circuit has increased output stage, is made up of PMOS pipe P10, P11 and NMOS pipe N10, N11.Add the output driving force that dual-stage amplifier INV1, INV2 increase circuit in this external circuit.

If V _INEnd is a PAD of chip, so just needs among the figure resistance R shown in 41 and metal-oxide-semiconductor P18, P19, N20 to finish the esd protection function; If not, then can remove this four elements.

Below, the action of the circuit of this hysteresis comparator circuit execution mode is as shown in Figure 4 described.

Work as V _INStart from scratch when gradually changing, input pipe N1 ends, and then load pipe P1 and P5 end; Input pipe N2 conducting, the tail current source electric current I _N9Flow through input NMOS pipe N2 pipe fully, load this moment pipe P2 conducting, corresponding current mirror load P7 is in dark linear zone, and no current flows through.V _O1Be output as electronegative potential, the P11 conducting; And the other end of core circuit output V _O2Difference output high potential, P10 ends, and diode load N10 ends, and corresponding NMOS current mirror N11 pipe ends.The branch road no current of being made up of P11, N11 flows through, and OUT1 is output as high potential, then by V behind the two-stage push-pull output stage _OUTBe high potential.V _OUTFor making PMOS feedback switch pipe P9 conducting behind the high process inverter INV3, the branch road conducting that P8 and P9 form.

Along with V _INIncrease input NMOS pipe N1 conducting gradually gradually.When the electric current by input pipe N1 equals PMOS pipe P7 and feedback pipe P8 drain current sum, V _INArrive positive threshold value V _TH+The electric current of input pipe N2 equals the electric current of the PMOS pipe P2 of diode connection at this moment, and PMOS pipe P1 and P5 do not have electric current to pass through.

Work as V _INInput is during greater than positive threshold voltage, the output V of core circuit _O1Become the grid that high potential is input to output stage PMOS pipe P11, P11 ends; And core circuit difference output V _O2For electronegative potential is input to the grid that output stage PMOS manages P10, P10 conducting.Become single-ended conversion by NMOS current mirror load N11, N13 both-end, P11 drain electrode output OUT1, OUT1 is an electronegative potential.Output OUT1 is through two-stage push-pull output stage output V _OUTBe electronegative potential.V _OUTStep-down makes feedback switch pipe P9 close.

Opposite, work as V _INWhen changing from high to low, the disconnection of feedback switch pipe P9, P8, the not conducting of P9 branch road.When arriving negative threshold value, the electric current of the PMOS such as electric current of N1 pipe pipe P1, the electric current of input pipe N2 equates with the electric current of P5 that again P1, the P5 breadth length ratio of PMOS load current mirror structure are identical in the design.Therefore the negative threshold voltage of circuit just and V _RefIdentical.

Claims (2)

1, a kind of unilateral hysteresis comparator, it is characterized in that: it comprises NMOS pipe N1 and N2, PMOS pipe P1, P2, P5 and sluggish adjuster (11), sluggish adjuster (11) is made of load PMOS pipe P7, feedback pmos P8 and feedback switch S1, is used to regulate the threshold value of comparator; NMOS pipe N1 and N2 symmetry, the breadth length ratio of PMOS pipe P1, P2, P5 and P7 equates;

Wherein, NMOS pipe N1 tube grid is as positive input terminal V _In1, the grid of NMOS pipe N2 pipe is as negative input end V _In2, their source electrode links to each other, and connects the anode of tail current source I1 simultaneously; The negativing ending grounding of current source I1; NMOS pipe N1 drain electrode links to each other with PMOS pipe P1 drain electrode, and is connected to the negative pole of middle load PMOS pipe P7 drain electrode of sluggish adjuster (11) and feedback switch S1; The positive pole of switch S 1 links to each other with the drain electrode of PMOS pipe P8; PMOS pipe P1 leaks level and links to each other with the grid level, becomes diode to connect; The drain electrode of N2 links to each other with PMOS pipe P2 drain electrode, is connected to the drain electrode of PMOS pipe P5 simultaneously; PMOS pipe P2 drain electrode links to each other with its grid, becomes the diode syndeton; PMOS pipe P1 links to each other with the P5 grid, and the grid of PMOS pipe P7, P8 links to each other with PMOS pipe P2 grid in the sluggish adjuster (11); PMOS pipe P1, P2, P5, P7, P8 source electrode link to each other, and insert power supply V together _DDThe negative output terminal V of comparator _O1Draw the positive output end V of comparator from the drain electrode of NMOS pipe N1 _O2Draw from the drain electrode of NMOS pipe N2 pipe.

2, a kind of unilateral hysteresis comparator, it is characterized in that: it comprises PMOS pipe P9 and P10, NMOS pipe N3, N4, N5 and sluggish adjuster (11), sluggish adjuster (11) is made of load NMOS pipe N7, feedback NMOS pipe N8 and feedback switch S1, is used to regulate the threshold value of comparator; PMOS pipe P9 and P10 symmetry, the breadth length ratio of NMOS pipe N3, N4, N5 and N7 equates;

PMOS pipe P9 tube grid is as positive input terminal V _IP9, the grid of PMOS pipe P10 pipe is as negative input end V _IP10, their source electrode links to each other, and connects the anode of tail current source I1 simultaneously; The negativing ending grounding of current source I1; PMOS pipe P9 drain electrode links to each other with NMOS pipe N3 drain electrode, and is connected to the negative pole of N7 drain electrode of the middle load NMOS pipe of sluggish adjuster (11) and feedback switch S1; The positive pole of switch S 1 links to each other with the drain electrode of NMOS pipe N8; NMOS pipe N3 leaks level and links to each other with the grid level, becomes diode to connect; The drain electrode of PMOS pipe P10 links to each other with NMOS pipe N4 drain electrode, is connected to the drain electrode of NMOS pipe N5 simultaneously; NMOS pipe N4 drain electrode links to each other with its grid, becomes the diode syndeton; NMOS pipe N3 links to each other with the N5 grid, and the grid of NMOS pipe N7, N8 links to each other with NMOS pipe N4 grid in the sluggish adjuster (11); NMOS pipe N3, N4, N5, N7, N8 source electrode link to each other, and insert power supply V together _DDThe negative output terminal V of comparator _O1Draw the positive output end V of comparator from the drain electrode of PMOS pipe P9 _O2Draw from the drain electrode of PMOS pipe P10 pipe.

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