CN100551208C - 陶瓷基板制造方法以及使用该陶瓷基板的电子元件模块 - Google Patents
陶瓷基板制造方法以及使用该陶瓷基板的电子元件模块 Download PDFInfo
- Publication number
- CN100551208C CN100551208C CNB2004100983822A CN200410098382A CN100551208C CN 100551208 C CN100551208 C CN 100551208C CN B2004100983822 A CNB2004100983822 A CN B2004100983822A CN 200410098382 A CN200410098382 A CN 200410098382A CN 100551208 C CN100551208 C CN 100551208C
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- Prior art keywords
- ceramic substrate
- protuberance
- film material
- hole
- electronic component
- Prior art date
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- Expired - Fee Related
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B32—LAYERED PRODUCTS
- B32B—LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
- B32B18/00—Layered products essentially comprising ceramics, e.g. refractory products
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4803—Insulating or insulated parts, e.g. mountings, containers, diamond heatsinks
- H01L21/481—Insulating layers on insulating parts, with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
- H01L21/4857—Multilayer substrates
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
- H05K3/207—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
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- C—CHEMISTRY; METALLURGY
- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
- C04B2237/30—Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
- C04B2237/32—Ceramic
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- C—CHEMISTRY; METALLURGY
- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
- C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
- C04B2237/56—Using constraining layers before or during sintering
- C04B2237/562—Using constraining layers before or during sintering made of alumina or aluminates
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- C—CHEMISTRY; METALLURGY
- C04—CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
- C04B—LIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
- C04B2237/00—Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
- C04B2237/50—Processing aspects relating to ceramic laminates or to the joining of ceramic articles with other articles by heating
- C04B2237/62—Forming laminates or joined articles comprising holes, channels or other types of openings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19106—Disposition of discrete passive components in a mirrored arrangement on two different side of a common die mounting substrate
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0367—Metallic bump or raised conductor not used as solder bump
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/30—Details of processes not otherwise provided for in H05K2203/01 - H05K2203/17
- H05K2203/308—Sacrificial means, e.g. for temporarily filling a space for making a via or a cavity or for making rigid-flexible PCBs
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4007—Surface contacts, e.g. bumps
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003408626 | 2003-12-08 | ||
JP408626/2003 | 2003-12-08 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1627884A CN1627884A (zh) | 2005-06-15 |
CN100551208C true CN100551208C (zh) | 2009-10-14 |
Family
ID=34730253
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100983822A Expired - Fee Related CN100551208C (zh) | 2003-12-08 | 2004-12-08 | 陶瓷基板制造方法以及使用该陶瓷基板的电子元件模块 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7378049B2 (zh) |
CN (1) | CN100551208C (zh) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPWO2006035528A1 (ja) * | 2004-09-29 | 2008-05-15 | 株式会社村田製作所 | スタックモジュール及びその製造方法 |
KR100875625B1 (ko) * | 2005-11-14 | 2008-12-24 | 티디케이가부시기가이샤 | 복합 배선 기판 및 그 제조 방법 |
JP5201983B2 (ja) * | 2007-12-28 | 2013-06-05 | 富士通株式会社 | 電子部品 |
US9006028B2 (en) * | 2008-09-12 | 2015-04-14 | Ananda H. Kumar | Methods for forming ceramic substrates with via studs |
JP2010226038A (ja) * | 2009-03-25 | 2010-10-07 | Tdk Corp | セラミック電子部品 |
CN111096090B (zh) | 2017-09-20 | 2023-04-21 | 株式会社村田制作所 | 陶瓷基板的制造方法、陶瓷基板以及模块 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5370759A (en) * | 1992-05-20 | 1994-12-06 | Matsushita Electric Industrial Co., Ltd. | Method for producing multilayered ceramic substrate |
JP2681327B2 (ja) | 1992-07-28 | 1997-11-26 | 株式会社住友金属エレクトロデバイス | バンプ付き回路基板の製造方法 |
US5456778A (en) * | 1992-08-21 | 1995-10-10 | Sumitomo Metal Ceramics Inc. | Method of fabricating ceramic circuit substrate |
KR0179404B1 (ko) * | 1993-02-02 | 1999-05-15 | 모리시타 요이찌 | 세라믹기판과 그 제조방법 |
JP3387189B2 (ja) | 1993-02-02 | 2003-03-17 | 松下電器産業株式会社 | セラミック基板とその製造方法 |
JPH07142630A (ja) | 1993-11-16 | 1995-06-02 | Matsushita Electric Ind Co Ltd | 半導体実装用セラミック基板の製造方法 |
JPH07221104A (ja) * | 1994-01-28 | 1995-08-18 | Fujitsu Ltd | 半導体装置の製造方法及び半導体装置及び電極ピン形成用マスク及び電極ピン形成用マスクを用いた試験方法 |
JP3173410B2 (ja) * | 1997-03-14 | 2001-06-04 | 松下電器産業株式会社 | パッケージ基板およびその製造方法 |
JP2000323806A (ja) | 1999-05-13 | 2000-11-24 | Matsushita Electric Ind Co Ltd | バンプ付セラミック回路基板及びその製造方法 |
JP3716783B2 (ja) * | 2001-11-22 | 2005-11-16 | 株式会社村田製作所 | セラミック多層基板の製造方法及び半導体装置 |
DE102004043273A1 (de) * | 2003-09-09 | 2005-05-04 | Ngk Spark Plug Co | Verfahren zur Herstellung eines Keramiksubstrats und Keramiksubstrat |
-
2004
- 2004-12-07 US US11/005,974 patent/US7378049B2/en not_active Expired - Fee Related
- 2004-12-08 CN CNB2004100983822A patent/CN100551208C/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
CN1627884A (zh) | 2005-06-15 |
US7378049B2 (en) | 2008-05-27 |
US20050151303A1 (en) | 2005-07-14 |
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Legal Events
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: KELAIBO INNOVATION CO., LTD. Free format text: FORMER OWNER: MATSUSHITA ELECTRIC INDUSTRIAL CO, LTD. Effective date: 20141125 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20141125 Address after: American California Patentee after: Craib Innovations Ltd Address before: Osaka Patentee before: Matsushita Electric Industrial Co., Ltd. |
|
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20091014 Termination date: 20161208 |