CN100545942C - 延迟锁定回路电路 - Google Patents

延迟锁定回路电路 Download PDF

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Publication number
CN100545942C
CN100545942C CNB2006101074991A CN200610107499A CN100545942C CN 100545942 C CN100545942 C CN 100545942C CN B2006101074991 A CNB2006101074991 A CN B2006101074991A CN 200610107499 A CN200610107499 A CN 200610107499A CN 100545942 C CN100545942 C CN 100545942C
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China
Prior art keywords
signal
delay
clock
control signal
output
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Active
Application number
CNB2006101074991A
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English (en)
Chinese (zh)
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CN1941177A (zh
Inventor
崔勋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
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Hynix Semiconductor Inc
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Publication of CN1941177A publication Critical patent/CN1941177A/zh
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222Clock generating, synchronizing or distributing circuits within memory device
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076Timing circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/45Differential amplifiers
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/085Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Power Sources (AREA)
CNB2006101074991A 2005-09-29 2006-07-25 延迟锁定回路电路 Active CN100545942C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
KR20050091671 2005-09-29
KR91671/05 2005-09-29
KR117122/05 2005-12-02

Publications (2)

Publication Number Publication Date
CN1941177A CN1941177A (zh) 2007-04-04
CN100545942C true CN100545942C (zh) 2009-09-30

Family

ID=37959241

Family Applications (1)

Application Number Title Priority Date Filing Date
CNB2006101074991A Active CN100545942C (zh) 2005-09-29 2006-07-25 延迟锁定回路电路

Country Status (3)

Country Link
KR (1) KR100733465B1 (ko)
CN (1) CN100545942C (ko)
TW (1) TWI308345B (ko)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100907002B1 (ko) 2007-07-12 2009-07-08 주식회사 하이닉스반도체 지연 동기 루프 및 그의 제어 방법
KR100881401B1 (ko) * 2007-11-02 2009-02-02 주식회사 하이닉스반도체 클럭 동기화 회로 및 클럭 동기화 방법
KR100892726B1 (ko) * 2007-12-21 2009-04-10 주식회사 하이닉스반도체 지연고정루프용 전압 발생 회로, 그를 포함하는 반도체메모리 장치, 및 지연고정루프용 전압 발생 방법
KR100902058B1 (ko) * 2008-01-07 2009-06-09 주식회사 하이닉스반도체 반도체 집적 회로 및 그의 제어 방법
KR100940849B1 (ko) * 2008-08-08 2010-02-09 주식회사 하이닉스반도체 반도체 집적 회로 및 그 제어 방법
TWI401693B (zh) * 2009-01-05 2013-07-11 Nanya Technology Corp 電壓提供電路、以及使用此電壓提供電路的訊號延遲系統
KR101923023B1 (ko) 2011-08-10 2018-11-28 에스케이하이닉스 주식회사 지연고정루프
CN102570780A (zh) * 2011-09-20 2012-07-11 广东美的电器股份有限公司 智能功率模块
US9047237B2 (en) * 2012-08-03 2015-06-02 Cypress Semiconductor Corporation Power savings apparatus and method for memory device using delay locked loop
CN104317361B (zh) * 2014-10-27 2017-08-04 杭州中天微系统有限公司 一种基于指针延迟更新的循环缓冲器
KR20200091679A (ko) * 2019-01-23 2020-07-31 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법
US10923177B1 (en) * 2019-12-23 2021-02-16 Nanya Technology Corporation Delay-locked loop, memory device, and method for operating delay-locked loop
CN114625360B (zh) * 2022-05-16 2022-10-21 西安数道航空技术有限公司 一种无耦合数字化开发平台及系统

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100492794B1 (ko) * 1997-12-24 2005-08-23 주식회사 하이닉스반도체 램버스디램의파워-다운종료제어장치

Also Published As

Publication number Publication date
TWI308345B (en) 2009-04-01
KR20070036547A (ko) 2007-04-03
KR100733465B1 (ko) 2007-06-29
TW200713329A (en) 2007-04-01
CN1941177A (zh) 2007-04-04

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