CN100495668C - 用于制作露出焊盘的球网格阵列封装的方法 - Google Patents
用于制作露出焊盘的球网格阵列封装的方法 Download PDFInfo
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- CN100495668C CN100495668C CNB2006101640890A CN200610164089A CN100495668C CN 100495668 C CN100495668 C CN 100495668C CN B2006101640890 A CNB2006101640890 A CN B2006101640890A CN 200610164089 A CN200610164089 A CN 200610164089A CN 100495668 C CN100495668 C CN 100495668C
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Abstract
一种用于制作露出焊盘的球网格阵列封装(11)的方法,包括向粘合带(18)施加导电板(16)。冲压所述导电板(16)以便形成小片焊盘(24)并且把板的其余部分(26)与粘合带(18)相分隔,使得只有所述小片焊盘(24)留在所述粘合带(18)上。靠近小片焊盘(24)向粘合带(18)施加衬底(28)。把小片(30)附着到小片焊盘(24)并且电耦合到衬底(28)。在粘合带(18)上围绕至少一部分小片(30)、小片焊盘(24)和衬底(28)形成密封剂(34)。从所述小片焊盘(24)、衬底(28)和密封剂(34)移除粘合带(18)。将导电球(36)附着到所述衬底(28)。
Description
技术领域
本发明涉及一种露出焊盘的球网格阵列(Ball Grid Array BGA)封装,并且尤其涉及一种用于制作露出焊盘的BGA封装的方法,包括小片焊盘冲压(die pad stamping)。
背景技术
引脚网格阵列(pin-grid array PGA)和球网格阵列(BGA)是在本领域中已知的微芯片连接配置类型。PGA为基本上正方形的芯片封装,其具有高密度引脚,以使其能够支持来自相关联微芯片的大量输入/输出(I/O)。所述引脚使微芯片能够连接到插槽或适应印刷电路板(printed circuit board PCB)上的可焊孔等。PGA封装的下面看起来像钉板。另一方面,BGA微芯片通常使用在同心矩形中布置的一组焊球来连接到PCB。BGA封装常常用于以下应用中,其中PGA封装可能会由于封装引脚的长度和大小的缘故而占据太多空间。
参照图1,示出了常规的BGA封装100。BGA封装100是堆叠小片(die)封装,包括附着于硅或塑料插入件105的第一小片102和第二小片104。小片102和104借助环氧树脂或粘合剂被机械地结合到插入件105,并借助导线108与所述插入件105互相电气连接。插入件105包括用于在两个小片102和104之间提供电气互连并且接口到焊球110的电路。焊球110向外部衬底、另一个封装、测试器件、电源等提供了电接触。BGA封装100包括密封剂112,用于机械地支持封装100,允许热膨胀及收缩,并且防止污染物接触小片102和104。每个焊球110的一部分被暴露出来并且向小片102和104提供了外部接口。所产生的整个BGA封装100可堆叠到其它BGA封装100或PCB(未示出)上。通常,通过把半导体小片102、104耦合到插入件105的相对表面中的每一个表面上来形成BGA封装100以便改进封装的空间效率。
在图2中示出了另一常规的BGA器件120。BGA器件120包括诸如PCB、柔性带等的半导体衬底122。半导体小片124被安装在BGA器件120内。半导体小片124的表面上的接合焊盘(bonding pad)提供了对小片124的电气通路。在衬底122的表面上施加层128。所述层128可以是铜箔或诸如聚酰亚胺薄膜之类的粘合膜。当层128是粘合膜时,稍后该膜被移除并利用铜箔来替换。模塑复合物(moldcompound)130包裹小片124、接合导线(bond wire)132和衬底122的一部分接触焊盘134。在衬底122的顶表面138上形成铜轨迹136。铜轨迹136与在衬底122的顶表面138中所提供的接触点电接触。接合导线132把小片124的表面中的电接触点与衬底122的表面140上的接触点134相连接。接合导线132通常经由接合球126连接到小片124。接触球142被连接到衬底122的表面140上的接触焊盘144。焊接掩模146覆盖在衬底122的表面140上。焊接掩模146中的开口提供了对接触焊盘134和144的通路。接触焊盘134用于与小片124的导线连接132,并且所述接触焊盘144用于与接触球142阵列的连接。
随着电子器件变得越来越小且更加便于携带,希望提供更薄的BGA器件(即,具有减小的整体高度或厚度)同时保持制造简易和制造质量。希望提供一种比较薄(BGA)类型的封装,其具有小于大约0.8毫米(mm)的形状。还希望提供一种用于形成比较薄的露出焊盘的BGA封装的方法。
发明内容
根据本发明的一个方面,提供了一种用于制作露出焊盘的球网格阵列(BGA)封装的方法,包括:
向粘合带施加导电板;
通过冲压导电板的一部分并且移除导电板的其余部分来从所述导电板形成小片焊盘,其中导电板的所述冲压的部分限定了所述小片焊盘;
靠近所述小片焊盘向粘合带施加衬底;
将半导体小片附着到所述小片焊盘;
将所述小片电耦合到所述衬底的顶表面;
在所述粘合带上利用密封剂来封装至少一部分小片、小片焊盘和衬底;
从所述小片焊盘、衬底和密封剂移除所述粘合带;并且
将至少一个导电球附着到所述衬底的底表面。
根据本发明的另一个方面,一种用于制作露出焊盘的球网格阵列(BGA)封装的方法,包括:
将箔板层叠到粘合带;
通过冲压所述层叠的箔板来在上面形成至少一个小片焊盘;
靠近所述小片焊盘向粘合带施加衬底;
将半导体小片附着到所述小片焊盘;
将所述小片电耦合到所述衬底;
在所述粘合带上利用密封剂封装至少一部分小片、所述小片焊盘和衬底;
从所述小片焊盘、衬底和密封剂移除所述粘合带;并且
将至少一个导电球附着到所述衬底的底表面。
附图说明
当结合附图阅读时可以更好地理解上述概要以及本发明优选实施例的以下详细说明。为了说明本发明,在附图中示出了目前优选的实施例。然而应当理解,本发明不局限于所示出的精确配置和手段。在附图中:
图1是第一种常规的BGA器件的侧视图;
图2是第二种常规的BGA器件的侧视图;
图3是被施加到粘合带的导电板的侧视图以及依照本发明的第一优选实施例来形成小片焊盘的冲压过程;
图4是被施加到粘合带的导电板的侧视图以及依照本发明的第二优选实施例来形成引线框架引线接头(lead frame lead finger)的冲压过程;
图5是被施加到图4的粘合带的衬底的侧视图;
图6是附着于粘合带的图5的衬底的侧视图;
图7是附着于粘合带的图5的衬底的顶部平面图;
图8是附着于图3的小片焊盘的半导体小片和被电耦合到衬底的小片的侧视图;
图9是对图8的部分制造器件所执行的模制过程的侧视图;
图10是在粘合带已经被移除并且导电球已经被贴到衬底之后图9的部分制造器件的侧视图;
图11是通过划分图10的部分形成器件所形成的、依照本发明的第一优选实施例的多个露出焊盘的BGA封装的侧视图;
图12是依照本发明优选实施例的露出焊盘的BGA封装堆叠的侧视图;
图13是依照本发明优选实施例被焊接到印刷电路板的露出焊盘的BGA封装的侧视图;和
图14是依照本发明实施例附着于粘合带上的阵列引线框架的凸起小片的顶部平面图。
具体实施方式
在以下描述中所使用的特定术语只是为了方便起见而并非限制。词“右”、“左”、“下”、“上”在所参考的附图中指代方向。词“向内”和“向外”分别指的是朝向和远离所描述的对象及其指定部分的几何中心的方向。术语包括上面所特别提及的词、其派生词和类似含义的词。另外,在权利要求和说明书的相应部分中所使用的词“一个”意思是“至少一个”。
简言之,本发明是一种用于制作露出焊盘的BGA封装的方法,包括向粘合带施加导电板(conductive sheet)。导电板的一部分被冲压并与板的其余部分相分隔。板的冲压部分定义了小片焊盘,而板的其余部分从粘合带中移除,使得只有所述小片焊盘留在粘合带上。向小片焊盘附近的粘合带施加衬底。半导体小片被附着于小片焊盘并且电耦合到衬底。在粘合带上面围绕至少一部分小片、小片焊盘和衬底形成密封剂。从小片焊盘、衬底和密封剂中移除粘合带,并且把导电球附着于所述衬底。
详细地参照附图,其中相似的附图标记表明相似的元件,图3和5-11示出了依照本发明的第一优选实施例的、用于制作露出焊盘的球网格阵列(BGA)封装14(图11)的方法。
图3示出了被施加到粘合带18的导电板16。粘合带18采用在本领域中公知的类型,诸如聚酰亚胺带等。导电板16可以是铜(Cu)箔或镀有镍(Ni)和/或钯(Pd)的铜箔,或在本领域中已知的其它导电材料。导电板16和粘合带18借助馈送辊22a、22b被半连续地馈送到小片冲压装置或小片冲压器(stamp)20下。导电板16和粘合带18可以从半连续的一卷材料、一叠材料板、薄膜伸展器(stretcher)、挤压机(extruder)等馈送。导电板16借助辊22a被施加到带18。然后由小片冲压器20来冲压板16的一部分以形成小片焊盘(pad)24。在冲压之后,在退出辊22b之后从带18移除板16的其余部分26(脱带)。
如附图所示,小片焊盘24被附着于粘合带18。从粘合带18移除导电板16的其余部分26,使得只有小片焊盘24留在粘合带18上。优选地是,以一定间隔从导电板16冲压多个小片焊盘24。小片冲压器20可以在导电板16中留下矩形、正方形、圆形、椭圆形、多边形或其它几何或非几何形状冲压的印记。小片冲压器20可以具有用于切断导电板材料16的锋利的冲压边缘。此外,可以在同一导电板上使用各种大小的冲压器20以便形成各种大小的小片焊盘。此方法已经被认为非常节约成本并且有益地在带上形成各种大小的小片焊盘。
参照图5,本领域中已知类型的衬底28正被施加到粘合带18,其靠近并且大致围绕小片焊盘24但是与其相互间隔。图6-7示出了附着于粘合带18的衬底28。衬底28包括用于互连的导电轨迹40(图12-13)。
图8示出了附着于小片焊盘24的多个半导体小片30。可以使用任何适当的半导体材料或其它非常规的基础材料来制造每个小片30,可以在所述材料之上或之内形成电子组件。所述小片30可以由例如硅(Si)、锗(Ge)、锗化硅(SiGe)、砷化镓(GaAs)、砷化铟(InAs)、砷化铝镓、碳化硅(SiC)、金刚石、蓝宝石等形成。如在本领域中所知,小片30还包括在半导体材料、导电通路和用于隔离所述导电通路的绝缘体中所形成的各种电子组件(未示出)。使用粘合剂或小片附着材料,诸如聚合体粘合剂、聚酰亚胺粘合剂、环氧树脂、共晶合金等来把小片30固定到小片焊盘24。小片附着材料或粘合剂可以在小片30和小片焊盘24之间提供导热性和/或导电性。
小片30借助导线32电耦合到衬底28的导电轨迹40。导线32可以是铜、金、银、铝等并且被丝焊到小片30上的焊盘和衬底28的导电轨迹40。衬底28的导电轨迹40允许外部连接到导线32,如以下描述所述导线32会被封装或罐封(pot)。导电轨迹40提供了用于通过和穿过衬底28的过孔和路径。可选地,附加电子组件、电介质等可以与衬底28之内或之上的导电轨迹相接触。
图9示出了对图8的部分制造器件所执行的模制过程。在粘合带18上围绕至少一部分小片30、小片焊盘24和衬底28模制诸如环氧树脂复合物或其它罐封材料的密封剂34或环氧树脂34。在衬底28和小片30及小片焊盘24之间的凹陷区域形成了模制的“空腔”,所述空腔允许形成具有良好封装刚度的树脂以及降低“模子顶部”剥离的可能性(即在固化之后树脂的顶部升高)。优选地是,密封剂34在固化期间呈现高强度和低收缩性。密封剂34可能要求固化添加剂和/或加热以便经过预定时段来进行固化。密封剂34被充分固化并变硬以便导线32和导线32到小片30和衬底28的连接点被保护性地嵌入在其中。
如图10所示,从小片焊盘24、衬底28和密封剂34上移除粘合带18。粘合带18的移除使小片焊盘24的下面暴露出来并且能够被焊接和/或电接触。在加工期间,粘合带18允许在不需要支持基座或封装衬底的情况下处理诸如小片30、小片焊盘24和衬底28之类的器件,由此能够形成比较薄的整个BGA封装14(图11)。
多个诸如焊球之类的导电球36被附着于衬底28的导电轨迹40。导电球36提供了从小片30经由导线32到其它外部器件的电连接,所述其它外部器件诸如其它露出焊盘的BGA封装14(图12)、PCB42(图13)、其它外部电气/电子器件等。
图11示出了通过划分或分离图10的部分形成器件所形成的、依照本发明第一优选实施例的两个露出焊盘的BGA封装14。所述划分可以借助化学或机械锯割、穿孔、切片等方式来执行。优选地是,通过辊式或板式馈送粘合带18和导电板16所述过程是半连续的或几乎连续的,从而借助划分过程来形成大量露出焊盘的BGA封装14。
图12示出了依照本发明优选实施例的露出焊盘的BGA封装14的堆叠38。可以借助化学或机械蚀刻、磨削、抛光等来移除在衬底28上的密封剂34,使得露出在衬底28的上表面上的导电轨迹40。位于上面的露出焊盘的BGA封装14的导电球36可以与下面的露出焊盘的BGA封装14的衬底28的上表面上的露出的导电轨迹40对准,从而形成露出焊盘的BGA封装14的堆叠38。露出焊盘的BGA封装14的堆叠38可以被安装在PCB 44(图13)上或电和/或机械连接到其它器件。
图13示出了依照本发明的优选实施例的露出焊盘的BGA封装14,其电和/或机械耦合到印刷电路板(PCB)42以便在印刷电路板器件44上形成封装。优选地是,小片焊盘24借助焊料46电和/或机械耦合到PCB 42。小片焊盘24到PCB 42的电和/或机械耦合在不需要外部冷却片、散热器等的情况下提供了小片焊盘24的比较高的热耗散,同时保持了整个露出焊盘的BGA封装14的比较低的外形。与具有通孔和有限表面区域来用于热耗散的有机衬底相比,从小片30和小片焊盘24到PCB 42存在几乎直接的热耗散路径。如电和/或机械连接期望的那样,可以借助焊接、粘贴、导电罐封、直接接触等把导电球36电耦合到PCB 42。
现在参照图4,示出了被施加到粘合带52的导电板50和用于使用多个小片冲压器20来形成多个引线框架引线接头54的冲压过程。使用图4的过程来形成依照本发明第二优选实施例的露出焊盘的BGA封装48(图14)。可以经由馈送辊22a、22b等馈送导电板50和粘合带52。在使用多个小片冲压器20冲压导电板50之后,从粘合带52上移除导电板50的其余部分58,留下多个引线框架引线接头54,其形成了阵列引线框架64。在此实施例中,半导体小片56具有在其下侧上所形成的多个导电凸起60。将小片56置于阵列引线阵列64的顶部,使得各凸起60位于阵列引线框架64的相应引线接头54上。可以执行回流以便把所述凸起60固定到所述引线接头54。
作为替换,如图14所示,引线接头54可以分别包括用于与小片56的凸起60连接的凸起连接器62,在这种情况下所述凸起连接器62依照图案或图案阵列来布置。如上所述,小片56包括凸起或连接60的图案或图案阵列66,其对应于粘合带52上的引线接头54的图案阵列64,由此允许从小片56到多个引线接头54的多个连接。具有多个凸起60的凸起小片将被附着到图案阵列64。然后进行模制封装和带移除以便形成露出焊盘的BGA封装。
从上述内容可以看出,本发明旨在用于形成露出焊盘的球网格阵列(BGA)封装的方法,包括小片冲压导电板以形成露出的小片焊盘。本发明的实施例被形成为具有可焊接的露出的小片焊盘以用于热耗散的小片在上器件。在优选实施例中,通过在制造过程期间使用聚酰亚胺粘合带作为可移除的处理支撑,通过小片冲压导电箔来形成该器件。本领域技术人员应当理解,在不脱离其宽泛发明原理的情况下可以对上述实施例进行改变。因此应当理解,本发明不局限于所公开的特定实施例,而是意在覆盖了如所附权利要求所定义的本发明的精神和范围内的修改。
Claims (20)
1.一种用于制作露出焊盘的球网格阵列(BGA)封装的方法,包括:
向粘合带施加导电板;
通过冲压导电板的一部分并且移除导电板的其余部分来从所述导电板形成小片焊盘,其中导电板的所述冲压的部分限定了所述小片焊盘;
靠近所述小片焊盘向粘合带施加衬底;
将半导体小片附着到所述小片焊盘;
将所述小片电耦合到所述衬底的顶表面;
在所述粘合带上利用密封剂来封装至少一部分小片、小片焊盘和衬底;
从所述小片焊盘、衬底和密封剂移除所述粘合带;并且
将至少一个导电球附着到所述衬底的底表面。
2.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,还包括:
在冲压步骤中形成多个小片焊盘;
将半导体小片附着到多个小片焊盘中的每一个;并且
划分所述衬底以便形成多个BGA封装,每个BGA封装具有至少一个小片和小片焊盘。
3.如权利要求2所述的用于制作露出焊盘的BGA封装的方法,还包括从所述衬底的上表面移除至少一部分密封剂。
4.如权利要求3所述的用于制作露出焊盘的BGA封装的方法,还包括在另一个露出焊盘的BGA封装上堆叠所述露出焊盘的BGA封装,使得所述露出焊盘的BGA封装的至少一个导电球与所述另一个露出焊盘的BGA封装的衬底的导电轨迹电接触。
5.如权利要求2所述的用于制作露出焊盘的BGA封装的方法,其中从一卷材料、一叠材料板、薄膜伸展器和挤压机中的一个馈送所述导电板和粘合带。
6.如权利要求2所述的用于制作露出焊盘的BGA封装的方法,其中借助锯割、穿孔和切片之一来执行所述划分。
7.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,还包括把所述小片焊盘电耦合到印刷电路板。
8.如权利要求7所述的用于制作露出焊盘的BGA封装的方法,其中所述小片焊盘到所述印刷电路板的电耦合包括焊接。
9.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,其中所述导电板是铜箔、镀镍铜箔、镀钯铜箔和镀镍钯铜箔之一。
10.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,其中粘合带是聚酰亚胺粘合带。
11.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,其中移除所述粘合带使得所述小片焊盘的下面暴露出来。
12.如权利要求1所述的用于制作露出焊盘的BGA封装的方法,其中小片冲压步骤包括在冲压期间使用多个小片冲压器来同时形成多个小片焊盘。
13.如权利要求12所述的用于制作露出焊盘的BGA封装的方法,其中使用各种大小的小片冲压器来形成各种大小的小片焊盘。
14.一种依照如权利要求1所述的方法形成的露出焊盘的球网格阵列(BGA)封装。
15.一种用于制作露出焊盘的球网格阵列(BGA)封装的方法,包括:
将箔板层叠到粘合带;
通过冲压所述层叠的箔板来在上面形成至少一个小片焊盘;
靠近所述小片焊盘向粘合带施加衬底;
将半导体小片附着到所述小片焊盘;
将所述小片电耦合到所述衬底;
在所述粘合带上利用密封剂封装至少一部分小片、所述小片焊盘和衬底;
从所述小片焊盘、衬底和密封剂移除所述粘合带;并且
将至少一个导电球附着到所述衬底的底表面。
16.如权利要求15所述的用于制作露出焊盘的BGA封装的方法,其中所述导电板是铜箔、镀镍铜箔、镀钯铜箔和镀镍钯铜箔之一。
17.如权利要求16所述的用于制作露出焊盘的BGA封装的方法,其中粘合带是聚酰亚胺粘合带。
18.如权利要求15所述的用于制作露出焊盘的BGA封装的方法,其中通过冲压步骤来形成各种大小的小片焊盘。
19.如权利要求15所述的用于制作露出焊盘的BGA封装的方法,其中电耦合步骤包括丝焊。
20.如权利要求15所述的用于制作露出焊盘的BGA封装的方法,还包括:
在冲压步骤中形成多个小片焊盘;
将半导体小片附着到多个小片焊盘中的每一个;并且
分离所述衬底以便形成多个BGA封装,每个BGA封装具有至少一个小片和小片焊盘。
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US11/297,103 US7282395B2 (en) | 2005-12-07 | 2005-12-07 | Method of making exposed pad ball grid array package |
US11/297,103 | 2005-12-07 |
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CN (1) | CN100495668C (zh) |
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DE102004048202B4 (de) * | 2004-09-30 | 2008-05-21 | Infineon Technologies Ag | Verfahren zur Vereinzelung von oberflächenmontierbaren Halbleiterbauteilen und zur Bestückung derselben mit Außenkontakten |
US7990727B1 (en) * | 2006-04-03 | 2011-08-02 | Aprolase Development Co., Llc | Ball grid array stack |
KR101511584B1 (ko) | 2008-09-25 | 2015-04-13 | 해성디에스 주식회사 | 롤 투 롤 반도체부품 제조장치 및 그에 적용되는 이송방법 |
US20110059579A1 (en) * | 2009-09-08 | 2011-03-10 | Freescale Semiconductor, Inc. | Method of forming tape ball grid array package |
CN102054717A (zh) * | 2009-11-10 | 2011-05-11 | 飞思卡尔半导体公司 | 半导体芯片栅格阵列封装及其制造方法 |
KR101384343B1 (ko) * | 2012-05-24 | 2014-04-14 | 에스티에스반도체통신 주식회사 | 칩 패드가 없는 반도체 패키지 제조방법 |
KR101550781B1 (ko) * | 2014-07-23 | 2015-09-08 | (주)오렌지파워 | 2 차 전지용 실리콘계 활물질 입자의 제조 방법 |
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US6744125B2 (en) * | 2001-05-30 | 2004-06-01 | St. Assembly Test Services Ltd. | Super thin/super thermal ball grid array package |
CN1526166A (zh) * | 2001-05-15 | 2004-09-01 | ض� | 具有高密度互连的电子封装件和相关方法 |
US6798057B2 (en) * | 2002-11-05 | 2004-09-28 | Micron Technology, Inc. | Thin stacked ball-grid array package |
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US7154166B2 (en) * | 2001-08-15 | 2006-12-26 | Texas Instruments Incorporated | Low profile ball-grid array package for high power |
SG105544A1 (en) * | 2002-04-19 | 2004-08-27 | Micron Technology Inc | Ultrathin leadframe bga circuit package |
US6940154B2 (en) * | 2002-06-24 | 2005-09-06 | Asat Limited | Integrated circuit package and method of manufacturing the integrated circuit package |
JP4298559B2 (ja) * | 2004-03-29 | 2009-07-22 | 新光電気工業株式会社 | 電子部品実装構造及びその製造方法 |
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CN1526166A (zh) * | 2001-05-15 | 2004-09-01 | ض� | 具有高密度互连的电子封装件和相关方法 |
US6744125B2 (en) * | 2001-05-30 | 2004-06-01 | St. Assembly Test Services Ltd. | Super thin/super thermal ball grid array package |
US6798057B2 (en) * | 2002-11-05 | 2004-09-28 | Micron Technology, Inc. | Thin stacked ball-grid array package |
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MY146062A (en) | 2012-06-29 |
SG133486A1 (en) | 2007-07-30 |
US20070128766A1 (en) | 2007-06-07 |
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CN1979790A (zh) | 2007-06-13 |
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