CN100477203C - 用于测量缝合掩模未对准的偏移量相关电阻器 - Google Patents
用于测量缝合掩模未对准的偏移量相关电阻器 Download PDFInfo
- Publication number
- CN100477203C CN100477203C CNB2004800175316A CN200480017531A CN100477203C CN 100477203 C CN100477203 C CN 100477203C CN B2004800175316 A CNB2004800175316 A CN B2004800175316A CN 200480017531 A CN200480017531 A CN 200480017531A CN 100477203 C CN100477203 C CN 100477203C
- Authority
- CN
- China
- Prior art keywords
- resistor structures
- resistance value
- dependant resistor
- offset
- length
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 230000001419 dependent effect Effects 0.000 title abstract description 7
- 238000000034 method Methods 0.000 claims abstract description 26
- 230000008569 process Effects 0.000 claims abstract description 9
- 238000004519 manufacturing process Methods 0.000 claims abstract description 5
- 238000012360 testing method Methods 0.000 claims description 9
- 239000000523 sample Substances 0.000 claims description 2
- 230000035945 sensitivity Effects 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000012937 correction Methods 0.000 description 2
- 230000008878 coupling Effects 0.000 description 2
- 238000010168 coupling process Methods 0.000 description 2
- 238000005859 coupling reaction Methods 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000002708 enhancing effect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000007717 exclusion Effects 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 230000037361 pathway Effects 0.000 description 1
- 230000007115 recruitment Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5228—Resistive arrangements or effects of, or between, wiring layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Automation & Control Theory (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
Abstract
Description
Claims (24)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US48227803P | 2003-06-25 | 2003-06-25 | |
US60/482,278 | 2003-06-25 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1809924A CN1809924A (zh) | 2006-07-26 |
CN100477203C true CN100477203C (zh) | 2009-04-08 |
Family
ID=33563843
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004800175316A Expired - Fee Related CN100477203C (zh) | 2003-06-25 | 2004-06-25 | 用于测量缝合掩模未对准的偏移量相关电阻器 |
Country Status (7)
Country | Link |
---|---|
US (1) | US7538443B2 (zh) |
EP (1) | EP1642337B1 (zh) |
JP (1) | JP2007526497A (zh) |
CN (1) | CN100477203C (zh) |
AT (1) | ATE356437T1 (zh) |
DE (1) | DE602004005200T2 (zh) |
WO (1) | WO2005004238A2 (zh) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8282490B2 (en) * | 2006-06-02 | 2012-10-09 | Wms Gaming Inc. | Handheld wagering game system and methods for conducting wagering games thereupon |
GB2533967B (en) * | 2015-01-12 | 2021-08-25 | Advanced Risc Mach Ltd | Adapting the usage configuration of integrated circuit input-output pads |
CN105241367A (zh) * | 2015-10-26 | 2016-01-13 | 上海华力微电子有限公司 | 一种缝合工艺对准精度的检测方法及结构 |
US10930571B2 (en) | 2019-02-01 | 2021-02-23 | Samsung Electronics Co., Ltd. | Test structure and evaluation method for semiconductor photo overlay |
CN110058486B (zh) * | 2019-03-26 | 2022-06-28 | 云谷(固安)科技有限公司 | 掩膜板组件及掩膜板组件拼接精度的检测方法 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3808527A (en) * | 1973-06-28 | 1974-04-30 | Ibm | Alignment determining system |
JP3552077B2 (ja) * | 1996-07-26 | 2004-08-11 | ソニー株式会社 | 合わせずれ測定方法及び合わせずれ測定パターン |
US5898228A (en) * | 1997-10-03 | 1999-04-27 | Lsi Logic Corporation | On-chip misalignment indication |
US5998226A (en) * | 1998-04-02 | 1999-12-07 | Lsi Logic Corporation | Method and system for alignment of openings in semiconductor fabrication |
US6305905B1 (en) * | 1999-05-05 | 2001-10-23 | United Technologies Corporation | Bolted-on propeller blade |
US6393714B1 (en) * | 2000-02-25 | 2002-05-28 | Xilinx, Inc. | Resistor arrays for mask-alignment detection |
US6305095B1 (en) * | 2000-02-25 | 2001-10-23 | Xilinx, Inc. | Methods and circuits for mask-alignment detection |
US6323097B1 (en) * | 2000-06-09 | 2001-11-27 | Taiwan Semiconductor Manufacturing Company | Electrical overlay/spacing monitor method using a ladder resistor |
-
2004
- 2004-06-25 JP JP2006517703A patent/JP2007526497A/ja not_active Withdrawn
- 2004-06-25 DE DE602004005200T patent/DE602004005200T2/de not_active Expired - Lifetime
- 2004-06-25 AT AT04756181T patent/ATE356437T1/de not_active IP Right Cessation
- 2004-06-25 WO PCT/US2004/020573 patent/WO2005004238A2/en active IP Right Grant
- 2004-06-25 CN CNB2004800175316A patent/CN100477203C/zh not_active Expired - Fee Related
- 2004-06-25 US US10/567,173 patent/US7538443B2/en not_active Expired - Fee Related
- 2004-06-25 EP EP04756181A patent/EP1642337B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO2005004238A2 (en) | 2005-01-13 |
CN1809924A (zh) | 2006-07-26 |
US7538443B2 (en) | 2009-05-26 |
DE602004005200D1 (de) | 2007-04-19 |
ATE356437T1 (de) | 2007-03-15 |
EP1642337A2 (en) | 2006-04-05 |
JP2007526497A (ja) | 2007-09-13 |
US20070030335A1 (en) | 2007-02-08 |
EP1642337B1 (en) | 2007-03-07 |
WO2005004238A3 (en) | 2005-07-07 |
DE602004005200T2 (de) | 2007-11-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US6716653B2 (en) | Mask alignment structure for IC layers | |
US4386459A (en) | Electrical measurement of level-to-level misalignment in integrated circuits | |
US6080597A (en) | Test pattern structure for measuring misalignment in semiconductor device fabrication process and method for measuring misalignment | |
US6072192A (en) | Test structure responsive to electrical signals for determining lithographic misalignment of vias relative to electrically active elements | |
US20090009196A1 (en) | Analogue measurement of alignment between layers of a semiconductor device | |
CN100477203C (zh) | 用于测量缝合掩模未对准的偏移量相关电阻器 | |
JP3552077B2 (ja) | 合わせずれ測定方法及び合わせずれ測定パターン | |
US5640097A (en) | Test pattern for separately determining plug resistance and interfactial resistance | |
JP2008218921A (ja) | 位置ずれ量の測定用パターンおよび測定方法、ならびに半導体装置 | |
US6518606B1 (en) | Semiconductor device permitting electrical measurement of contact alignment error | |
US6867109B2 (en) | Mask set for compensating a misalignment between patterns and method of compensating a misalignment between patterns using the same | |
US6828647B2 (en) | Structure for determining edges of regions in a semiconductor wafer | |
US20010032978A1 (en) | Semiconductor device | |
JPH07211759A (ja) | 半導体装置の試験方法 | |
US7868629B2 (en) | Proportional variable resistor structures to electrically measure mask misalignment | |
CN118016647A (zh) | 半导体器件及其多晶硅部偏移量的检测方法 | |
KR0179172B1 (ko) | 확산평가용 테스트패턴을 이용한 테스트방법 | |
JP2010114130A (ja) | 半導体装置及びその製造方法 | |
JPH09260443A (ja) | 半導体装置及びそのテスト方法 | |
CN117976659A (zh) | 半导体器件及其阻挡部偏移量的检测方法 | |
JP2839469B2 (ja) | マスク合わせずれ測定用パターン及びその測定方法 | |
JPH07302824A (ja) | パターン層の位置測定方法並びにテストパターン層及びその形成方法 | |
CN117542837A (zh) | 半导体结构及测量方法 | |
US6525417B2 (en) | Integrated circuits having reduced step height by using dummy conductive lines | |
JPH04216647A (ja) | 位置ずれ測定方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
ASS | Succession or assignment of patent right |
Owner name: NXP CO., LTD. Free format text: FORMER OWNER: KONINKLIJKE PHILIPS ELECTRONICS N.V. Effective date: 20070810 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TA01 | Transfer of patent application right |
Effective date of registration: 20070810 Address after: Holland Ian Deho Finn Applicant after: Koninkl Philips Electronics NV Address before: Holland Ian Deho Finn Applicant before: Koninklijke Philips Electronics N.V. |
|
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20090408 Termination date: 20120625 |