CN100440497C - 集成半导体结构 - Google Patents

集成半导体结构 Download PDF

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Publication number
CN100440497C
CN100440497C CNB038157144A CN03815714A CN100440497C CN 100440497 C CN100440497 C CN 100440497C CN B038157144 A CNB038157144 A CN B038157144A CN 03815714 A CN03815714 A CN 03815714A CN 100440497 C CN100440497 C CN 100440497C
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China
Prior art keywords
metal
semiconductor structure
interconnection
pad metal
top layer
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Expired - Fee Related
Application number
CNB038157144A
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English (en)
Chinese (zh)
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CN1666336A (zh
Inventor
R·鲍尔
W·厄特勒
T·弗罗赫米勒
B·戈尔勒
R·格雷德尔
O·纳格勒
O·施梅克比尔
W·斯塔德勒
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Infineon Technologies AG
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Infineon Technologies AG
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Publication of CN1666336A publication Critical patent/CN1666336A/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02Bonding areas ; Manufacturing methods related thereto
    • H01L24/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Wire Bonding (AREA)
CNB038157144A 2002-07-01 2003-06-12 集成半导体结构 Expired - Fee Related CN100440497C (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10229493A DE10229493B4 (de) 2002-07-01 2002-07-01 Integrierte Halbleiterstruktur
DE10229493.3 2002-07-01

Publications (2)

Publication Number Publication Date
CN1666336A CN1666336A (zh) 2005-09-07
CN100440497C true CN100440497C (zh) 2008-12-03

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CNB038157144A Expired - Fee Related CN100440497C (zh) 2002-07-01 2003-06-12 集成半导体结构

Country Status (7)

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US (1) US7190077B2 (enExample)
EP (1) EP1518272B1 (enExample)
JP (1) JP4065876B2 (enExample)
CN (1) CN100440497C (enExample)
DE (2) DE10229493B4 (enExample)
TW (1) TWI237890B (enExample)
WO (1) WO2004004002A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006108329A (ja) * 2004-10-04 2006-04-20 Fujitsu Ltd 半導体装置
CN100413066C (zh) * 2005-11-30 2008-08-20 中芯国际集成电路制造(上海)有限公司 低k介电材料的接合焊盘和用于制造半导体器件的方法
JP5353313B2 (ja) * 2009-03-06 2013-11-27 富士通セミコンダクター株式会社 半導体装置
KR101823677B1 (ko) 2011-04-21 2018-01-30 엘지이노텍 주식회사 엘이디 조명장치
US20130154099A1 (en) * 2011-12-16 2013-06-20 Semiconductor Components Industries, Llc Pad over interconnect pad structure design
CN102571135B (zh) * 2012-02-15 2014-05-14 京信通信系统(中国)有限公司 射频半集成应用装置

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751065A (en) * 1993-08-05 1998-05-12 Lucent Technologies Inc. Integrated circuit with active devices under bond pads
EP1143513A1 (en) * 2000-04-03 2001-10-10 Nec Corporation Semiconductor device and method of fabricating the same

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2598328B2 (ja) * 1989-10-17 1997-04-09 三菱電機株式会社 半導体装置およびその製造方法
KR100267105B1 (ko) * 1997-12-09 2000-11-01 윤종용 다층패드를구비한반도체소자및그제조방법
US5986343A (en) * 1998-05-04 1999-11-16 Lucent Technologies Inc. Bond pad design for integrated circuits
US6232662B1 (en) * 1998-07-14 2001-05-15 Texas Instruments Incorporated System and method for bonding over active integrated circuits
US6087732A (en) * 1998-09-28 2000-07-11 Lucent Technologies, Inc. Bond pad for a flip-chip package
JP2000183104A (ja) * 1998-12-15 2000-06-30 Texas Instr Inc <Ti> 集積回路上でボンディングするためのシステム及び方法
TW430935B (en) * 1999-03-19 2001-04-21 Ind Tech Res Inst Frame type bonding pad structure having a low parasitic capacitance
US7201784B2 (en) * 2003-06-30 2007-04-10 Intel Corporation Surfactant slurry additives to improve erosion, dishing, and defects during chemical mechanical polishing of copper damascene with low k dielectrics

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5751065A (en) * 1993-08-05 1998-05-12 Lucent Technologies Inc. Integrated circuit with active devices under bond pads
EP1143513A1 (en) * 2000-04-03 2001-10-10 Nec Corporation Semiconductor device and method of fabricating the same

Also Published As

Publication number Publication date
JP4065876B2 (ja) 2008-03-26
US20050242374A1 (en) 2005-11-03
DE10229493B4 (de) 2007-03-29
DE10229493A1 (de) 2004-01-29
DE50311482D1 (enExample) 2009-06-10
WO2004004002A1 (de) 2004-01-08
TW200402863A (en) 2004-02-16
JP2006502561A (ja) 2006-01-19
EP1518272B1 (de) 2009-04-29
CN1666336A (zh) 2005-09-07
EP1518272A1 (de) 2005-03-30
US7190077B2 (en) 2007-03-13
TWI237890B (en) 2005-08-11

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