CN100401482C - 外延生长方法以及外延生长用衬底 - Google Patents

外延生长方法以及外延生长用衬底 Download PDF

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CN100401482C
CN100401482C CNB038255286A CN03825528A CN100401482C CN 100401482 C CN100401482 C CN 100401482C CN B038255286 A CNB038255286 A CN B038255286A CN 03825528 A CN03825528 A CN 03825528A CN 100401482 C CN100401482 C CN 100401482C
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中村正志
栗田英树
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Abstract

一种外延生长方法以及外延生长用衬底,所述方法通过衬底支撑工具保持生长用衬底(例如InP衬底),利用有机金属气相生长法使包含3元素或4元素的化合物的半导体层(例如InGaAs层、AlGaAs层、AlInAs层、AlInGaAs层等Ⅲ-Ⅴ族化合物半导体层)在所述生长用衬底上生长,其特征在于,在遍及衬底的整个有效利用区域抛光,以使自(100)方向的倾斜角度为0.00°~0.03°或0.04°~0.10°,使用该生长用衬底在衬底上以0.5.μm以上的厚度形成所述化合物半导体层。

Description

外延生长方法以及外延生长用衬底
技术领域
本发明涉及利用有机金属气相生长法在半导体衬底上形成化合物半导体层的外延生长方法以及外延生长用衬底,特别涉及改善化合物半导体层的表面形态的技术。
背景技术
从前,在发光元件以及受光元件等的半导体元件的用途中,广泛使用使InGaAs层、AlGaAs层、InA1As层、InA1GaAs层、InGaAsP层等的3元体系或4元体系的III-V族化合物半导体层、和InP层依次外延生长在InP衬底上的半导体晶片。该半导体晶片的外延层,例如由有机金属气相生长法(以下称为MOCVD法)形成。
但是,在利用MOCVD法使上述的III-V族化合物半导体层进行外延生长的情况下,在外延层的表面产生小丘状的缺陷,存在表面形态恶化的问题。因此,提出了各种用于改善外廷层的表面形态的技术方案。
例如,在日本专利第2750331号公报(专利文献1)中,为了减少在生长膜的表面产生的泪状缺陷(和小丘状缺陷意思相同),规定进行外延生长时的衬底的面方位。具体地讲,根据使外延层生长时的生长温度以及生长速度,规定使用的化合物半导体单晶衬底的面方位,由此有效降低泪状缺陷的发生。
另外,和上述专利文献1相同的内容公开在M.Nakamura et.al.Journal of Crystal Growth 129(1993)P456-464(非专利文献1)中。
但是,根据上述先有技术,在使InGaAs层、AIGaAs层、A1InAs层、A1InGaAs层等的III-V族化合物半导体层生长在InP衬底的情况下,有时在外延生长层表面观察到不同于小丘状缺陷的异常的变粗糙了的形态(以下,称为异常表面形态)(参照图1)。
本发明目的是为了解决上述问题,其目的在于,提供一种在使InGaAs层、AIGaAs层、A1InAs层、A1InGaAs层等的III-V族化合物半导体层生长于InP衬底的过程中,能够有效防止发生异常表面形态的外延生长方法以及用于外延生长的生长用衬底。
发明内容
以下,简单说明直至完成本发明的过程。
首先,本发明的发明人,根据上述先有技术对使InGaAs层生长在InP衬底上的半导体晶片,调查了其表面形态。其结果是,在使InGaAs层比0.5μm薄地生长时如图1所示那样的异常表面形态完全观察不到,仅在使InGaAs层比0.5μm厚地生长了时,观察到异常表面形态。
另外,异常表面形态有如图2(a)所示沿着衬底的边缘产生的情况,以及如图2(b)所示衬底的一半左右产生的情况等,可知其产生位置根据使用的衬底不同而不同。而且,一般是遍及衬底全范围面方位略微散乱着,因此本发明的发明人等推测如前所述根据衬底的不同异常表面形态的发生状况(发生位置)可能是不同的。
基于这种推测进一步调查后,弄清楚了该异常表面形态集中发生在具有某种特定的面方位的部分,例如从(100)面倾斜了0.03°~0.04°的部分。即,上述的异常表面形态和在衬底的位错位置发生的小丘状缺陷发生机理本质上不同,和衬底的位错无关,仅依存于衬底的面方位而产生。
从以上得到的知识是:使InGaAs层等的III-V族化合物半导体层,以0.5μm以上的厚度外延生长在InP单晶等生长用衬底上的情况下,通过使用在遍及衬底全范围不形成特定的面方位的衬底,能够防止异常表面形态的发生。
本发明是基于上述理解来做的,涉及一种外延生长方法,其利用衬底支撑工具保持生长用衬底,利用有机金属气相生长法使由3元素或4元素构成的化合物半导体层生长在上述半导体衬底上,其特征在于,对衬底的整个有效利用区域进行抛光,使自(100)方向的倾斜角度形成为0.00°~0.03°、或0.04°~0.10°,使用该生长用衬底在衬底上以0.5μm以上的厚度形成上述化合物半导体层。即,如果自(100)面的倾斜角度是0.03°~0.04°,则异常表面形态发生,所以要使用无成为这种面方位的部分的衬底。
这里,所谓有效利用区域,是指在衬底上实施了镜面加工时除去最外周部产生的边缘塌边部分(距离衬底外周约3mm)的中央部分。
再者,也如上述非专利文献1中所示的那样,在倾斜角度为超过0.24°以上的情况下,为了在化合物半导体层的表面产生台阶状的另外的异常形态,将倾斜角度的上限设定为0.24°。
由此,在使用MOCVD法使化合物半导体层外延生长在半导体衬底上时,即使将化合物半导体层的厚度设定为0.5μm以上,也能有效地防止异常表面形态发生。
另外,上述化合物半导体层也可以通过缓冲层形成在上述生长用衬底上。由此,能使结晶质量优良的化合物半导体层外延生长。
另外,在上述生长用衬底上,使至少含有As的III-V族化合物半导体层生长的情况下是有效的。特别适合应用在前述化合物半导体层是InGaAs层或InA1As层的情况。
另外,在上述非专利文献1中,设定在倾斜角度为0.00°~0.03°的情况下,发生小丘状缺陷,如前所述小丘状缺陷的发生仅由有位错结晶引起,所以通过使用位错密度非常低或元位错的结晶衬底,能够防止小丘状缺陷的产生。具体地,优选使用位错密度5000cm-2以下的半导体结晶衬底。
例如,在使上述III-V族化合物半导体层外延生长的情况下,优选使用掺杂硫的InP衬底。
另外,在上述的外延生长方法中,衬底的整个有效利用区域中,也可以使用预先抛光成自(100)方向的倾斜角度为0.00°~0.03°、或0.04°~0.10°的生长用衬底。
附图说明
图1是在外延层的表面产生的异常形态的显微镜照片。
图2是对外延层表面的异常形态的发生位置例举的说明图。
图3是对本实施方式的半导体晶片的层压结构例举的示意图。
具体实施方式
以下,根据附图说明本发明的最佳实施方式。
首先,为了得到适用于本发明的生长用衬底,通过液相直拉法(Liquid Encapsulated Czochralski;LEC),制作了在(100)方向生长的InP单晶。此时,通过使用各种硫、锡、铁作为掺杂剂,来得到位错密度不同的多个InP单晶。再有,各个InP单晶的位错密度是500cm-2以下(掺杂硫)、5000cm-2(掺杂锡)、20000cm-2(掺杂铁)。
而且,将各个InP单晶加工成直径为2英寸的圆柱状,切片以使表面自(100)面倾斜0.00°~0.30°,切出InP衬底。
然后,在这些衬底上,通过有机金属气相生长法形成外延层,制作出如图3所示的层压结构的半导体衬底。具体地,在InP衬底10上形成厚度为0.5μm的InP缓冲层11,在其上形成厚度0.3~2.5μm的InGaAs层12,再使厚度为0.5μm的InP层13依次外延生长。
需要说明的是,在外延生长中,设定生长温度为640℃,生长压力为50torr,总气体流量为601/min。另外,InGaAs层12的生长速度设为1.0μm/h,InP层11、13的生长速度设为2.0μm/h。
对得到的半导体衬底利用显微镜观察InP层13的表面形态,检查了异常表面形态(图1)、小丘状缺陷、台阶状缺陷的产生状况。
在表1中示出了观察结果的一例。
表1
该结果是,在InGaAs层的厚度比0.5μm薄的外延膜中,不管使用的衬底的位错密度、面方位如何,都未观察到异常形态(样品3,4,22,23)。
另一方面,在生长有比0.5μm厚的InGaAs层的情况下,不管掺杂剂的种类以及位错密度如何,在任一衬底上自(100)面的倾斜角度是0.035°、0.037°的情况下,都观察到了异常表面形态(样品5~7、15、24、25)。但是,即使是生长比0.5μm厚的InGaAs层的情况,在自(100)面的倾斜角度是0.035°、0.037°以外时,也未观察到异常表面形态(样品1、2、8~14、16~21、26~28)。
另外,关于小丘状缺陷,如在上述专利文献1、非专利文献1等表示的那样,在认定为有错位结晶的掺杂锡的InP衬底、掺杂铁的InP衬底上,在从(100)的倾斜角度是0.00°~0.05°的情况下观察到了该缺陷(样品13~15、20~25)。
另外,关于台阶状缺陷,如上述非专利文献1所示那样,在倾斜角度超过0.30°的情况下观察到了该缺陷(样品12)。
这样,在用0.5μm以上的厚度使InGaAs层外延生长的情况下,通过使用自(100)面的倾斜角度为0.00~0.03°或0.04°以上的衬底,能防止异常表面形态的发生。另外,通过使用位错密度5000cm-2以下的衬底能防止小丘状缺陷的产生,通过设定自(100)面的倾斜角度小于等于0.25°,能防止台阶状缺陷的产生。
在上述的实施方式中,对在InP衬底上外延生长InGaAs层的例子进行了说明,在InP衬底上,以0.5μm以上的厚度外延生长至少含有As的3元素或4元素组成的III-V族化合物半导体层(例如A1GaAs层、A1InAs层、A1InGaAs层)的情况下,也同样适合应用本发明。
另外,在上述的实施方式中,加工由LEC法在衬底的整个有效利用区域使在(100)方向生长的InP单晶,来得到希望的生长用衬底,也可以使用预先抛光成使衬底的整个有效利用区域自(100)方向的倾斜角度成为0.00°~0.03°或0.04°~0.24°的生长用衬底。
根据本发明,由衬底支撑工具保持生长用衬底,在通过有机金属气相生长法,使包含3元素或4元素组成的化合物半导体层成长在上述半导体衬底上的外延生长方法中,对衬底的整个有效利用区域抛光,使自(100)方向的倾斜角度成为0.00°~0.03°或0.04°~0.24°,做到使用该生长用衬底在衬底上以0.5μm以上的厚度形成上述化合物半导体层,因此,起到能有效防止在形成的化合物半导体层上发生异常表面形态的效果。
工业实用性
本发明不限于使III-V族化合物半导体层生长在InP衬底上的情况,也能适用于,使用要生长的化合物半导体层和晶格常数的差小的结晶衬底,在该结晶衬底上外延生长化合物半导体层的情况。

Claims (11)

1.一种外延生长方法,其通过衬底支撑工具保持生长用衬底,利用有机金属气相生长法在所述生长用衬底上形成包含3元素或4元素的化合物半导体层,其特征在于,对衬底的整个有效利用区域抛光,以使自(100)方向的倾斜角度为0.00°~0.03°或0.04°~0.10°,使用该生长用衬底在衬底上以0.5μm以上的厚度形成所述化合物半导体层。
2.根据权利要求1所述的外延生长方法,其特征在于,在所述生长用衬底上形成缓冲层,在该缓冲层上形成所述化合物半导体层。
3.根据权利要求1或2所述的外延生长方法,其特征在于,所述化合物半导体层是至少含有As的III-V族系化合物半导体层。
4.根据权利要求3所述的外延生长方法,其特征在于,所述化合物半导体层是InGaAs层或InAlAs层。
5.根据权利要求3的所述的外延生长方法,其特征在于,所述生长用衬底是位错密度为5000cm-2以下的半导体结晶衬底。
6.根据权利要求4的所述的外延生长方法,其特征在于,所述生长用衬底是位错密度为5000cm-2以下的半导体结晶衬底。
7.根据权利要求5所述的外延生长方法,其特征在于,所述生长用衬底是InP衬底。
8.根据权利要求6所述的外延生长方法,其特征在于,所述生长用衬底是InP衬底。
9.一种外延生长用衬底,其用于利用有机金属气相生长法在生长用衬底上形成包含3元素或4元素的化合物半导体层的外延生长方法,其特征在于,在衬底的整个有效利用区域中,自(100)方向的倾斜角度是0.00°~0.03°或0.04°~0.10°,该外延生长用衬底用于在衬底上以0.5μm以上的厚度形成所述化合物半导体层。
10.根据权利要求9所述的外延生长用衬底,其特征在于,其是位错密度为5000cm-2以下的半导体结晶衬底。
11.根据权利要求9或10所述的外延生长用衬底,其特征在于,所述生长用衬底是InP衬底。
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