CN100373530C - 多孔膜的处理方法 - Google Patents
多孔膜的处理方法 Download PDFInfo
- Publication number
- CN100373530C CN100373530C CNB2004100182311A CN200410018231A CN100373530C CN 100373530 C CN100373530 C CN 100373530C CN B2004100182311 A CNB2004100182311 A CN B2004100182311A CN 200410018231 A CN200410018231 A CN 200410018231A CN 100373530 C CN100373530 C CN 100373530C
- Authority
- CN
- China
- Prior art keywords
- perforated membrane
- processing method
- film
- corrosion
- hole
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (16)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2004100182311A CN100373530C (zh) | 2004-05-11 | 2004-05-11 | 多孔膜的处理方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CNB2004100182311A CN100373530C (zh) | 2004-05-11 | 2004-05-11 | 多孔膜的处理方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1697123A CN1697123A (zh) | 2005-11-16 |
CN100373530C true CN100373530C (zh) | 2008-03-05 |
Family
ID=35349765
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB2004100182311A Expired - Fee Related CN100373530C (zh) | 2004-05-11 | 2004-05-11 | 多孔膜的处理方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN100373530C (zh) |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0870038A (ja) * | 1994-08-29 | 1996-03-12 | Nec Corp | 半導体装置の製造方法 |
JPH11220024A (ja) * | 1998-02-03 | 1999-08-10 | Hitachi Ltd | 半導体集積回路の製造方法及びその製造装置 |
US6391795B1 (en) * | 1999-10-22 | 2002-05-21 | Lsi Logic Corporation | Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning |
US20030008498A1 (en) * | 2001-07-05 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method of fabricating the same |
-
2004
- 2004-05-11 CN CNB2004100182311A patent/CN100373530C/zh not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0870038A (ja) * | 1994-08-29 | 1996-03-12 | Nec Corp | 半導体装置の製造方法 |
JPH11220024A (ja) * | 1998-02-03 | 1999-08-10 | Hitachi Ltd | 半導体集積回路の製造方法及びその製造装置 |
US6391795B1 (en) * | 1999-10-22 | 2002-05-21 | Lsi Logic Corporation | Low k dielectric composite layer for intergrated circuit structure which provides void-free low k dielectric material between metal lines while mitigating via poisoning |
US20030008498A1 (en) * | 2001-07-05 | 2003-01-09 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method of fabricating the same |
Also Published As
Publication number | Publication date |
---|---|
CN1697123A (zh) | 2005-11-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US9816176B2 (en) | Preparation method for multi-layer metal oxide porous film nano gas-sensitive material | |
US20180226278A1 (en) | Self-limiting atomic thermal etching systems and methods | |
US20120168724A1 (en) | Transfer-free batch fabrication of single layer graphene devices | |
CN109119330B (zh) | 一种半导体器件的形成方法 | |
US5755888A (en) | Method and apparatus of forming thin films | |
US20140084472A1 (en) | Compound dielectric anti-copper-diffusion barrier layer for copper connection and manufacturing method thereof | |
JPWO2010050518A1 (ja) | Euvリソグラフィ用反射型マスクブランク | |
US20160315201A1 (en) | Display device | |
WO2006082756A1 (ja) | 半導体装置とその製造方法、及び製造装置 | |
JP2006352077A (ja) | 半導体構造物の処理方法及び半導体キャパシタの製造方法 | |
CN103871963A (zh) | 一种低介电常数薄膜的成膜方法 | |
KR100332517B1 (ko) | 에칭 방법 및 에칭 마스크 | |
CN100373530C (zh) | 多孔膜的处理方法 | |
US20250028238A1 (en) | Method for manufacturing pellicle and pellicle manufactured thereby | |
US20140131308A1 (en) | Pattern fortification for hdd bit patterned media pattern transfer | |
JP2004349458A (ja) | フッ素添加カーボン膜の形成方法 | |
CN100570828C (zh) | 刻蚀氮化铝薄膜微图形的方法 | |
KR20190054905A (ko) | 마스크 블랭크, 위상 시프트 마스크, 마스크 블랭크의 제조 방법, 및 위상 시프트 마스크의 제조 방법 | |
US20050070042A1 (en) | Apparatus and method for making a tensile diaphragm with an insert | |
KR100464579B1 (ko) | 반도체 장치 제조 방법 | |
US20010049192A1 (en) | Method and system for selectively coupling a conductive material to a surface of a semiconductor device | |
WO2017096626A1 (zh) | 一种在石墨烯表面形成栅介质层及制备晶体管的方法 | |
CN114229838A (zh) | 一种石墨烯器件、多层膜及其制作方法和应用 | |
KR20080109167A (ko) | 운모 기판 위에 버퍼층이 형성된 플렉시블 다결정 실리콘박막 소자 제작용 기판 구조 및 이의 제조방법 | |
JPH01100946A (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SEMICONDUCTOR MANUFACTURING INTERNATIONAL (BEIJING Effective date: 20111123 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20111123 Address after: 201203 No. 18 Zhangjiang Road, Shanghai Co-patentee after: Semiconductor Manufacturing International (Beijing) Corporation Patentee after: Semiconductor Manufacturing International (Shanghai) Corporation Address before: 201203 Shanghai Zhangjiang Road, Zhangjiang High Tech Park of Pudong New Area No. 18 Patentee before: Semiconductor Manufacturing International (Shanghai) Corporation |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20080305 Termination date: 20190511 |
|
CF01 | Termination of patent right due to non-payment of annual fee |