CN100356259C - 薄膜晶体管液晶显示装置的制造方法 - Google Patents

薄膜晶体管液晶显示装置的制造方法 Download PDF

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CN100356259C
CN100356259C CNB200310123510XA CN200310123510A CN100356259C CN 100356259 C CN100356259 C CN 100356259C CN B200310123510X A CNB200310123510X A CN B200310123510XA CN 200310123510 A CN200310123510 A CN 200310123510A CN 100356259 C CN100356259 C CN 100356259C
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孙暻锡
林承武
金贤镇
赵珍熙
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Abstract

本发明公开了一种薄膜晶体管液晶显示装置的制造方法。本发明所要解决的课题是提供一种薄膜晶体管液晶显示装置的制造方法。解决该课题的方案为,本发明中包括下述步骤:在绝缘基板上形成栅电极的步骤;在相对于一定时间连续变化的蒸镀条件下、在包含前述栅电极的绝缘基板的上部上顺序形成第一绝缘膜和第二绝缘膜的步骤;在相对于一定时间连续变化的蒸镀条件下、在前述第二绝缘膜的上部顺序形成第一非晶硅层和第二非晶硅层、并形成活性层的步骤;在前述活性层的上部顺序形成在前述活性层的上部顺次形成欧姆接触层和源/漏电极的步骤;以及在包含前述源/漏电极的形成物的上部形成保护膜的步骤。

Description

薄膜晶体管液晶显示装置的制造方法
技本领域
本发明涉及一种薄膜晶体管液晶显示装置的制造方法,更详细地说,涉及一种利用等离子化学气相蒸镀法、在蒸镀时连续改变蒸镀条件并缓解应力以防止基板畸变的薄膜晶体管液晶显示装置的制造方法。
背景技术
通常,在笔记本电脑、移动电话、PDA等移动通讯设备中使用的薄膜晶体管液晶显示装置的发展趋势是逐渐轻量化、薄膜化。因此,作为基板使用的玻璃基板也需要减薄厚度和降低密度。
但是,在基板的厚度减薄,且在薄膜晶体管制造工序中的最高温度下利用等离子化学气相蒸镀法(Plasma Enhanced Chemical Vapor Deposition:PECVD)蒸镀很厚的多层结构(即、SiN绝缘层、非晶硅的活性层和杂质非晶硅的欧姆接触层)的情况下,由于应力造成的玻璃基板畸变现象变得明显。
这种现有多层结构是通过顺序蒸镀SiN层、非晶硅层和杂质非晶硅层、并在液晶显示元件上构成绝缘层、活性层和欧姆接触层而形成的,这种多层结构各自的蒸镀条件(使用的气体种类、气体流量、电极间隔、功率、压力)不同。
并且,前述等离子化学气相蒸镀法,在利用等离子使反应气体活化之后,进行由于化学反应和等离子所导致的能量传递,大部分压缩应力产生于前述绝缘层和活性层中。
即,虽然在绝缘层的情况下主要使用SiN或SiON,但是,由于第一绝缘层必须具有足够的厚度以便用于使栅电极和数据电极绝缘,因而通常采用几乎没有应力的条件。相反,考虑到薄膜晶体管的特性,在没有粗糙度(roughness)的条件下蒸镀与活性层形成界面的第二绝缘膜,这种前述第二绝缘膜的蒸镀条件与前述第一绝缘膜的蒸镀条件相比产生突然的变化。
并且,在构成活性层的第一和第二非晶硅层的情况下,由于利用通道层的蚀刻去除掉以数百以上的厚度形成通道层的第一非晶硅层,虽然以提高生产率为目的在蒸镀速度快的条件下蒸镀第二非晶硅层,但是这种前述第二非晶硅层的蒸镀条件与前述第一非晶硅层的蒸镀条件相比产生突然的变化。
但是,这种蒸镀条件的突然变化难以与下面的层相配合,从而产生应力,由于通过等离子体承受相当大的应力,所以存在使薄膜晶体管的特性下降且绝缘基板的畸变程度增加、在进行后续工序时发生破损的可能性提高、成品率下降的问题。
发明内容
因此,本发明是为了解决前述现有技术的诸多问题而提出的,其目的是,提供一种薄膜晶体管液晶显示装置的制造方法,通过在绝缘层和活性层蒸镀时使蒸镀条件随时间连续地变化、缓解应力,减少绝缘基板的畸变,防止破损并提高成品率,可以防止由于应力造成薄膜晶体管特性下降。
为了实现上述目的,本发明中,包括下述步骤:
在绝缘基板上形成栅电极的步骤;
在相对于一定时间连续变化的蒸镀条件下、在包含前述栅电极的绝缘基板的上部上顺序形成第一绝缘膜和第二绝缘膜的步骤,在该步骤中,在功率、压力和电极间隔的第一蒸镀条件下形成第一绝缘膜,之后,在使前述第一蒸镀条件的至少一项以上连续变化的第二蒸镀条件下连续形成第二绝缘膜;
在相对于一定时间连续变化的蒸镀条件下、在前述第二绝缘膜的上部顺序形成第一非晶硅层和第二非晶硅层、并形成活性层的步骤;
在前述活性层的上部顺序形成欧姆接触层和源/漏电极的步骤;以及
在包含前述源/漏电极的形成物的上部形成保护膜的步骤。
并且,本发明中,包括下述步骤:
在绝缘基板上形成栅电极的步骤;
在相对于一定时间连续变化的蒸镀条件下、在包含前述栅电极的绝缘基板的上部上顺序形成第一绝缘膜和第二绝缘膜的步骤,在该步骤中,在功率、压力和电极间隔的第一蒸镀条件下形成第一绝缘膜,之后,在使前述第一蒸镀条件的至少一项以上连续变化的第二蒸镀条件下连续形成第二绝缘膜;
在相对于一定时间连续变化的蒸镀条件下、在前述第二绝缘膜的上部顺序形成第一非晶硅层和第二非晶硅层的步骤,在该步骤中,在功率、压力和电极间隔的第三蒸镀条件下形成第一非晶层之后,在使前述第三蒸镀条件中的至少一项以上连续变化的第四蒸镀条件下,连续形成第二非晶硅层;
在前述活性层的上部顺序形成欧姆接触层和源/漏电极的步骤;以及在包含前述源/漏电极的形成物的上部形成保护膜的步骤。
从对本发明优选实施例的下述说明中可以明确上述本发明的目的和其它特征及优点等。
附图说明
图1是图示表示根据本发明优选实施例的薄膜晶体管液晶显示装置的制造方法的工序剖面图;
图2的a和b是图示表示根据本发明优选实施例的功率和压力造成的应力变化的曲线图。
具体实施方式
以下,根据附图更详细地说明本发明的优选实施例。
图1是图示表示根据本发明优选实施例的薄膜晶体管液晶显示装置的制造方法的工序剖面图,图2a和图2b是图示表示根据本发明优选实施例的应力随功率和压力的变化的曲线图。
根据本发明的薄膜晶体管液晶显示装置的制造方法,如图1所示,首先在透明的绝缘基板100上形成栅电极110。
其次,利用PECVD方法在包含前述栅电极110的绝缘基板100上顺序蒸镀第一绝缘膜120a和第二绝缘膜120b,形成绝缘层120。这时,在前述第一和第二绝缘膜蒸镀时,使功率、电极间隔和压力相对于时间连续变化。因此,由于蒸镀条件不会突然地变化,所以可以缓解应力,防止绝缘基板100畸变。
例如,在功率为1300W、电极间隔为1000mils以及压力为1700mTorr的条件下,形成前述第一绝缘膜120a,在功率为1300W、电极间隔为600mils以及压力为1200mTorr的条件下形成前述第二绝缘膜120b,在这种情况下,一边使电极间隔相对于时间连续地从1000mils变化至600mils,一边进行蒸镀工序,并且,一边使压力相对于时间从1700mTorr连续变化至1200mTorr,一边进行蒸镀工序。即,在通常的PECVD装置,由于利用马达的旋转调节电极间隔,所以当马达的旋转速度连续增加或减少地进行调节时,电极间隔可以随着时间连续地变化,并且,由于利用泵的泵取速度调节压力,所以当连续调节泵取速度时,压力可以随着时间连续地变化。
并且,在前述第一绝缘膜的厚度例如为2000~5000、优选在3000~4000的程度下进行蒸镀的情况下,将前述第二绝缘膜的厚度蒸镀成350~650、优选450~550的程度。
接着,在前述第二绝缘膜120b的上部顺次蒸镀第一非晶硅层130a和第二非晶硅层130b,形成活性层130。这时,以与前面所述的绝缘层蒸镀方法相同的方法进行前述第一和第二非晶硅层的蒸镀。即,功率、电极间隔和压力的蒸镀条件随着时间连续变化。因此,由于蒸镀条件不会突然变化,所以可以缓解应力、防止绝缘基板100畸变。例如,在第一非晶硅层的蒸镀时的第三蒸镀条件的情况下,以电极间隔为500~550mils左右、压力为2500mTorr~3500mTorr左右、功率为100~200W左右的条件进行蒸镀工序,但是,在第二非晶硅层的蒸镀时的第四蒸镀条件的情况下,电极间隔和压力保持与第一非晶硅层蒸镀时的条件相同,但是功率连续变化至300~600W左右,同时进行蒸镀。这时,第一非晶硅层的厚度大约为200~500左右,第二非晶硅层的厚度大约为1300~1600左右。但是,本实施形式,可以仅使前述功率连续变化并同时进行蒸镀。另一方面,本发明可以在前述情况以外进行多种改变并加以实施。
接着,在前述第二非晶硅层130b的上部顺序形成欧姆接触层140和源/漏电极150。
接着,在包含前述源/漏电极150的形成物的上部形成保护膜160。这时,以与前面说明的绝缘层的蒸镀方法相同的方法进行前述保护膜160的蒸镀。即,通过使功率、电极间隔和压力相对于时间连续变化,缓解应力并防止绝缘基板100畸变。
以下的后续工序与现有方法相同,因而为了方便起见省略对其的说明。
发明的效果
如上面详细说明的那样,采用本发明,通过在绝缘层和活性层蒸镀时使蒸镀条件连续变化并缓解应力,具有可以减少绝缘基板畸变并防止破损、增加成品率的效果。
并且,具有防止由于应变造成薄膜晶体管的特性下降并且可以制造平坦的液晶显示元件的效果。
另一方面,本发明不限于上面详细说明的特定的优选实施例,具有本发明所属领域的通常的知识的人,均可在不脱离权利要求的范围内的本发明主旨的情况下进行多种改变。

Claims (8)

1、一种薄膜晶体管液晶显示装置的制造方法,包括下述步骤:
在绝缘基板上形成栅电极的步骤;
在相对于一定时间连续变化的蒸镀条件下、在包含前述栅电极的绝缘基板的上部上顺序形成第一绝缘膜和第二绝缘膜的步骤,在该步骤中,在功率、压力和电极间隔的第一蒸镀条件下形成第一绝缘膜,之后,在使前述第一蒸镀条件的至少一项以上连续变化的第二蒸镀条件下连续形成第二绝缘膜;
在相对于一定时间连续变化的蒸镀条件下、在前述第二绝缘膜的上部顺序形成第一非晶硅层和第二非晶硅层,从而形成活性层的步骤;
在前述活性层的上部顺序形成欧姆接触层和源/漏电极的步骤;以及
在包含前述源/漏电极的形成物的上部形成保护膜的步骤。
2、如权利要求1所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,前述第二绝缘膜蒸镀时采用的第二蒸镀条件之中的功率、电极间隔以及压力中的至少一项以上,比作为前述第一蒸镀条件的功率、电极间隔和压力小。
3、如权利要求2所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,调节马达的旋转速度以使前述电极间隔连续变化,调节泵的泵取速度以使前述压力连续变化。
4、如权利要求2所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,使前述电极间隔从1000mils连续变化至600mils,使前述压力从1700mTorr连续变化至1200mTorr。
5、如权利要求1所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,在相对于一定时间连续变化的蒸镀条件下形成前述第一和第二非晶硅层,在功率、压力以及电极间隔的第三蒸镀条件下形成第一非晶硅层,之后,在使前述第三蒸镀条件的至少一项以上连续变化的第四蒸镀条件下连续形成第二非晶硅层。
6、如权利要求5所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,调节马达的旋转速度以使前述电极间隔连续变化,调节泵的泵取速度以使前述压力连续变化。
7、如权利要求5所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,在第一蒸镀条件和第二蒸镀条件之间,使前述电极间隔从1000mils连续变化至600mils,使前述压力从1700mTorr连续变化至1200mTorr。
8、如权利要求5所述的薄膜晶体管液晶显示装置的制造方法,其特征在于,在第三蒸镀条件和第四蒸镀条件之间,使前述功率从100W连续变化至600W。
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TWI249251B (en) * 2004-11-22 2006-02-11 Au Optronics Corp Fabrication method of thin film transistor
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TWI585498B (zh) 2006-05-16 2017-06-01 半導體能源研究所股份有限公司 液晶顯示裝置和半導體裝置
JP2009099636A (ja) * 2007-10-15 2009-05-07 Hitachi Displays Ltd 表示装置および表示装置の製造方法
CN102007597B (zh) * 2008-04-17 2014-02-19 应用材料公司 低温薄膜晶体管工艺、装置特性和装置稳定性改进
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CN107146792B (zh) * 2017-05-11 2019-07-30 京东方科技集团股份有限公司 一种静电防护装置及其制作方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010007358A1 (en) * 1997-10-21 2001-07-12 Kabushiki Kaisha Advanced Display Liquid crystal display and manufacturing process of thin film transistor used therein
US20020168803A1 (en) * 2001-05-09 2002-11-14 Lg. Philips Lcd Co., Ltd. Method for re-forming semiconductor layer in TFT-LCD
US20020182783A1 (en) * 2001-06-01 2002-12-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor film, semiconductor device and method for manufacturing same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010007358A1 (en) * 1997-10-21 2001-07-12 Kabushiki Kaisha Advanced Display Liquid crystal display and manufacturing process of thin film transistor used therein
US20020168803A1 (en) * 2001-05-09 2002-11-14 Lg. Philips Lcd Co., Ltd. Method for re-forming semiconductor layer in TFT-LCD
US20020182783A1 (en) * 2001-06-01 2002-12-05 Semiconductor Energy Laboratory Co., Ltd. Semiconductor film, semiconductor device and method for manufacturing same

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