CN100338270C - Monocrystalline silicon buffing sheet heat treatment process - Google Patents
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- CN100338270C CN100338270C CNB2004100886095A CN200410088609A CN100338270C CN 100338270 C CN100338270 C CN 100338270C CN B2004100886095 A CNB2004100886095 A CN B2004100886095A CN 200410088609 A CN200410088609 A CN 200410088609A CN 100338270 C CN100338270 C CN 100338270C
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Abstract
The present invention relates to heat treatment technology for obtaining a clean area for a silicon sheet, and comprises the following steps: first step, quick heat treatment to the silicon sheet; second step, oxidation anneal technology; third step, anneal technology; fourth step, oxygen deposition growth. The present invention technology is characterized in that quick anneal is combined with normal anneal to obtain initial core distribution of oxygen deposition. The quick anneal and vacancy injection ensure that high oxygen deposition density is obtained finally; oxygen deposition is formed in a method that self-gap silicon atoms are injected through oxidation anneal, surface vacancies are neutralized, and surface oxygen deposition is inhibited, and the obtaining of a surface clean area is finally ensured.
Description
Technical field
The present invention relates to a kind of monocrystalline silicon buffing sheet heat treatment process, particularly a kind ofly utilize rapid thermal process (RTA) technology and common annealing to combine to handle the processing method that monocrystalline silicon buffing sheet obtains clean area.
Background technology
Monocrystalline silicon piece is the main substrate material of modern super large-scale integration, generally obtains silicon single-crystal by vertical pulling (the Czochralski method is called for short the CZ method), then through section, lead angle, abrasive disc, corrosion, it is silicon polished to obtain the unicircuit level semiconductor after the technologies such as polishing.CZ method technology is commonly called vertical pulling method at home, or Czochralski method.This technology is that polysilicon is put into quartz crucible, and heat fused immerses the silicon single-crystal of a particular crystal orientation (calling seed crystal) in the melt silicon then, slowly promotes seed crystal and just can obtain single crystal rod.Because near the fusing point (1420 ℃) of silicon, quartz crucible can decompose, and makes melt silicon be subjected to the contamination of various foreign matters, the material of these contaminations mainly is an oxygen.In the crystal pulling process, oxygen can enter monocrystalline inside, is in interstitial site.The rapid reduction owing to the decline of the solubility with temperature of oxygen in silicon.So, drawing out next silicon single-crystal by the CZ method, inner oxygen all generally all is in the supersaturation attitude.
The general oxygen impurities content of the silicon single-crystal that the CZ method draws is 5 * 10
17Atom/cm
3To 9 * 10
17Atom/cm
3Between, be in the interstitial site of lattice.After monocrystalline generated, in 1420 ℃ to 750 ℃ temperature range process of cooling, oxygen precipitation can be in the inner nucleation of monocrystalline.Will make the initial precipitation nucleation disappear by the thermal treatment that is no more than 1300 ℃.But handle silicon chip in 1000～700 ℃ temperature range, oxygen precipitation coring will be stabilized in the silicon chip, and long-time insulation can make these oxygen precipitation corings grow up, and forms oxygen precipitation.Elementary cell that it is generally acknowledged oxygen precipitation is SiOx (x ≈ 2), and its volume will increase.So the formation of oxygen precipitation core and growth needs overcome very big strain stress.The room can rapid diffusion at high temperature, alleviates the lattice distortion that oxygen precipitation causes or form O-V and O in nucleation process
2The complex body of V promotes the forming core of oxygen precipitation to grow up.Therefore the room precipitation that can promote oxygen.On the contrary, can suppress the formation of oxygen precipitation from the existence of interstitial atom.
The thermal treatment process of introducing in the device manufacturing causes the gathering of oxygen in the silicon chip, finally generates oxygen precipitation.Oxygen precipitation in the silicon chip has dual function: the oxygen precipitation that is in the device workspace can cause component failure, as the puncture of gate oxide, forms junction leakage electric current etc.; And the oxygen precipitation that is in non-device workspace can be captured the deleterious magnesium-yttrium-transition metal impurity of introducing in the device manufacturing as the gettering center.
In IC making processes, the complete processing of silicon chip is complicated day by day, can introduce a lot of metallic impurity in technological process.Verified: the transition metal of rapid diffusion (as Fe, Cu, Ni etc.) can perhaps enter lattice defect and form deep energy level defect in the inner nucleation of silicon chip.The defective of these metals and formation can produce leakage current, reduces minority carrier life time, cause SiO
2Film punctures and influences the C-t characteristic of MOSFET.So the super large-scale integration manufacturing requires to reduce the metal contamination of introducing in the technological process with working with utmost efforts.
The intrinsic gettering technology is a kind of impurity-absorbing technique of removing magnesium-yttrium-transition metal effectively from active device region.It is double properties and the fireballing character of metal diffusing of utilizing oxygen precipitation, forms the oxygen precipitation of sufficient density by thermal treatment process in wafer bulk, as the trapping center of metallic impurity; And in the device work area, grow up by suppressing the oxygen precipitation forming core, make the interior formation of device workspace not have the clean area of oxygen precipitation.After device technology is finished, handle wafer by high temperature annealing (annealing about 1000 ℃), make metal contamination rapidly to the wafer bulk internal diffusion, near oxygen precipitation, be fixed.
The key parameter of absorbing the technology quality in weighing is: the thickness of clean area and oxygen precipitation density.Generally wish clean area thin (than thick 10～20 microns of device workspace), the oxygen precipitation below the clean area is wanted enough height simultaneously.
Conventional interior absorption technology is the three-step annealing method:
The first step. high temperature annealing makes oxygen generation external diffusion in the surf zone.Annealing temperature is about 1100～1150 ℃;
Second step. the thermal treatment of oxygen precipitation forming core.By the thermal treatment under the low temperature (600～800 ℃), make supersaturation interstitial oxygen concentration generation oxygen precipitation forming core;
The 3rd step. oxygen precipitation is grown up.By the thermal treatment under high temperature (1000～1150 ℃), the oxygen precipitation forming core begins to grow up to form and absorbs trap, and forms clean area in the silicon chip surface zone.
This traditional method for annealing has serious defective, shows that mainly clean area thickness is big to the initial oxygen degree of dependence.Because the restriction of crystal-pulling condition, the monocrystalline oxygen level skewness vertically that obtains, generally in the head oxygen level of monocrystalline than higher, lower at the middle part, afterbody has and begins to raise, add the influence of thermal field, make that the oxygen level of the silicon chip that obtains on the same monocrystalline is variant, oxygen precipitation coring is also inconsistent.And traditional method for annealing generally can big batch (as 100/batches) be heat-treated, the serious problem of bringing like this is exactly, because oxygen level and oxygen precipitation forming core state is different, to cause the degree of depth of this batch oxygen external diffusion in oxygen external diffusion technology inconsistent, the variable thickness sample in the clean district that terminates most.Secondly this technology relies on the initial oxygen concentration in the silicon chip strongly, is difficult to form enough gettering centers for the lower silicon chip of oxygen concn.
Summary of the invention
The purpose of this invention is to provide a kind of silicon chip quick thermal treatment process that can obtain high oxygen precipitation density and wide clean area.
The objective of the invention is to reach by following technical solution:
The first step technology is carried out rapid thermal process to silicon chip exactly, and this process can be carried out in the RTP of any commercialization annealing furnace.The RTP annealing furnace is to use the halogen lamp heating, can make silicon chip be heated to design temperature rapidly, and the top temperature of heating is generally 1250 ℃.In this step process, adopt ammonia as protective atmosphere.Allow silicon chip 1200 ℃ the insulation 5～40 seconds after, fast cooling.Rate of temperature fall remains on 20～100 ℃/S.The monolithic annealing process is generally adopted in short annealing, and the treatment time of every silicon chip was about about 4 minutes.
Use the purpose of quick thermal treatment process to mainly contain two.At first be to eliminate the oxygen precipitation forming core that initial thermal history causes, especially eliminate the oxygen precipitation core in surface region 10 μ m～100 mu m ranges.If the initial forming core of these oxygen precipitations can not be eliminated, the initial forming core of these oxygen precipitations can be grown up on the surface in the thermal treatment process of postorder, causes clean area to form difficulty.Secondly, obtain the supersaturation room of high density.Because ammonia at high temperature can decompose, the nomadic nitrogen atom of meeting generating portion.The nitrogen-atoms of free state can react with silicon chip, at silicon chip surface incomplete nitrogenize takes place, and makes silicon chip surface that nitrogenize can take place and generates silicon nitride (Si
3N
4).The generation of silicon nitride makes in a large amount of rooms of formation at the interface of silicon nitride and silicon.The room can be spread rapidly and be arrived silicon chip inside in the time of 1200 ℃.Simultaneously according to Schottky and Frenkel mechanism, form a large amount of in the silicon chip from interstitial atom and room.In this process, the room is constantly to internal divergence, and is also compound from interstitial atom simultaneously, finally forming room distribution shown in Figure 1.
Second step of technology is oxidation annealing process, and different with rta technique is that this step process carries out in horizontal chamber oven, is batch process.Annealing temperature is best between 850～950 ℃.Annealing atmosphere is an oxygen-containing atmosphere, and the ratio of oxygen is not less than 40%, and the treatment time is 10 to 60 minutes.The ratio of oxygen preferably is not less than 50% in the oxygen-containing atmosphere in described second step.
Silicon chip is annealed under oxygen-containing atmosphere surface oxidation can be taken place.Form one deck silicon oxide film.In the process that forms oxide film, at Si-SiO
2At the interface, because the incomplete oxidation of silicon can will cause from the injection of interstitial atom to crystals like this generating in a large number from the gap Siliciumatom at the interface.React with the room in zone, top layer, cause forming in the future clean area.
Improve annealing temperature, soaking time, oxygen partial pressure, then can cause clean area to broaden, otherwise narrow down.
Three-step annealing technology, i.e. the oxygen precipitation coring technology of growing up.Allow silicon chip 800 ℃ of insulations 4 hours exactly, begin nucleation at low thermophase (800 ℃) oxygen precipitation.
The 4th step. oxygen precipitation is grown up.By the thermal treatment under high temperature (900～1000 ℃), oxygen precipitation coring begins to grow up and forms the gettering trap.And at silicon chip surface zone formation clean area.Treatment time is 4 hours, and nitrogen is protective atmosphere.This annealing process is generally implemented in device fabrication by device producer.
The parameter of determining the processing performance quality mainly contains: the density of oxygen precipitation in the thickness of clean area, body.Modern device technology wishes to obtain thin clean area, and wishing simultaneously has enough oxygen precipitations to serve as the gettering center.The detection method of concrete processing performance parameter is: behind the 4th step annealing, with silicon chip edge (111) or (100) crystal face cleavage, corroded 5 minutes by the wright corrosive fluid then; Again by rinsed with deionized water, observe with metaloscope at once after drying up.According to the scale in the microscope, can measure the thickness of clean area.Quantity by oxygen precipitation in the range estimation visual field can obtain oxygen precipitation density.
Second step process plays keying action in the forming process of clean area, after not carrying out silicon chip cleavage that second step handled, corrosion, observe under metaloscope, but finding that oxygen precipitation density is very high on the cleavage surface does not have clean area to generate.
Short annealing and oxidizing annealing are the decisive technology of decision oxygen precipitation density and clean area thickness.The data that obtain under the contrast different technology conditions are found: raising short annealing holding temperature, soaking time, rate of temperature fall will obtain higher oxygen precipitation density.The temperature, soaking time, the oxygen partial pressure that improve oxidizing annealing can be so that clean area broaden.
Modern silicon chip production technique generally will experience following steps: crystal-pulling-monocrystalline barreling-section-lead angle-abrasive disc-corrosion-hot alms giver eliminates annealing-polishing-cleaning-encapsulation.The present invention is very practical to the silicon chip manufacturing process, uses the present invention can substitute hot alms giver and eliminates annealing, promptly handles at glossing fast implementation fast annealing later.The silicon chip manufacturing process changes crystal-pulling-barreling-section-lead angle-abrasive disc-corrosion-rough polishing-short annealing-oxidizing annealing-cleaning-finishing polish-cleaning-encapsulation into after using the present invention.
Propose to use the shielding gas of ammonia atmosphere in the present invention, in the hope of obtaining higher vacancy concentration (high vacancy concentration will cause high oxygen precipitation density) in whole silicon wafer inside as short annealing; Behind rta technique, introduced simultaneously 950 ℃ oxidizing annealing,, reached the purpose of injecting from the gap Siliciumatom by the oxidized silicon chip surface.By the vacancy concentration in interstitial atom is offset the zone, top layer that injects, make the top layer vacancy concentration reduce.The technology that oxygen precipitation coring is grown up is carried out after 950 ℃ of anneal, processing parameter consistent with conventional annealing (800 ℃ are incubated 4 hours, and 1000 ℃ are incubated 16 hours).In 800 ℃ of nucleation technologies, owing to the injection of zone, top layer from interstitial atom, vacancy concentration reduces, and has suppressed the gathering nucleation from the interstitial oxygen concentration atom, forms clean area subsequently.
Technology of the present invention is that short annealing and conventional annealing combine and obtain the distribution of oxygen precipitation initial cores: inject the room by short annealing and guarantee the final very high oxygen precipitation density that obtains; Inject from the gap Siliciumatom by oxidizing annealing, in and the room, top layer, suppress the top layer oxygen precipitation and form oxygen precipitation, guarantee that finally there is the generation of clean area on the top layer.
Below by the drawings and specific embodiments the present invention is done further explanation and explanation, and do not mean that limiting the scope of the invention.
Description of drawings
Fig. 1. for room behind short annealing and the oxidizing annealing at the distribution plan of silicon chip inside.
Fig. 2 a. is the corrosion diagram of non-oxidation annealed silicon chip cleavage surface.
Fig. 2 b. has the corrosion diagram of the silicon chip cleavage surface of oxidizing annealing.
Fig. 3. be the influence curve of oxidizing annealing to clean area thickness.
Embodiment
Embodiment
Under ammonia atmosphere, silicon chip is carried out the RTA treatment process, then silicon chip is carried out oxidizing annealing.Under all identical situation of other processing condition, change the time of oxidizing annealing, at last silicon chip is carried out 800 ℃ of insulations 4 hours, 16 hours thermal treatment process of 1000 ℃ of insulations generate oxygen precipitations and obtain clean area and to analysis.Concrete processing parameter and experimental result are as shown in table 1.
Can see that clean area thickness increased and increases along with the oxidizing annealing time.Clean area does not appear in the silicon chip that does not have oxidizing annealing to handle, but very high oxygen precipitation density is arranged on the corrosive cleavage surface.
Table 1
| Quick thermal treatment process | 1200 ℃, at NH 3Insulation 30s cooling rate is 70 ℃/s under the atmosphere | |||
| Oxidation annealing process | Do not handle | Under 900 ℃, N 2/O 2Atmosphere, O 2Content is 50% insulation 15 minutes | Under 900 ℃, N
2/O
2Atmosphere, O
2Content is 50% | Under 900 ℃, N 2/O 2Atmosphere, O 2Content is 50% insulation 45 minutes |
| The oxygen precipitation forming core technology of growing up | 800 ℃ of insulations, 1000 ℃ of insulations in 4 | |||
| Interstitial oxygen content (ppma) | 18.6 | 18.6 | 18.6 | 18.6 |
| Oxygen precipitation density is (individual/cm 2) | 6×10 6 | 6×10 6 | 9×10 6 | 9×10 6 |
| Clean area thickness (μ m) | | 10 | 14 | 20 |
As shown in Figure 1, 2, 3, Fig. 1 is the distribution schematic diagram of room behind short annealing and the oxidizing annealing in silicon chip inside, and as seen from the figure: in the short annealing process, the room is injected in a large number and be retained in silicon chip inside when cooling fast.And the room is at the inner uniform distribution that keeps of silicon chip; Through behind the oxidizing annealing, part has the surface to inject the room on the silicon chip top layer that neutralized to the silicon chip top layer from the gap Siliciumatom, makes the vacancy concentration on silicon chip top layer hang down the zone that is neutralized in after annealing and does not have oxygen precipitation and generate, and forms clean area.Fig. 2 a is the corrosion diagram of non-oxidation annealed silicon chip cleavage surface, and Fig. 2 b is the corrosion diagram that the silicon chip cleavage surface of oxidizing annealing is arranged, and as seen from the figure, short annealing and oxidizing annealing are indispensable in the technology of the present invention.Fig. 3 is the influence curve of oxidizing annealing to clean area thickness, and the increase oxidizing annealing time makes clean area broaden.
Claims (3)
1, a kind of thermal treatment process that silicon chip is obtained clean area, its step is as follows: the first step, silicon chip is carried out rapid thermal process, promptly in the quick anneal oven of any commercialization, adopt ammonia as protective atmosphere, the top temperature of heating is 1250～1200 ℃, and silicon chip is 5～40 seconds in this temperature soaking time, and rate of temperature fall remains on 20～100 ℃/S; In second step, oxidation annealing process is batch process, and annealing temperature is between 850～950 ℃, and annealing atmosphere is an oxygen-containing atmosphere, and the ratio of oxygen is not less than 40%, and the treatment time is 10～60 minutes; The 3rd step, annealing process; In the 4th step, oxygen precipitation is grown up.
2, the thermal treatment process to silicon chip acquisition clean area according to claim 1, it is characterized in that: the ratio of oxygen is not less than 50% in the oxygen-containing atmosphere in described second step.
3, the thermal treatment process to silicon chip acquisition clean area according to claim 1, it is characterized in that: the clean area thickness of the silicon chip of described prepared is 10～20 μ m, and oxygen precipitation density is 6～9 * 10
6Individual/cm
2
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102168314B (en) | 2011-03-23 | 2012-05-30 | 浙江大学 | Internal gettering process of Czochralski silicon wafer |
| CN103144024B (en) * | 2011-12-06 | 2015-08-12 | 有研半导体材料有限公司 | Use the silicon polished manufacturing process of 300mm of high-temperature heat treatment |
| CN102995125B (en) * | 2012-10-12 | 2015-06-24 | 浙江中晶科技股份有限公司 | Heat treatment process of semiconductor silicon wafer |
| JP6418778B2 (en) * | 2014-05-07 | 2018-11-07 | 信越化学工業株式会社 | Polycrystalline silicon rod, method for producing polycrystalline silicon rod, and single crystal silicon |
| JP5938113B1 (en) | 2015-01-05 | 2016-06-22 | 信越化学工業株式会社 | Manufacturing method of substrate for solar cell |
| CN105297140B (en) * | 2015-09-10 | 2019-10-25 | 上海超硅半导体有限公司 | Silicon wafer and annealing method |
| CN105470129B (en) * | 2015-12-01 | 2018-10-16 | 北京北方华创微电子装备有限公司 | A method of eliminating oxygen Thermal donor influences minority diffusion length |
| CN106920746A (en) * | 2015-12-25 | 2017-07-04 | 有研半导体材料有限公司 | A kind of method for improving silicon chip surface microdefect |
| CN109137068B (en) * | 2018-08-09 | 2020-10-16 | 锦州神工半导体股份有限公司 | Annealing method of monocrystalline silicon wafer |
| CN109346433B (en) * | 2018-09-26 | 2020-10-23 | 上海新傲科技股份有限公司 | Method for bonding semiconductor substrate and bonded semiconductor substrate |
| CN113793800B (en) * | 2021-08-18 | 2024-04-09 | 万华化学集团电子材料有限公司 | Impurity removing process and manufacturing process of semiconductor monocrystalline silicon wafer |
| CN114280072B (en) * | 2021-12-23 | 2023-06-20 | 宁夏中欣晶圆半导体科技有限公司 | Method for detecting BMD in monocrystalline silicon body |
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| CN1083874A (en) * | 1993-05-22 | 1994-03-16 | 浙江大学 | The heat treating method of nitrogenous czochralski silicon monocrystal |
| CN1061705C (en) * | 1995-03-14 | 2001-02-07 | Memc电子材料有限公司 | Precision control oxygen precipitation in silicone |
| CN1158696C (en) * | 1997-02-26 | 2004-07-21 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor |
-
2004
- 2004-11-05 CN CNB2004100886095A patent/CN100338270C/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1083874A (en) * | 1993-05-22 | 1994-03-16 | 浙江大学 | The heat treating method of nitrogenous czochralski silicon monocrystal |
| CN1061705C (en) * | 1995-03-14 | 2001-02-07 | Memc电子材料有限公司 | Precision control oxygen precipitation in silicone |
| CN1158696C (en) * | 1997-02-26 | 2004-07-21 | Memc电子材料有限公司 | Ideal oxygen precipitating silicon wafers and oxygen out-diffusion-less process therefor |
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