JPH10223641A - Manufacture of semiconductor silicon epitaxial wafer and semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve device yield by imparting the gettering function to an epitaxial wafer whose resistivity is 10mΩ.cm or higher wherein formation of BMD can not be expected in device processes at a lower temperature or at a higher temperature than 1050 deg.C. SOLUTION: Corresponding to the process temperature in a device manufacturing process, heat treatment time is selected, and low temperature heat treatment is performed at 650-900 deg.C before an epitaxial film is formed. In an epitaxial wafer whose resistivity is 10mΩ.cm or higher, BMD sufficient to gettering can be formed, in a device process at a lower temperature or at a higher temperature than 1050 deg.C. Sufficient gettering to heavy metal contamination mixied by a device process is enabled. Deterioration of device characteristics which is to be caused by contamination can be prevented, and the high yield of a device is realized.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing method for imparting gettering capability to a silicon epitaxial wafer used as a substrate for various semiconductor devices, and a method of subjecting a pulled silicon single crystal ingot to a predetermined low-temperature heat treatment. Or by subjecting the wafer to a predetermined low-temperature heat treatment before the epitaxial film formation.
In a semiconductor device manufacturing process through a low-temperature process flow of 50 ° C. or lower or a high-temperature process flow of 1050 ° C. or higher, a BMD (Bulk M
micro Defects are formed in the wafer, and sufficient IG (Intrinsic gettering) is formed.
The present invention relates to a semiconductor silicon epitaxial wafer capable of exhibiting an effect and improving a device yield, and a method for manufacturing a semiconductor device.

[0002]

2. Description of the Related Art In a ULSI device manufacturing process, various process flows are performed according to the device configuration. For example, Fe, N
There is heavy metal contamination typified by i and Cu. If these heavy metal contaminations cause defects or electrical levels to be formed near the wafer surface, the characteristics of the device will deteriorate. From the need to remove
Conventionally, gettering techniques of IG (Intrinsic gettering) and various EGs (Extrinsic gettering) have been used.

[0003] In general, a large number of oxygen precipitation nuclei that can be a gettering ability of contamination are scattered in a silicon single crystal grown by the Czochralski method or the magnetic Czochralski method (hereinafter referred to as CZ method). The oxygen precipitation nuclei are introduced during the process of growing a silicon single crystal, and the more oxygen content, the more the oxygen precipitation nuclei are scattered.

In a conventional high-temperature device process having a well drive step, oxygen precipitation occurs relatively easily in heat treatment of the device process, and BMD sufficient for gettering is formed in the bulk.
IG (Natural IG), DZ (Denuded)
Gettering using IG such as Zone) -IG has been widely used.

[0005] It is clear that in the future device process, further integration and high-temperature ion implantation will be performed at lower temperatures. Is expected to be difficult for

Therefore, it is more difficult to obtain a sufficient IG effect in a low-temperature process than in a high-temperature process. Also,
Even if the process temperature is lowered, heavy metal contamination due to high energy ion implantation or the like is inevitable, and gettering technology is considered essential.

On the other hand, for higher integration, higher quality near the wafer surface is required, and no grown-in defects exist in the epitaxial layer as compared with CZ-Si wafers. For this reason, epitaxial wafers have very high quality surface integrity, but until now have not been used much due to wafer cost concerns.

However, in next-generation devices (64 MB and 256 MB DRAM generations) that are being further integrated, Gro is
Due to the problem of wn-in defects, there is a very high possibility that an epitaxial wafer will be used in earnest, and an epitaxial wafer is considered to be the most prominent among 12-inch wafers.

[0009] To improve the quality of ordinary CZ-Si wafers, DZ-IG processing has been widely used so far.
By performing high-temperature heat treatment at about the same temperature, oxygen in the vicinity of the wafer surface is diffused outward to reduce interstitial oxygen serving as nuclei of minute defects, and a DZ (Deluded Zone) layer having no defect in the device active region. Is formed. Thereafter, a two-stage heat treatment of high and low temperatures of forming oxygen precipitation nuclei in the wafer bulk is performed by a low-temperature heat treatment at 600 ° C. to 900 ° C. However, in the DZ-IG processing, a grown-in defect exists in the device active region.

When this wafer is put into a high-temperature device process, oxygen precipitates grow from oxygen precipitate nuclei due to high-temperature heat treatment in the process, and a sufficient IG effect is exhibited.
However, in the DZ-IG process, the problem that a grown-in defect remains in the device active region and that in a low-temperature device process, sufficient growth of oxygen precipitates does not occur during the process are caused by the advanced device process. Is happening.

[Problems to be solved by the invention]

[0011] ^{p / p ++, p / p} +, p / p - and such as we compare the oxygen precipitation behavior of the epitaxial wafer,
In a p / p ⁺⁺ epitaxial wafer having a high B concentration of the substrate (substrate specific resistance <10 mΩ · cm) or the like, the effect of the high concentration of B is very likely to cause oxygen precipitation, and as shown in FIG. In an epitaxial wafer having a specific resistance of less than 6 mΩ · cm, a substrate having a low oxygen concentration ([Oi] = 1)
Even in 2 × 10 ¹⁷ atoms / cm ³ old ASTM (hereinafter abbreviated), an epitaxial wafer having a specific resistance of 8 to 10 mΩ · cm has a high oxygen concentration substrate ([Oi]).
= 15 × 10 ¹⁷ atoms / cm ³ ), a BMD sufficient for gettering is formed even in a low-temperature process, and a sufficient IG effect can be expected.

FIG. 3 shows p (10) having an outer diameter of 8 inches.
0) The initial oxygen concentration of the B-doped substrate is 12 × 10 ¹⁷ at
After preparing various epitaxial wafers having different substrate specific resistances at oms / cm ³ and 15 × 10 ¹⁷ atoms / cm ³ , a low-temperature process thermal simulation of the pattern shown in FIG. 1 was performed, and the wafer was selectively etched (Wrig).
ht Etch 5 minutes), and the result of measuring the BMD density with an optical microscope is shown.

FIG. 4 shows the result of comparison of the oxygen precipitation behavior between an epitaxial wafer and a polished wafer in a high-temperature process flow. FIG. 4 shows a p (100) B-doped substrate having an outer diameter of 8 inches and a specific resistance of the substrate of 10 to 20 mΩ · cm (p ⁺ ) and 10 Ω · cm.
(P ⁻ ), and the initial oxygen concentration is 11 to 17 × 10
A mirror-polished wafer changed in the range of ¹⁷ atoms / cm ³ (old ASTM) and an epitaxial wafer grown epitaxially on a wafer of the same lot are prepared, and a thermal simulation of a high-temperature process flow of the pattern shown in FIG. 2 is performed. After that, the wafer is subjected to selective etching (Wright Etch 5 minutes),
The result of having measured the BMD density with an optical microscope is shown.

When a mirror-polished wafer is put into a high-temperature device process, oxygen precipitates grow from oxygen precipitate nuclei due to high-temperature heat treatment in the process, and a sufficient IG effect is exhibited.

On the other hand, in an epitaxial wafer having a specific resistance of 10 mΩ · cm or more, oxygen precipitation nuclei shrink and disappear due to a high temperature thermal history during epitaxial growth, and oxygen precipitation is considerably suppressed as compared with a mirror polished wafer. It is clear that even in a low-temperature process and a high-temperature process, even if a substrate having a considerably high oxygen concentration is used, BMD is hardly formed on an epitaxial wafer having a substrate specific resistance of 10 mΩ · cm or more, and the IG effect cannot be expected. It became.

A method of performing a heat treatment before epitaxial growth in order to obtain a sufficient IG effect has already been studied. Tsuya et al. : APPI. Phys
s. Lett. 36 (1980) 658. Then, 62
In an oxygen atmosphere at a temperature between 0 ° C. and 1150 ° C.
Heat treatment conditions from time to 64 hours have been studied, and it has been shown that heat treatment at 820 ° C. for 16 hours is effective for gettering. However, the evaluation of BMD is
This is performed after heat treatment at 1140 ° C. for 2 hours assuming a high temperature process, and there is a problem that the effect in the low temperature process is not clear, and the heat treatment time is as long as 16 hours or more.

In Japanese Patent Publication No. 4-56800,
Before epitaxial growth, after low-temperature heat treatment (500 to 90
0 ° C.) and a two-step heat treatment including high-temperature heat treatment (1000 to 1100 ° C.). However, this is a two-step heat treatment of high temperature + low temperature, which is a long time heat treatment at high cost and high temperature. Problems with slip and contamination during heat treatment are also conceivable.

Japanese Patent Application Laid-Open No. 8-97220 discloses that the temperature is raised from 800.degree.
In the temperature range of 00 ° C., the heating rate is 15 ° C./min.
A method has been proposed in which the temperature is kept below or at an arbitrary temperature for 5 to 100 minutes. However, in this method, the epitaxial throughput is obviously reduced, and the epitaxial wafer can be stably manufactured at low cost. At the present time, this method has a problem.

As described above, epitaxial wafers, which are promising as next-generation device-compatible wafers, particularly p-type (B) substrates having a substrate having a specific resistance of 10 mΩ · cm or more.
With a doped (wafer) wafer, it has been difficult to obtain a sufficient IG effect in a low-temperature device process even if a high oxygen substrate is used.

In view of the above-mentioned problem of gettering (IG) of an epitaxial wafer, the present invention has
Device manufacturing process by low-temperature process flow below ℃
Alternatively, a sufficient gettering effect (I) can be obtained even in a device manufacturing process using a high temperature process flow of 1050 ° C. or more.
An object of the present invention is to provide a semiconductor silicon epitaxial wafer and a method for manufacturing a semiconductor device, which can exhibit G) and improve the device yield.

In addition, the present invention similarly simplifies the process as much as possible in order to reduce the cost, and does not perform any processing that can expect the EG effect after cutting and forming the wafer. It is an object of the present invention to provide a semiconductor silicon epitaxial wafer and a method for manufacturing a semiconductor device, which can exhibit a sufficient gettering effect (IG) even in a device manufacturing process by only processing and improve a device yield.

[0022]

SUMMARY OF THE INVENTION
Various low-temperature heat treatments are performed before epitaxial film formation for the purpose of producing a semiconductor silicon epitaxial wafer capable of exhibiting a sufficient gettering effect (IG) even in the following low-temperature device manufacturing process or a device manufacturing process using a high-temperature process flow of 1050 ° C. or more. As a result of various studies, if the heat treatment time is selected according to the process temperature in the device manufacturing process and the low-temperature heat treatment at 650 ° C. to 900 ° C. is performed before the epitaxial film formation, the specific resistance is 10 mΩ · cm or more. It has been found that a sufficient gettering (IG) effect can be obtained in any of the low-temperature and high-temperature device processes at a temperature of 1050 ° C. even with the epitaxial wafer described above, and completed the present invention.

That is, the inventors have found that the specific resistance is 10 mΩ.
Cm or more, in a p-type (B-doped) CZ-Si wafer, 650 before epitaxial film formation on the wafer
After performing a heat treatment at a temperature of from 900 ° C. to 900 ° C., preferably for 3 hours or more, preferably in an oxygen or nitrogen atmosphere and a mixed gas thereof, an epitaxial film is formed so that gettering can be performed in a heat treatment step in a low-temperature device process. It has been found that a sufficient BMD is formed and a semiconductor silicon epitaxial wafer having a sufficient IG capability can be obtained.

In addition, the inventors similarly perform a heat treatment at a temperature of 700 ° C. to 900 ° C., preferably for 3 hours or less, in the above-mentioned atmosphere before forming an epitaxial film on a wafer, and then perform epitaxial film formation. It has been found that a BMD sufficient for gettering is formed in a heat treatment step in a high-temperature device process, a semiconductor silicon epitaxial wafer having a sufficient IG effect is obtained, and device yield is improved.

In addition, the inventors of the present invention provide a method of manufacturing a semiconductor device in which a semiconductor silicon epitaxial wafer is subjected to a process flow in accordance with a device configuration, wherein the specific resistance cut out and formed on the wafer is 10 mΩ · cm or more.
The type (B-doped) CZ-Si wafer is subjected to a heat treatment at a temperature of 650 ° C. or more and 900 ° C. or less, preferably for 3 hours or more, or a heat treatment at a temperature of 700 ° C. or more and 900 ° C. or less, preferably 3 hours or less. After that, on the semiconductor silicon epitaxial wafer epitaxially deposited,
By performing the process flow at a low temperature of 1050 ° C. or lower or the process flow at a high temperature of 1050 ° C. or higher, BMD necessary and sufficient for gettering is formed, sufficient IG capability is exhibited, and device yield is improved. A method of manufacturing a semiconductor device that can be performed is proposed.

Further, the inventors have developed a semiconductor silicon epitaxial wafer which can exhibit a sufficient gettering effect (IG) even in a device manufacturing process at a low temperature of 1050 ° C. or lower or a device manufacturing process by a high temperature process flow of 1050 ° C. or higher. For the purpose, focusing on providing gettering ability to the as-pulled silicon single crystal ingot itself, as a result of various studies, the same means as the above-mentioned heat treatment for wafers can be adopted, and the process temperature in the device manufacturing process can be reduced. Select the heat treatment time according to
If a low-temperature heat treatment at 650 ° C. to 900 ° C. is performed after the pulling in the Z method, the EG is cut out and formed into a silicon wafer.
Even if an epitaxial wafer having an epitaxial film formed thereon and having a specific resistance of 10 mΩ · cm or more, sufficient gettering (IG) is performed in a low-temperature or high-temperature device process from 1050 ° C. The inventors have found that the effect can be obtained, and completed the present invention.

Therefore, according to the present invention, the specific resistance is 10 mΩ ·
cm or more, it is only necessary to perform a low-temperature heat treatment on the silicon single crystal ingot pulled up by the CZ method while controlling the B concentration to obtain a p-type (B-doped) CZ-Si wafer. BMD sufficient for gettering is formed in the heat treatment step in the device process, and the gettering ability that does not disappear even when subjected to
A semiconductor silicon epitaxial wafer having a sufficient IG capability against various contaminations can be obtained, and it is not necessary to perform any processing that can expect an EG effect after cutting and forming the wafer, and the process can be simplified.

That is, the present invention relates to a method of manufacturing a semiconductor device in which a semiconductor silicon epitaxial wafer is subjected to a process flow according to the device configuration, wherein the specific resistance is 10 mΩ · cm or more, and the p-type (B-doped) CZ-
A silicon single crystal ingot pulled up by the CZ method while controlling the B concentration to obtain a Si wafer,
Heat treatment at a temperature of 900 ° C. or less for 3 hours or more;
Heat treatment at a temperature of not less than 00 ° C. and not more than 900 ° C., preferably for not more than 3 hours, and thereafter, after cutting out and shaping the silicon wafer, without subjecting to a treatment capable of expecting an EG effect, one or both surfaces of the wafer are thereafter mirror-polished, A semiconductor silicon epitaxial wafer epitaxially formed on a predetermined surface by vapor phase epitaxy is subjected to the process flow at a low temperature of 1050 ° C. or lower, or the process flow at a high temperature of 1050 ° C. or higher, so that gettering is necessary and sufficient. This is a method of manufacturing a semiconductor device in which a BMD is formed, a sufficient IG capability is exhibited, and a device yield can be improved.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION The present invention provides
After performing various low-temperature heat treatments before the epitaxial film formation on the Z-Si wafer, the epitaxial wafer after the epitaxial film formation was subjected to a low-temperature process heat simulation of the pattern shown in FIG. If the low-temperature heat treatment before the epitaxial film formation is performed at a temperature of from 900C to 900C, preferably for 3 hours or more, a sufficient gettering (IG) effect can be obtained even in an epitaxial wafer having a specific resistance of 10 mΩcm or more even in a low-temperature device process. As a result of investigating the BMD generation behavior after performing the thermal simulation of the high temperature process flow of the pattern shown in FIG. 2 (see FIG. 4), the epitaxial film formation was performed at 700 ° C. to 900 ° C. for 3 hours or less. If low temperature heat treatment is performed before,
It has been clarified that a sufficient gettering (IG) effect can be obtained in a high-temperature device process even in an epitaxial wafer of Ω · cm or more.

The present invention is characterized in that a one-stage low-temperature wafer heat treatment is performed before the epitaxial growth process, so that a large amount of wafers can be processed at low cost, and it is possible to sufficiently cope with a low-temperature process or a high-temperature process. Any of the conventional processing methods described above is a novel invention in which the oxygen concentration, specific resistance, heat treatment temperature, time, and atmosphere of the substrate are different.

Further, the present inventors performed various low-temperature heat treatments on a silicon single crystal ingot pulled up while controlling the B concentration by the CZ method, and thereafter cut out the wafer, polished the mirror, and further epitaxially formed the p-layer. The low-temperature process thermal simulation of the pattern shown in FIG. 1 was performed on the type CZ-Si wafer, and the BMD generation behavior was investigated.
If a low-temperature heat treatment is performed on the ingot after being pulled up at 50 ° C. to 900 ° C., preferably for 3 hours or more, the specific resistance is 10 mΩ · cm or more without being subjected to a process that can expect an EG effect after being cut and formed into a silicon wafer. Investigation of BMD generation behavior after performing a thermal simulation of the high-temperature process flow of the pattern shown in FIG. 2 that a sufficient gettering (IG) effect can be obtained even in a low-temperature device process with the epitaxial wafer of FIG. (Refer to FIG. 6), if the ingot after the pulling is subjected to a low-temperature heat treatment at 700 ° C. to 900 ° C., preferably for 3 hours or less, a high-temperature device process can be similarly performed on an epitaxial wafer having a specific resistance of 10 mΩ · cm or more. It was confirmed that a sufficient gettering (IG) effect could be obtained by using That is, it was confirmed that all of the examples such as the heat treatment conditions for the wafer described later are the same as the heat treatment for the single crystal ingot.

In the present invention, the specific resistance of the substrate is 10 m
As described above, when the concentration is less than 10 mΩ · cm, oxygen precipitation is abnormally promoted by the effect of high concentration of B as described above. BMD sufficient for gettering very early in low temperature process without heat treatment
Is formed. In a substrate having a thickness of 10 mΩ · cm or more, oxygen precipitation is considerably suppressed due to the thermal history at the time of epitaxial film formation. Is indispensable.

In the present invention, the oxygen concentration of the substrate is preferably at least 12 × 10 ¹⁷ atoms / cm ³ . On the oxygen side lower than 12 × 10 ¹⁷ atoms / cm ³ , sufficient BMD cannot be obtained under the heat treatment conditions of 650 ° C. to 900 ° C. for 3 hours or more, and as shown in FIG.
This is because sufficient BMD was observed after the low-temperature process thermal simulation of the pattern shown in FIG. 1 for a substrate of 12 × 10 ¹⁷ atoms / cm ³ or more.

In the present invention, if the heat treatment temperature applied to a wafer for a low-temperature process is lower than 650 ° C., a long-time heat treatment is required to grow oxygen precipitate nuclei to a size not reduced by the high-temperature heat history during epitaxial film formation. Therefore, it is not preferable, and if it exceeds 900 ° C., the temperature is too high,
Since the growth of oxygen precipitation nuclei with sufficient density does not occur and the effect cannot be obtained, the temperature is set to 650 ° C. or more and 900 ° C. or less.

The heat treatment time to be applied to the wafer for the low-temperature process is, under the above-mentioned temperature conditions, a BM of 5 × 10 ⁴ / cm ² or more having a density sufficient for gettering even in the low-temperature process.
In order to obtain D, three hours or more are preferable.

In the present invention, if the heat treatment temperature applied to a wafer for a high-temperature process is less than 700 ° C., a long-time heat treatment is required to grow oxygen precipitate nuclei to a size that does not shrink due to the high-temperature heat history during epitaxial film formation. Therefore, it is not preferable, and if it exceeds 900 ° C., the temperature is too high,
Since the growth of oxygen precipitation nuclei with sufficient density does not occur and the effect cannot be obtained, the temperature is set to 700 ° C. or more and 900 ° C. or less.

The heat treatment time for a wafer for a high-temperature process is a BMD (> 5 × 10 ⁴ ) having a density sufficient for gettering by a treatment of 3 hours or less even at a heat treatment at 700 ° C.
Pieces / cm ² ), so that it is 3 hours or less.

BMD of 5 × 10 ⁵ / cm ² or more
However, in the epitaxial wafer generated in the thermal simulation of the high-temperature process flow, slip dislocation due to excessive oxygen precipitation was observed in the center of the wafer after the thermal simulation. It is known that the slip dislocation adversely affects device characteristics. Therefore, in the case of a device process at a high temperature, the BMD density needs to be 5 × 10 ⁵ / cm ² or less, more preferably 1 × 10 ⁵ / cm ² or less, due to the problem of occurrence of slip dislocation in the process. Became clear.

Even when the heat treatment time is 3 hours or less, the oxygen concentration is 15 × 10 ¹⁷ atoms / cm ³ (old AS
In the case of TM) substrate, BMD of 5 × 10 ⁵ / cm ² or more was formed after thermal simulation on the wafer which was subjected to low-temperature heat treatment at 800 ° C. for 2 hours and 3 hours before the epi,
Slip dislocations were also observed at the center of the wafer. However, in this case, the BMD is adjusted by adjusting the oxygen concentration of the substrate.
The density can be optimized. As shown in FIG. 8, by lowering the oxygen concentration of the substrate, an optimum BMD density can be obtained.
It was also confirmed that the occurrence of slip dislocation could be prevented. A preferable oxygen concentration of the substrate is 10 to 15 × 10 ¹⁷ atoms.
s / cm ³ (old ASTM).

In an oxygen atmosphere at a high temperature of 1000 ° C. or higher, interstitial silicon atoms are implanted into the bulk due to the formation of a surface oxide film, and oxygen precipitation is suppressed as compared with a non-oxidizing atmosphere. At 900 ° C. or lower, the oxide film did not grow much even in an oxygen atmosphere, and there was no difference in the effect between the oxygen atmosphere and the nitrogen atmosphere. Oxygen or nitrogen and a mixed gas atmosphere thereof are preferable, since it has been confirmed that there is no influence on good quality even after a low-temperature process thermal simulation and a high-temperature process flow thermal simulation.

[0041]

【Example】

Example 1 p (100) B-doped (specific resistance 10Ω) having an outer diameter of 6 inches
Cm) and the initial oxygen concentration is 12 × 10 ¹⁷ atoms /
cm ³ , 13 × 10 ¹⁷ atoms / cm ³ , 14 × 10 ¹⁷
atoms / cm ³ , 15 × 10 ¹⁷ atoms / cm
³ Prepare (old ASTM) CZ-Si wafers, and place these wafers at 600 ° C x 5hrs and 650 ° C x
5 hr, 700 ° C × 1 hr, 700 ° C × 3 hr, 800
° C × 1 hr, 800 ° C × 3 hr, 900 ° C × 3 hr, 9
A heat treatment of 50 ° C. × 3 hr is performed in a nitrogen atmosphere before epitaxial film formation, and a wafer is set in a single-wafer CVD furnace at 850 ° C. in a single-wafer CVD furnace. / Min to 1150 ° C, etching with HCl, and 1050 ° C
Using Cl ₃ gas, the epitaxial specific resistance is 10Ω
An epitaxial wafer having a thickness of 3 cm and an epitaxial thickness of 3 μm was formed to produce an epitaxial wafer.

A low-temperature process thermal simulation of the pattern shown in FIG. 1 is performed on these epitaxial wafers, and then the wafer is selectively etched (Wright Et).
ch5 minutes), and the BMD density was measured with an optical microscope. The result is shown in FIG.

As shown in FIG. 5, the heat treatment at 600.degree. C. for 5 hours and at 950.degree. C. for 3 hours did not provide sufficient BMD, but at 650.degree. C. for 5 hours, 700.degree.
In the low-temperature process heat simulation of the pattern shown in FIG. 1, 5 × 10 ⁴ pieces / c sufficient for gettering were obtained by performing the pre-heat treatment at 3 ° C. and 900 ° C. for 3 hours.
A BMD of m ² or more was observed.

In addition, the initial fermentation concentration was 15 × 10 ¹⁷ atom
Nis (1 × 10 ¹² atoms / c) was actually added to the epitaxial wafer that had been subjected to heat treatment before epitaxial film formation at 800 ° C. for 3 hours in a nitrogen atmosphere at ms / cm ^3.
m ² ), the same low-temperature process thermal simulation was performed, and the MOS-
The generation lifetime measurement by Ct was performed. Fig. 7 shows the results.
Shown in

The generation lifetime is not different from that of a non-contaminated wafer, and is good. A wafer that has been subjected to a suitable heat treatment before epitaxial film formation has a sufficient gettering (IG) effect in a low-temperature process. confirmed.

Example 2 Outer diameter 8 inch p (100) B doped (specific resistance 10Ω.
cm) and the initial oxygen concentration is 15 × 10 ¹⁷ atoms / c
m ³ (old ASTM) CZ-Si wafers are prepared and 1) 650 ° C. × 3 hr, 650 ° C. × 5 hr, 2) 700 ° C. × 1 hr, 700 ° C. × 3 hr, 700 ° C.
× 5hr, 3) 750 ° C × 1hr, 750 ° C × 2hr, 750 ° C
× 3 hr, 750 ° C. × 5 hr, 4) 800 ° C. × 0.5 hr, 800 ° C. × 1 hr, 80
0 ° C. × 2 hr, 800 ° C. × 3 hr, 800 ° C. × 5 hr, 5) 850 ° C. × 0.5 hr, 850 ° C. × 1 hr, 85
0 ° C. × 2 hr, 850 ° C. × 3 hr, 850 ° C. × 5 hr, 6) 900 ° C. × 0.5 hr, 900 ° C. × 3 hr, 90
0 ° C. × 5 hr, 7) 950 ° C. × 0.5 hr, 950 ° C. × 3 hr, 95
A heat treatment of 0 ° C. × 5 hr was performed in a nitrogen atmosphere before the epitaxial film formation process, and these wafers were treated with a single wafer CVD furnace at 85 ° C.
Set the wafer in a furnace at 0 ° C,
After heating to 50 ° C and etching with HCl, 1050 ° C
Then, an epitaxial wafer having an epitaxial specific resistance of 10 Ω · cm and an epitaxial layer thickness of 3 μm was formed using SiHCl ₃ gas to produce an epitaxial wafer.

A thermal simulation of the high-temperature process flow of the pattern shown in FIG. 2 was performed on these epitaxial wafers, and then the wafer was selectively etched (Wright).
(Etch 5 minutes), and the BMD density was measured with an optical microscope. FIG. 6 shows the result.

As shown in FIG.
At 0 ° C., sufficient BMD was not obtained even with a pre-heat treatment for 5 hours, but 700 ° C., 750 ° C., 800 ° C., 850 ° C.
2 and a pre-heat treatment at 900 ° C. for 3 hours or less, in a thermal simulation of a high-temperature process flow as a semiconductor device process having the pattern shown in FIG. 2, 5 × 10 ⁴ / cm sufficient for gettering (IG). ² or more B
MD was observed. However, at 800 ° C. for 2 hours and 3
In the case of performing the heat treatment for a long time, 5 × 10 ⁵ pieces / cm ²
The above BMD was observed, and dislocation due to excessive precipitation was observed at the center of the wafer. The BMD proper region which is sufficient for gettering (IG) and in which dislocation does not occur is 5 × 10 ⁴ to
It is 5 × 10 ⁵ pieces / cm ² .

Example 3 Next, an outer diameter of 8 inches p (100) B-doped (resistivity 1
0 Ω · cm) and the initial oxygen concentration is 13-16 × 10 ¹⁷ a
CZ- in the range of toms / cm ³ (old ASTM)
Prepare Si wafers and apply these wafers at 800 ° C x
A heat treatment of 2 hr was performed in a nitrogen atmosphere before the epitaxial film forming process, and the wafers were set on these wafers in a single-wafer CVD furnace at 850 ° C., and the temperature was raised to 1150 ° C. at 150 ° C./min. After etching with 10
Using SiHCl ₃ gas at 50 ° C., an epitaxial film having an epitaxial specific resistance of 10 Ω · cm and an epitaxial thickness of 3 μm was formed to produce an epitaxial wafer.

The epitaxial wafer was subjected to a thermal simulation of the high-temperature process flow of the pattern shown in FIG. 2, and then the wafer was selectively etched (Wright).
(Etch 5 minutes), and the BMD density was measured with an optical microscope. FIG. 8 shows the result.

As shown in FIG. 8, in the pre-heat treatment at 800 ° C. for 2 hours, the initial oxygen concentration is 13.8 × 10 ¹⁷ atom.
It was confirmed that the BMD density of the CZ-Si wafer of ms / cm ³ (old ASTM) was within the proper BMD region, and that no dislocation occurred. However, if the initial oxygen concentration
14.8 and 15.5 × 10 ¹⁷ atoms / cm ³ (ol
d ASTM), a high density BMD was generated and slip dislocation due to excessive precipitation was observed as in the results of FIG. Therefore, when the BMD density exceeds the upper limit in the heat treatment within the scope of the present invention, it is possible to form a BMD having an appropriate density by optimizing the initial oxygen concentration.

[0052]

According to the present invention, the specific resistance at which a sufficient gettering effect (IG) cannot be expected in a low-temperature device process or a high-temperature device process is 10 mΩ · cm or more.
A gettering function is imparted to a p-type (B-doped) CZ-Si wafer, and a predetermined low-temperature heat treatment is performed on an ingot pulled up by a CZ method, or a process in a device manufacturing process before an epitaxial film is formed. By performing an appropriate heat treatment by selecting a heat treatment time according to the temperature, a sufficient BMD can be generated even in a low-temperature device process or a high-temperature device process, and a sufficient getter can be obtained even when heavy metal contamination occurs in the process. It becomes possible to ring. Also, under the heat treatment conditions of the present invention, it is possible to prevent the occurrence of slip dislocations in the process due to excessive oxygen precipitation.

In the next-generation 12-inch wafer,
Due to the problem of flatness, it is predicted that the specification will be mirror-polished on both sides.
S (Poly-Si Back Seal) or B
EG such as SD (Back Side Damage)
(Extrinsic Gettering) requires a complicated processing process. But,
According to the present invention, a sufficient getter effect (IG effect) can be imparted to an epitaxial wafer by a simple process even when both surfaces are mirror-polished.

Further, as compared with the DZ-IG processing conventionally performed on a normal CZ-Si wafer, the integrity of the device active layer in the vicinity of the surface is ensured by epitaxial growth, so that a high-temperature heat treatment is not required. Since the low-temperature heat treatment in the step is sufficient, the heat treatment can be performed at low cost.
For example, in the treatment performed in an epitaxial furnace during the above-described epitaxial process (Japanese Patent Application Laid-Open No. 8-97220), it is difficult to process a large amount of the wafer. There is an advantage that processing can be performed and the through-put of the epitaxial growth process itself is not affected at all.

[Brief description of the drawings]

FIG. 1 is a graph showing a thermal simulation pattern of a low-temperature process used in an experiment of the present invention.

FIG. 2 is a graph showing a thermal simulation pattern of a high-temperature process which is a semiconductor device process used in this experiment.

FIG. 3 shows a result of performing a low-temperature process thermal simulation of FIG. 1 on various epitaxial wafers having different initial oxygen concentrations and specific resistances on an 8-inch substrate, selectively etching the wafers, and measuring the BMD density with an optical microscope. 5 is a graph of the initial oxygen concentration and the BMD density showing the following.

FIG. 4 shows an 8-inch p (100) B doped CZ-Si.
Two types of substrates having a specific resistance of 10 to 20 mΩ · cm (p ⁺ ) and 10 Ω · cm (p ⁻ ), and a mirror polished wafer having a different initial oxygen concentration and a wafer of the same lot having an epitaxial film thickness of 3 μm. Prepare an epitaxial wafer that has undergone epitaxial growth, and refer to FIG.
7 is a graph of initial oxygen concentration and BMD density showing the result of performing selective etching (Wright Etch for 5 minutes) on the wafer after performing the high temperature process heat simulation of FIG.

FIG. 5 shows various wafers having a different initial oxygen concentration in a 6-inch substrate subjected to various heat treatments to produce an epitaxial wafer, subjected to the low-temperature process thermal simulation of FIG. 1, and then selectively etched into the wafer; Initial oxygen concentration and B showing BMD density measured with an optical microscope
It is a graph of MD density.

FIG. 6: 8 inch p (100) B doped (resistivity 1)
0Ω · cm) CZ-Si substrate with initial oxygen concentration of 15 × 1
After performing low-temperature pre-heat treatment under various conditions in a nitrogen atmosphere before epitaxial growth on a wafer of 0 ¹⁷ atoms / cm ³ (old ASTM) to produce an epitaxial wafer having an epitaxial film thickness of 3 μm, FIG. The wafer is subjected to thermal simulation of a high temperature process flow, and the wafer is selectively etched (Wright).
Etch 5 min), and the results of measuring the BMD density with an optical microscope are shown.
It is a graph of MD density.

FIG. 7 is a graph showing a result of measuring a generation lifetime by a MOS-Ct method after performing a low-temperature process thermal simulation in the example.

FIG. 8: 8 inch p (100) B doped (resistivity 1)
0 Ω · cm) CZ-Si substrates having different initial oxygen concentrations were subjected to a heat treatment at 800 ° C. for 2 hours, and then epitaxially grown to a thickness of 3 μm to produce epitaxial wafers. 2 was subjected to a thermal simulation of the high-temperature process flow, and the wafer was selectively etched (Wright).
5 is a graph of the initial oxygen concentration and the BMD density, showing the results of measuring the BMD density with an optical microscope (Etch 5 minutes).

 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Masaharu Ninomiya 2201 Kamioda, Kota-cho, Kishima-gun, Saga Prefecture Within Sumitomo Sitix Co., Ltd. Inside the corporation

Claims (12)

[Claims] A substrate having a specific resistance of 10 mΩ · cm or more,
Type (B-doped) CZ-Si wafer is subjected to a heat treatment at a temperature of 650 ° C. or more and 900 ° C. or less, and sufficient B for gettering in a device manufacturing process at a low temperature of 1050 ° C. or less.
A method for producing a semiconductor silicon epitaxial wafer in which a BMD nucleus capable of forming an MD is formed, one or both surfaces of the wafer are mirror-polished, and an epitaxial film is formed on a predetermined surface by a vapor phase epitaxy method. 2. A substrate having a specific resistance of 10 mΩ · cm or more,
A type (B-doped) CZ-Si wafer is subjected to a heat treatment at a temperature of 700 ° C. or more and 900 ° C. or less, and sufficient B for gettering in a device manufacturing process at a high temperature of 1050 ° C. or more.
A method for producing a semiconductor silicon epitaxial wafer in which a BMD nucleus capable of forming an MD is formed, one or both surfaces of the wafer are mirror-polished, and an epitaxial film is formed on a predetermined surface by a vapor phase epitaxy method. 3. The device according to claim 1, wherein the BMD density generated in the device manufacturing process is 5 × 10 ⁴ /
A method for producing a semiconductor silicon epitaxial wafer having a density of cm ^{2 to} 5 × 10 ⁵ / cm ² . 4. A method of manufacturing a semiconductor device, wherein a semiconductor silicon epitaxial wafer is subjected to a process flow according to a device configuration, wherein a specific resistance cut out and formed on the wafer is 10 mΩ · cm or more, and a p-type (B-doped)
A heat treatment is performed on the CZ-Si wafer at a temperature of 650 ° C. or more and 900 ° C. or less, and then one or both surfaces of the wafer are mirror-polished, and a semiconductor silicon epitaxial wafer is epitaxially formed on a predetermined surface by vapor phase epitaxy.
A method of manufacturing a semiconductor device, wherein the process flow is performed at a low temperature of 050 ° C. or lower to obtain a BMD sufficient for gettering. 5. A method for manufacturing a semiconductor device, wherein a semiconductor silicon epitaxial wafer is subjected to a process flow according to a device configuration, wherein a specific resistance cut out and formed on the wafer is 10 mΩ · cm or more, and a p-type (B-doped)
The CZ-Si wafer is subjected to a heat treatment at a temperature of 700 ° C. or more and 900 ° C. or less, and thereafter, one or both surfaces of the wafer are mirror-polished, and a semiconductor silicon epitaxial wafer having an epitaxial film formed on a predetermined surface by a vapor phase epitaxy is used.
A method of manufacturing a semiconductor device, wherein the process flow at a high temperature of 050 ° C. or higher is performed to obtain a BMD sufficient for gettering. 6. The method according to claim 4, wherein the BMD density required for gettering is 5 × 10 ⁴ / cm ² or less.
A method for manufacturing a semiconductor device having a density of 5 × 10 ⁵ / cm ² . 7. A p-type (B) having a specific resistance of 10 mΩ · cm or more.
Doped) A silicon single crystal ingot pulled up by the CZ method while controlling the B concentration to obtain a CZ-Si wafer is subjected to a heat treatment at a temperature of 650 ° C. or more and 900 ° C. or less, and a low-temperature device manufacturing process of 1050 ° C. or less Forms a BMD nucleus that can form a BMD sufficient for gettering,
A method for manufacturing a semiconductor silicon epitaxial wafer, in which one side or both sides of a wafer is mirror-polished and a epitaxial film is formed on a predetermined surface by a vapor phase growth method without performing a process that can expect an EG effect after cutting and forming a silicon wafer. . 8. A p-type (B) having a specific resistance of 10 mΩ · cm or more.
Doping) A silicon single crystal ingot pulled up by the CZ method while controlling the B concentration in order to obtain a CZ-Si wafer is subjected to a heat treatment at a temperature of 700 ° C. or more and 900 ° C. or less, and a device manufacturing process at a high temperature of 1050 ° C. or more Forms a BMD nucleus that can form a BMD sufficient for gettering,
A method of manufacturing a semiconductor silicon epitaxial wafer in which one or both surfaces of a wafer are mirror-polished and an epitaxial film is formed on a predetermined surface by a vapor phase growth method. 9. The device according to claim 7, wherein the BMD density generated in the device manufacturing process is 5 × 10 ⁴ /
A method for producing a semiconductor silicon epitaxial wafer having a density of cm ^{2 to} 5 × 10 ⁵ / cm ² . 10. A method for manufacturing a semiconductor device, comprising subjecting a semiconductor silicon epitaxial wafer to a process flow according to a device configuration, wherein the specific resistance is 10 mΩ · c.
The silicon single crystal ingot pulled up by the CZ method while controlling the B concentration to obtain a p-type (B-doped) CZ-Si wafer at a temperature of 650 ° C. to 900 ° C. After cutting and molding into
Without performing a process that can expect the EG effect, one surface or both surfaces of the wafer are mirror-polished thereafter, and the process flow at a low temperature of 1050 ° C. or less is applied to a semiconductor silicon epitaxial wafer formed epitaxially on a predetermined surface by a vapor phase growth method. And a method of manufacturing a semiconductor device to obtain a BMD sufficient for gettering. 11. A method for manufacturing a semiconductor device, comprising subjecting a semiconductor silicon epitaxial wafer to a process flow according to the device configuration, wherein the specific resistance is 10 mΩ · c.
A silicon single crystal ingot pulled up by the CZ method while controlling the B concentration to obtain a p-type (B-doped) CZ-Si wafer at a temperature of 700 ° C. to 900 ° C. After cutting and molding into
Without performing a process that can expect the EG effect, after that, one side or both sides of the wafer are mirror-polished, and the above process flow at a high temperature of 1050 ° C. or more is applied to a semiconductor silicon epitaxial wafer formed epitaxially on a predetermined surface by a vapor phase growth method. And a method of manufacturing a semiconductor device for obtaining a BMD required for gettering. 12. The method of manufacturing a semiconductor device according to claim 10, wherein the BMD density required for gettering is 5 × 10 ⁴ / cm ^{2 to} 5 × 10 ⁵ / cm ² .