JP2002076006A - Method of manufacturing epitaxial wafer and epitaxial wafer manufactured by the method - Google Patents

Method of manufacturing epitaxial wafer and epitaxial wafer manufactured by the method

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Publication number
JP2002076006A
JP2002076006A JP2000262142A JP2000262142A JP2002076006A JP 2002076006 A JP2002076006 A JP 2002076006A JP 2000262142 A JP2000262142 A JP 2000262142A JP 2000262142 A JP2000262142 A JP 2000262142A JP 2002076006 A JP2002076006 A JP 2002076006A
Authority
JP
Japan
Prior art keywords
wafer
silicon
single crystal
silicon wafer
crystal rod
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2000262142A
Other languages
Japanese (ja)
Other versions
JP4122696B2 (en
Inventor
Tomonori Yamaoka
智則 山岡
Hisashi Furuya
久 降屋
Kazuhiro Harada
和浩 原田
Hiroyoshi Kaihara
弘好 海原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Silicon Corp
Original Assignee
Mitsubishi Materials Silicon Corp
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Filing date
Publication date
Application filed by Mitsubishi Materials Silicon Corp filed Critical Mitsubishi Materials Silicon Corp
Priority to JP2000262142A priority Critical patent/JP4122696B2/en
Publication of JP2002076006A publication Critical patent/JP2002076006A/en
Application granted granted Critical
Publication of JP4122696B2 publication Critical patent/JP4122696B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide an epitaxial wafer having intrinsic gettering capability of contaminant metals during device manufacturing process. SOLUTION: First, a nitrogen doped silicon single crystal rod is pulled up by Czochralski method, and sliced into silicon wafers. Next, the silicon wafer is held at a specific temperature in the range of 600 to 850 deg.C for 5 to 180 min., and risen to a specific temperature in the range of 1,100 to 1,150 deg.C at a rate of 5 to 20 deg.C/sec. After the temperature rise, hydrogen pretreatment is performed at the specific temperature for the wafer. Thereafter, under the condition that the silicon wafer is held at a specific temperature in the range of 1,050 to 1,150 deg.C, an epitaxial layer is formed on the surface of the silicon wafer. Then, the silicon wafer is fallen to a specific temperature in the range of 600 to 850 deg.C at a rate of 5 to 20 deg.C/second, and held at the specific temperature for 5 to 180 minutes.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、チョクラルスキー
法(以下、CZ法という。)にて引上げられたシリコン
単結晶棒を用いてエピタキシャルウェーハを製造する方
法及びこの方法により製造されたエピタキシャルウェー
ハに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing an epitaxial wafer using a silicon single crystal rod pulled by the Czochralski method (hereinafter referred to as CZ method) and an epitaxial wafer manufactured by this method. It is about.

【0002】[0002]

【従来の技術】通常、ボロン濃度が低い、いわゆるp/
-の構造を有するエピタキシャルウェーハは、比較的
高い温度のエピタキシャルプロセスを経ることにより、
バルク内の酸素析出核が消失するため、半導体デバイス
メーカーのデバイス作製工程で殆ど酸素析出物を生成し
ない。一方、デバイス作製工程において、一般的には微
量の金属汚染が発生するため、ウェーハが上記汚染金属
のゲッタリング能力を有することが望ましい。従って、
ウェーハにゲッタリング能力を付与するために、ウェー
ハ裏面に金属のゲッタリング能力を有するポリシリコン
を成膜したり、サンドブラストによりウェーハの裏面に
ダメージを付与する処理などが行われている。
2. Description of the Related Art Usually, a boron concentration is low, that is, a so-called p /
p - epitaxial wafer having the structure of, by going through the epitaxial process a relatively high temperature,
Since the oxygen precipitate nuclei in the bulk disappear, almost no oxygen precipitates are generated in the device manufacturing process of the semiconductor device manufacturer. On the other hand, since a small amount of metal contamination generally occurs in the device manufacturing process, it is desirable that the wafer has the gettering ability of the contaminated metal. Therefore,
In order to impart gettering capability to the wafer, a process of forming a film of polysilicon having a metal gettering capability on the back surface of the wafer, or giving damage to the back surface of the wafer by sandblasting, etc., is performed.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記従来のウ
ェーハ裏面へのポリシリコンの成膜やサンドブラストに
よるダメージの付与などの処理は、ウェーハの製造コス
トを押上げるとともに、ウェーハからの発塵量が増大し
たり、ウェーハが変形するおそれがあった。これらの点
を解消するために、従来、エピタキシャルプロセスを経
る前に熱処理を長時間施すことにより、十分な酸素析出
核を生成しておき、エピタキシャルプロセスという高温
プロセスでも酸素析出核が消失しない方法が行われてい
る。しかし、この方法でも製造コストが増大し、熱処理
時にウェーハが金属により汚染されるおそれがあった。
However, the above-described conventional processes, such as deposition of polysilicon on the back surface of a wafer and application of damage by sandblasting, increase the manufacturing cost of the wafer and reduce the amount of dust generated from the wafer. There was a possibility that the wafer would increase or the wafer would be deformed. Conventionally, in order to eliminate these points, a heat treatment is performed for a long time before passing through the epitaxial process to generate sufficient oxygen precipitation nuclei, and a method in which the oxygen precipitation nuclei do not disappear even in a high temperature process called an epitaxial process. Is being done. However, this method also increases the manufacturing cost, and the wafer may be contaminated by the metal during the heat treatment.

【0004】本発明の目的は、シリコンウェーハ裏面へ
のポリシリコンの成膜やサンドブラスト処理を施さなく
ても、エピタキシャル層形成前のシリコンウェーハ内の
酸素析出核の熱的安定性を向上でき、またこの酸素析出
核の生成に寄与する格子欠陥である原子空孔を増やすこ
とができる、エピタキシャルウェーハを製造する方法を
提供することにある。本発明の別の目的は、デバイス作
製工程において汚染金属のイントリンシックゲッタリン
グ(以下、IGという。)能力を有する、エピタキシャ
ルウェーハを提供することにある。
An object of the present invention is to improve the thermal stability of oxygen precipitate nuclei in a silicon wafer before forming an epitaxial layer without performing polysilicon film formation or sandblasting on the back surface of the silicon wafer. An object of the present invention is to provide a method for manufacturing an epitaxial wafer, which can increase the number of atomic vacancies, which are lattice defects that contribute to the generation of the oxygen precipitation nuclei. Another object of the present invention is to provide an epitaxial wafer having intrinsic gettering (hereinafter referred to as IG) capability of a contaminant metal in a device manufacturing process.

【0005】[0005]

【課題を解決するための手段】請求項1に係る発明は、
図1及び図2に示すように、窒素をドープしたシリコン
単結晶棒14をチョクラルスキー法により引上げる工程
と、シリコン単結晶棒14をスライスしてシリコンウェ
ーハを作製する工程と、シリコンウェーハを600〜8
50℃の範囲の所定温度で5〜180分間保持する工程
と、シリコンウェーハを1100〜1150℃の範囲の
所定温度まで5〜20℃/秒の速度で昇温した後にその
所定温度で水素前処理を行う工程と、シリコンウェーハ
を1050〜1150℃の範囲の所定温度で保持した状
態でシリコンウェーハの表面にエピタキシャル層を形成
する工程と、シリコンウェーハを600〜850℃の範
囲の所定温度まで5〜20℃/秒の速度で降温してその
所定温度で5〜120分間保持する工程とを含むエピタ
キシャルウェーハを製造する方法である。
The invention according to claim 1 is
As shown in FIGS. 1 and 2, a step of pulling up a nitrogen-doped silicon single crystal rod 14 by the Czochralski method, a step of slicing the silicon single crystal rod 14 to produce a silicon wafer, and a step of 600-8
Holding the silicon wafer at a predetermined temperature in the range of 50 ° C. for 5 to 180 minutes, and heating the silicon wafer to a predetermined temperature in the range of 1100 to 1150 ° C. at a rate of 5 to 20 ° C./sec, and then pretreating with hydrogen at the predetermined temperature Performing a step of forming an epitaxial layer on the surface of the silicon wafer while maintaining the silicon wafer at a predetermined temperature in the range of 1050 to 1150 ° C .; Lowering the temperature at a rate of 20 ° C./sec and maintaining the temperature at the predetermined temperature for 5 to 120 minutes.

【0006】この請求項1に記載されたエピタキシャル
ウェーハを製造する方法では、エピタキシャル層を形成
する前後に、シリコンウェーハに上記熱処理を施すこと
により、エピタキシャル層形成前のシリコンウェーハ内
の酸素析出核の熱的安定性を向上でき、またこの酸素析
出核の生成に寄与する格子欠陥である原子空孔を増やす
ことができる。上記シリコン単結晶棒14にドープされ
た窒素濃度は5×1012〜5×1014cm-3であること
が好ましい。請求項3に係る発明は、請求項1又は2記
載の方法により製造されたエピタキシャルウェーハであ
る。この請求項3に記載されたエピタキシャルウェーハ
はデバイス作製工程においても汚染金属のIG能力を有
する。
In the method of manufacturing an epitaxial wafer according to the present invention, the heat treatment is performed on the silicon wafer before and after the formation of the epitaxial layer, whereby the oxygen precipitation nuclei in the silicon wafer before the formation of the epitaxial layer are formed. The thermal stability can be improved, and the number of atomic vacancies, which are lattice defects that contribute to the generation of the oxygen precipitation nuclei, can be increased. The concentration of nitrogen doped in the silicon single crystal rod 14 is preferably 5 × 10 12 to 5 × 10 14 cm −3 . A third aspect of the present invention is an epitaxial wafer manufactured by the method according to the first or second aspect. The epitaxial wafer according to the third aspect has an IG capability of a contaminant metal even in a device manufacturing process.

【0007】[0007]

【発明の実施の形態】次に本発明の実施の形態を図面に
基づいて説明する。図2に示すように、本発明のエピタ
キシャル層を形成するためのシリコンウェーハは、CZ
法により引上げ機11の石英るつぼ12内のシリコン融
液13からシリコン単結晶棒14を後述する第1〜第3
の引上げ条件で引上げた後、このシリコン単結晶棒14
をスライスして作製される。上記シリコン単結晶棒14
には窒素がドープされる。このシリコン単結晶棒14に
ドープされた窒素濃度は5×1012〜5×1014
-3、好ましくは3×1013〜3×1014cm-3であ
る。窒素濃度を5×1012〜5×1014cm-3の範囲に
限定したのは、5×1012cm-3未満では原子空孔のシ
リコン単結晶棒14内における固溶度が上昇せず、シリ
コン単結晶棒14のその後の熱履歴により原子空孔が消
失し易くなるからであり、5×1014cm-3を越えると
窒素に関係するドナーの発生量が増え単結晶の抵抗率を
大きく変化させるからである。なお、シリコン単結晶棒
14に窒素をドープする方法としては、窒化物が混合さ
れた多結晶シリコン又は窒化膜が形成された多結晶シリ
コンを石英るつぼ12に投入して窒素を含むシリコン融
液13からシリコン単結晶棒14を引上げるか、或いは
シリコン単結晶棒14を窒素ガスを含む不活性ガス雰囲
気中で引上げることにより行われる。また上記シリコン
単結晶棒14には5×1014〜5×1015atoms/
cm3と濃度は低いけれども、p/p-の構造を有するエ
ピタキシャルウェーハを得るためにボロンもドープされ
る。
Embodiments of the present invention will now be described with reference to the drawings. As shown in FIG. 2, the silicon wafer for forming the epitaxial layer of the present invention is CZ
A silicon single crystal rod 14 from a silicon melt 13 in a quartz crucible 12 of a pulling machine 11 by a method described below.
After the silicon single crystal rod 14
Is made by slicing. The above silicon single crystal rod 14
Is doped with nitrogen. The concentration of nitrogen doped in the silicon single crystal rod 14 is 5 × 10 12 to 5 × 10 14 c
m −3 , preferably 3 × 10 13 to 3 × 10 14 cm −3 . The nitrogen concentration was limited to the range of 5 × 10 12 to 5 × 10 14 cm -3 because the solid solubility of atomic vacancies in the silicon single crystal rod 14 did not increase below 5 × 10 12 cm -3. Atomic vacancies tend to disappear due to the subsequent thermal history of the silicon single crystal rod 14, and if it exceeds 5 × 10 14 cm -3 , the generation amount of nitrogen-related donors increases and the resistivity of the single crystal decreases. This is because it greatly changes. As a method of doping nitrogen into the silicon single crystal rod 14, polycrystalline silicon mixed with nitride or polycrystalline silicon formed with a nitride film is charged into the quartz crucible 12, and a silicon melt 13 containing nitrogen is added. This is performed by pulling the silicon single crystal rod 14 from the substrate or pulling the silicon single crystal rod 14 in an inert gas atmosphere containing nitrogen gas. The silicon single crystal rod 14 has a size of 5 × 10 14 to 5 × 10 15 atoms /
Boron is also doped to obtain an epitaxial wafer having a p / p structure, albeit with a low concentration of cm 3 .

【0008】上記引上げ機11のチャンバ24上端には
円筒状のケーシング25が接続され、このケーシング2
5には引上げ手段26が設けられる。図2の符号26a
は石英るつぼ12の回転中心に向って垂下されたワイヤ
ケーブルであり、このワイヤケーブル26aの下端には
シリコン融液13に浸してシリコン単結晶棒14を引上
げるための種結晶26bが取付けられる。また石英るつ
ぼ12の外面は黒鉛サセプタ27により被覆され、黒鉛
サセプタ27の下面は支軸28の上端に固定され、この
支軸28の下部はるつぼ駆動手段29に接続される。
[0008] A cylindrical casing 25 is connected to the upper end of the chamber 24 of the pulling machine 11.
5 is provided with a pulling means 26. Reference numeral 26a in FIG.
Is a wire cable hanging down toward the rotation center of the quartz crucible 12, and a seed crystal 26b for immersing in the silicon melt 13 and pulling up the silicon single crystal rod 14 is attached to a lower end of the wire cable 26a. The outer surface of the quartz crucible 12 is covered with a graphite susceptor 27, and the lower surface of the graphite susceptor 27 is fixed to an upper end of a support shaft 28, and a lower portion of the support shaft 28 is connected to a crucible driving unit 29.

【0009】更にチャンバ24にはこのチャンバ24の
シリコン単結晶棒側に不活性ガスを供給しかつ上記不活
性ガスをチャンバ24のるつぼ内周面側から排出するガ
ス給排手段33が接続される。このガス給排手段33は
一端がケーシング25の周壁に接続され他端が上記不活
性ガスを貯留するタンク(図示せず)に接続された供給
パイプ34と、一端がチャンバ24の下壁に接続され他
端が真空ポンプ(図示せず)に接続された排出パイプ3
5とを有する。供給パイプ34及び排出パイプ35には
これらのパイプを流れる不活性ガスの流量を調整する第
1及び第2流量調整弁31,32がそれぞれ設けられ
る。
Further, a gas supply / discharge means 33 for supplying an inert gas to the silicon single crystal rod side of the chamber 24 and discharging the inert gas from the inner peripheral surface side of the crucible of the chamber 24 is connected to the chamber 24. . One end of the gas supply / discharge means 33 is connected to the peripheral wall of the casing 25 and the other end is connected to a supply pipe 34 connected to a tank (not shown) for storing the inert gas. And a discharge pipe 3 having the other end connected to a vacuum pump (not shown).
And 5. The supply pipe 34 and the discharge pipe 35 are respectively provided with first and second flow control valves 31 and 32 for controlling the flow rate of the inert gas flowing through these pipes.

【0010】一方、上記第1の引上げ条件は、シリコン
単結晶棒14の引上げ速度をV(mm/分)、シリコン
単結晶棒14及びシリコン融液13の固液界面からこの
界面の上方10mmまでにおけるシリコン単結晶棒14
の引上げ方向の温度勾配の平均値をG(℃/mm)とす
るときに、V/Gが0.290〜0.340mm2/分
・℃、好ましくは0.300〜0.330mm2/分・
℃となるように引上げ速度V(mm/分)を設定するこ
とである。V/Gを0.290〜0.340mm2/分
・℃の範囲に限定したのは、シリコン単結晶棒14中に
原子空孔の優勢な領域を作るためである。
On the other hand, the first pulling condition is as follows: the pulling speed of the silicon single crystal rod 14 is V (mm / min), from the solid-liquid interface of the silicon single crystal rod 14 and the silicon melt 13 to 10 mm above this interface. Silicon single crystal rod 14
When the average value of the temperature gradient in the pulling direction is G (° C./mm), V / G is 0.290 to 0.340 mm 2 / min · ° C., preferably 0.300 to 0.330 mm 2 / min.・
In this case, the pulling speed V (mm / min) is set so that the temperature becomes ° C. The reason why V / G is limited to the range of 0.290 to 0.340 mm 2 / min · ° C. is to form a region where atomic vacancies are predominant in the silicon single crystal rod 14.

【0011】上記第2の引上げ条件は、シリコン単結晶
棒14の引上げ時であって1130℃から1050℃ま
での温度範囲を10〜30分間、好ましくは15〜25
分間で冷却することであり、第3の引上げ条件はシリコ
ン単結晶棒14の引上げ時であって850℃から650
℃までの温度範囲を120〜200分間、好ましくは1
30〜180分間で冷却することである。1130℃か
ら1050℃までの温度範囲を10〜30分間に限定し
たのは、シリコン単結晶棒14内の格子欠陥である原子
空孔の消失を抑制するためである。また850℃から6
50℃までの温度範囲を120〜200分間に限定した
のは、上記原子空孔を利用してシリコン単結晶棒14内
に酸素析出核を生成するためである。
The second pulling condition is that when pulling the silicon single crystal rod 14, the temperature range from 1130 ° C. to 1050 ° C. is 10 to 30 minutes, preferably 15 to 25 minutes.
Minutes, and the third pulling condition is the pulling of the silicon single crystal rod 14, which is performed at 850 ° C. to 650 ° C.
C. for a temperature range of 120 to 200 minutes, preferably 1
Cooling for 30 to 180 minutes. The reason why the temperature range from 1130 ° C. to 1050 ° C. is limited to 10 to 30 minutes is to suppress the disappearance of atomic vacancies, which are lattice defects in the silicon single crystal rod 14. Also from 850 ° C to 6
The reason why the temperature range up to 50 ° C. is limited to 120 to 200 minutes is to generate oxygen precipitation nuclei in the silicon single crystal rod 14 using the above-mentioned atomic vacancies.

【0012】上記第1〜第3の引上げ条件を満たすため
には、円筒部17及び円錐部18の壁内に円筒用断熱材
17c及び円錐用断熱材18cがそれぞれ充填された熱
遮蔽部材16を用いることが好ましい。この熱遮蔽部材
16はシリコン単結晶棒14の外周面と石英るつぼ12
の内周面との間に設けられ、ヒータ21からの輻射熱を
遮る円筒状の円筒部17と、この円筒部17の下端に連
設され下方に向うに従って直径が次第に小さくなる円錐
部18と、上記円筒部17をその上縁で支持するフラン
ジ部19とを備える。円筒部17は外管17aと、この
外管17aから所定の間隔をあけて内側にかつ外管17
a同心上に設けられた内管17bと、外管17aと内管
17bとの間に充填された円筒用断熱材17cとを有す
る。また円錐部18は外側コーン18aと、この外側コ
ーン18aよりテーパ角が小さく形成されかつ外側コー
ン18aより内側にかつ外側コーン18aと同心上に設
けられた内側コーン18bと、外側コーン18aと内側
コーン18bとの間に充填された円錐用断熱材18cと
を有する。上記熱遮蔽部材16はフランジ部19を保温
筒22上にリング板23を介して載置することにより、
円錐部18の下縁がシリコン融液13表面から所定の距
離だけ上方に位置するようにチャンバ24内に固定され
る。
In order to satisfy the first to third pulling conditions, the heat shielding member 16 in which the cylindrical heat insulating material 17c and the conical heat insulating material 18c are filled in the walls of the cylindrical portion 17 and the conical portion 18, respectively. Preferably, it is used. The heat shielding member 16 is provided between the outer peripheral surface of the silicon single crystal rod 14 and the quartz crucible 12.
A cylindrical portion 17 which is provided between the inner peripheral surface of the cylindrical portion and blocks radiant heat from the heater 21; a conical portion 18 which is provided at a lower end of the cylindrical portion 17 and has a diameter gradually reduced as it goes downward; A flange portion 19 for supporting the cylindrical portion 17 at its upper edge. The cylindrical portion 17 includes an outer tube 17a and an inner tube 17a at a predetermined distance from the outer tube 17a.
a It has an inner tube 17b provided concentrically, and a cylindrical heat insulating material 17c filled between the outer tube 17a and the inner tube 17b. The conical portion 18 has an outer cone 18a, an inner cone 18b having a smaller taper angle than the outer cone 18a and provided inside and concentric with the outer cone 18a, an outer cone 18a and an inner cone. 18b, and a conical heat insulating material 18c filled therebetween. The heat shielding member 16 is provided by mounting the flange portion 19 on the heat retaining cylinder 22 via the ring plate 23,
The conical portion 18 is fixed in the chamber 24 so that the lower edge of the conical portion 18 is located a predetermined distance above the surface of the silicon melt 13.

【0013】上述のように引上げられたシリコン単結晶
棒14をスライスしてシリコンウェーハを作製した後
に、このシリコンウェーハの表面にエピタキシャル層を
形成することにより、エピタキシャルウェーハが得られ
る。上記エピタキシャル層はその結晶性、量産性、装置
の簡便さ、種々のデバイス構造形成の容易さなどの観点
から、CVD法により形成されることが好ましい。CV
D法によるシリコンのエピタキシャル成長は、例えばS
iCl4、SiHCl3、SiH2Cl2、SiH4などの
シリコンを含む原料ガスをH2ガスとともに反応炉内に
導入して、上記シリコンウェーハの表面に、原料ガスの
熱分解又は還元により生成されたシリコンを析出させる
ことで行われる。
After the silicon single crystal rod 14 pulled as described above is sliced to produce a silicon wafer, an epitaxial layer is formed on the surface of the silicon wafer to obtain an epitaxial wafer. The epitaxial layer is preferably formed by a CVD method from the viewpoints of its crystallinity, mass productivity, simplicity of equipment, ease of forming various device structures, and the like. CV
In the epitaxial growth of silicon by the D method, for example, S
A source gas containing silicon, such as iCl 4 , SiHCl 3 , SiH 2 Cl 2 , SiH 4 , is introduced into a reaction furnace together with H 2 gas, and is generated on the surface of the silicon wafer by thermal decomposition or reduction of the source gas. This is performed by depositing the silicon.

【0014】具体的には、図1に示すように、先ず研磨
したシリコンウェーハを600〜850℃、好ましくは
750〜800℃の範囲の所定温度で5〜180分間、
好ましくは10〜60分間保持し、このシリコンウェー
ハを1100〜1150℃、好ましくは1130〜11
50℃の範囲の所定温度まで5〜20℃/秒、好ましく
は8〜18℃/秒の速度で昇温した後にその所定温度で
水素前処理を行う。シリコンウェーハを600〜850
℃の範囲の所定温度で5〜180分間保持したのは、シ
リコン単結晶棒14をスライスしてシリコンウェーハを
作製した当初の状態で存在する酸素析出核を成長させ、
高温のエピタキシャル層形成時に消失する酸素析出核を
極力低減するとともに、エピタキシャル層形成後に酸素
析出核のサイズが大きくなることにより、熱的に安定な
酸素析出核を生成するためである。またシリコンウェー
ハを1100〜1150℃の範囲の所定温度まで5〜2
0℃/秒の速度で昇温したのは、少しでもスループット
(単位時間当りに処理できる数量)を稼ぐためである。
Specifically, as shown in FIG. 1, a polished silicon wafer is first heated at a predetermined temperature in the range of 600 to 850 ° C., preferably 750 to 800 ° C. for 5 to 180 minutes.
It is preferably held for 10 to 60 minutes, and the silicon wafer is kept at 1100 to 1150 ° C., preferably 1130 to 1110.
After the temperature is raised to a predetermined temperature in the range of 50 ° C. at a rate of 5 to 20 ° C./sec, preferably 8 to 18 ° C./sec, hydrogen pretreatment is performed at the predetermined temperature. 600-850 silicon wafers
The temperature was kept at a predetermined temperature in the range of 5 ° C. for 5 to 180 minutes because the silicon single crystal rod 14 was sliced to grow the oxygen precipitation nuclei existing in the initial state of producing the silicon wafer,
This is because oxygen precipitate nuclei that disappear when a high-temperature epitaxial layer is formed are reduced as much as possible, and the size of the oxygen precipitate nuclei increases after the epitaxial layer is formed, so that thermally stable oxygen precipitate nuclei are generated. In addition, the silicon wafer is cooled to a predetermined temperature in the range of 1100 to 1150 ° C. for 5 to 2 hours.
The reason why the temperature was raised at a rate of 0 ° C./sec is to gain a little throughput (a quantity that can be processed per unit time).

【0015】次にこのシリコンウェーハを1050〜1
150℃、好ましくは1100〜1140℃の範囲の所
定温度で保持した状態でシリコンウェーハの表面にエピ
タキシャル層を形成し、このエピタキシャルウェーハを
600〜850℃、好ましくは750〜800℃の範囲
の所定温度まで5〜20℃/秒、好ましくは8〜18℃
/秒の速度で降温してその所定温度で5〜120分間、
好ましくは10〜60分間保持する。更に上記エピタキ
シャルウェーハを熱処理炉から取出して常温まで自然冷
却する。エピタキシャル層を形成するときにシリコンウ
ェーハを1050〜1150℃の範囲の所定温度で保持
したのは、欠陥の少ないエピタキシャル層を形成するた
めである。またエピタキシャル層形成後にウェーハを6
00〜850℃の範囲の所定温度まで5〜20℃/秒の
速度で降温したのは少しでもスループットを稼ぐためで
ある。更にウェーハを600〜850℃の範囲の所定温
度で5〜120分間保持したのは、エピタキシャル層形
成時に消失しなかった酸素析出核を更に大きくして、熱
的に安定な酸素析出核を生成するためである。
Next, this silicon wafer was loaded with
An epitaxial layer is formed on the surface of the silicon wafer while being maintained at a predetermined temperature of 150 ° C., preferably 1100 to 1140 ° C., and the epitaxial wafer is heated at a predetermined temperature of 600 to 850 ° C., preferably 750 to 800 ° C. Up to 5-20 ° C / sec, preferably 8-18 ° C
/ Second at a predetermined temperature for 5 to 120 minutes,
Preferably, it is maintained for 10 to 60 minutes. Further, the epitaxial wafer is taken out of the heat treatment furnace and naturally cooled to room temperature. The reason why the silicon wafer was held at a predetermined temperature in the range of 1050 to 1150 ° C. when forming the epitaxial layer was to form an epitaxial layer with few defects. After the epitaxial layer is formed,
The reason why the temperature is lowered at a rate of 5 to 20 ° C./sec to a predetermined temperature in the range of 00 to 850 ° C. is to increase the throughput as much as possible. Further, holding the wafer at a predetermined temperature in the range of 600 to 850 ° C. for 5 to 120 minutes further increases the oxygen precipitation nuclei that have not disappeared during the formation of the epitaxial layer, and generates thermally stable oxygen precipitation nuclei. That's why.

【0016】このように製造されたエピタキシャルウェ
ーハでは、シリコン単結晶棒14を比較的高い引上げ速
度で引上げることにより、原子空孔の濃度を高めるとと
もに、シリコン単結晶棒14の引上げ時間を短縮するこ
とができる。またこのシリコン単結晶棒14に窒素をド
ープすることにより、シリコン単結晶棒14内に発生し
た原子空孔の固溶度を高めて原子空孔の消失を抑制する
とともに、この原子空孔を利用してシリコン単結晶棒1
4内に多くの酸素析出核を生成することができる。また
上記シリコン単結晶棒14をスライスして作製されたシ
リコンウェーハの表面にエピタキシャル層を形成する前
後に、上記熱処理を施すことにより、シリコンウェーハ
内の酸素析出核の熱的安定性を向上できるとともに、こ
の酸素析出核の生成に寄与する格子欠陥である原子空孔
を増やすことができる。この結果、上記エピタキシャル
ウェーハは従来のようにシリコンウェーハ裏面へのポリ
シリコンの成膜やサンドブラスト処理を施さなくても、
デバイス作製工程において汚染金属のIG能力を有す
る。
In the epitaxial wafer manufactured in this manner, the silicon single crystal rod 14 is pulled at a relatively high pulling speed, thereby increasing the concentration of atomic vacancies and shortening the pulling time of the silicon single crystal rod 14. be able to. Further, by doping nitrogen into the silicon single crystal rod 14, the solid solubility of the atomic vacancies generated in the silicon single crystal rod 14 is increased to suppress the disappearance of the atomic vacancies and to utilize the atomic vacancies. And silicon single crystal rod 1
4 can generate many oxygen precipitation nuclei. Further, by performing the heat treatment before and after forming the epitaxial layer on the surface of the silicon wafer prepared by slicing the silicon single crystal rod 14, the thermal stability of oxygen precipitation nuclei in the silicon wafer can be improved. Atomic vacancies, which are lattice defects that contribute to the generation of the oxygen precipitation nuclei, can be increased. As a result, the epitaxial wafer does not need to be subjected to polysilicon film formation or sandblasting on the back surface of the silicon wafer as in the related art.
It has the IG capability of contaminant metals in the device fabrication process.

【0017】[0017]

【発明の効果】以上述べたように、本発明によれば、窒
素をドープしたシリコン単結晶棒をチョクラルスキー法
にて引上げ、このシリコン単結晶棒をスライスしてシリ
コンウェーハを作製し、更にこのシリコンウェーハの表
面にエピタキシャル層を形成する前後に所定の熱処理を
施したので、シリコンウェーハ裏面へのポリシリコンの
成膜やサンドブラスト処理を施さなくても、エピタキシ
ャル層形成前のシリコンウェーハ内の酸素析出核の熱的
安定性を向上でき、またこの酸素析出核の生成に寄与す
る格子欠陥である原子空孔を増やすことができる。この
結果、上記方法により製造されたエピタキシャルウェー
ハはデバイス作製工程において汚染金属のIG能力を有
する。
As described above, according to the present invention, a silicon single crystal rod doped with nitrogen is pulled up by the Czochralski method, and the silicon single crystal rod is sliced to produce a silicon wafer. Since a predetermined heat treatment was performed before and after the formation of the epitaxial layer on the front surface of the silicon wafer, the oxygen in the silicon wafer before the formation of the epitaxial layer was formed without forming the polysilicon film or sandblasting on the back surface of the silicon wafer. The thermal stability of the precipitation nucleus can be improved, and the number of atomic vacancies, which are lattice defects that contribute to the generation of the oxygen precipitation nucleus, can be increased. As a result, the epitaxial wafer manufactured by the above method has IG capability of a contaminant metal in a device manufacturing process.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明実施形態のエピタキシャルウェーハにエ
ピタキシャル層を形成する前後の熱処理温度の時間に対
する変化を示す図。
FIG. 1 is a diagram showing a change in a heat treatment temperature with time before and after an epitaxial layer is formed on an epitaxial wafer according to an embodiment of the present invention.

【図2】そのエピタキシャルウェーハ作製用のシリコン
単結晶棒を製造する引上げ機の縦断面図。
FIG. 2 is a longitudinal sectional view of a pulling machine for producing a silicon single crystal rod for producing an epitaxial wafer.

【符号の説明】[Explanation of symbols]

13 シリコン融液 14 シリコン単結晶棒 13 Silicon melt 14 Silicon single crystal rod

───────────────────────────────────────────────────── フロントページの続き (72)発明者 原田 和浩 東京都千代田区大手町1丁目5番1号 三 菱マテリアルシリコン株式会社内 (72)発明者 海原 弘好 東京都千代田区大手町1丁目5番1号 三 菱マテリアルシリコン株式会社内 ──────────────────────────────────────────────────続 き Continuing on the front page (72) Kazuhiro Harada 1-5-1, Otemachi, Chiyoda-ku, Tokyo Mitsui Material Silicon Co., Ltd. (72) Hiroyoshi Kaihara 1-5, Otemachi, Chiyoda-ku, Tokyo No. 1 Mitsubishi Materials Silicon Corporation

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 窒素をドープしたシリコン単結晶棒(14)
をチョクラルスキー法により引上げる工程と、 前記シリコン単結晶棒(14)をスライスしてシリコンウェ
ーハを作製する工程と、 前記シリコンウェーハを600〜850℃の範囲の所定
温度で5〜180分間保持する工程と、 前記シリコンウェーハを1100〜1150℃の範囲の
所定温度まで5〜20℃/秒の速度で昇温した後にその
所定温度で水素前処理を行う工程と、 前記シリコンウェーハを1050〜1150℃の範囲の
所定温度で保持した状態で前記シリコンウェーハの表面
にエピタキシャル層を形成する工程と、 前記シリコンウェーハを600〜850℃の範囲の所定
温度まで5〜20℃/秒の速度で降温してその所定温度
で5〜120分間保持する工程とを含むエピタキシャル
ウェーハを製造する方法。
A silicon single crystal rod doped with nitrogen (14)
Pulling the silicon wafer by the Czochralski method; slicing the silicon single crystal rod (14) to produce a silicon wafer; holding the silicon wafer at a predetermined temperature in the range of 600 to 850 ° C. for 5 to 180 minutes. Performing a hydrogen pretreatment at the predetermined temperature after raising the silicon wafer to a predetermined temperature in the range of 1100 to 1150 ° C. at a rate of 5 to 20 ° C./sec. Forming an epitaxial layer on the surface of the silicon wafer while maintaining the silicon wafer at a predetermined temperature in a range of 600C, and cooling the silicon wafer to a predetermined temperature in a range of 600 to 850C at a rate of 5 to 20C / sec. And holding at a predetermined temperature for 5 to 120 minutes.
【請求項2】 シリコン単結晶棒にドープされた窒素濃
度が5×1012〜5×1014cm-3である請求項1記載
のエピタキシャルウェーハを製造する方法。
2. The method for producing an epitaxial wafer according to claim 1, wherein the concentration of nitrogen doped in the silicon single crystal rod is 5 × 10 12 to 5 × 10 14 cm -3 .
【請求項3】 請求項1又は2記載の方法により製造さ
れたエピタキシャルウェーハ。
3. An epitaxial wafer manufactured by the method according to claim 1.
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