GB1354827A
(en)
*
|
1971-08-25 |
1974-06-05 |
Ibm |
Data processing systems
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US3723976A
(en)
|
1972-01-20 |
1973-03-27 |
Ibm |
Memory system with logical and real addressing
|
US4115866A
(en)
*
|
1972-02-25 |
1978-09-19 |
International Standard Electric Corporation |
Data processing network for communications switching system
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IT988956B
(it)
*
|
1973-06-12 |
1975-04-30 |
Olivetti & Co Spa |
Governo multiplo
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US3916384A
(en)
*
|
1973-06-15 |
1975-10-28 |
Gte Automatic Electric Lab Inc |
Communication switching system computer memory control arrangement
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JPS546171B2
(de)
*
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1973-09-19 |
1979-03-26 |
|
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US3940743A
(en)
*
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1973-11-05 |
1976-02-24 |
Digital Equipment Corporation |
Interconnecting unit for independently operable data processing systems
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(en)
*
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1973-11-16 |
1975-06-10 |
Sperry Rand Corp |
Common storage controller for dual processor system
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US3934227A
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*
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1973-12-05 |
1976-01-20 |
Digital Computer Controls, Inc. |
Memory correction system
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NL7317545A
(nl)
*
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1973-12-21 |
1975-06-24 |
Philips Nv |
Geheugensysteem met hoofd- en buffergeheugen.
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US4073005A
(en)
*
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1974-01-21 |
1978-02-07 |
Control Data Corporation |
Multi-processor computer system
|
JPS5440182B2
(de)
*
|
1974-02-26 |
1979-12-01 |
|
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JPS5812608B2
(ja)
*
|
1974-03-05 |
1983-03-09 |
日本電気株式会社 |
デンシケイサンキシステム
|
GB1506972A
(en)
*
|
1976-02-06 |
1978-04-12 |
Int Computers Ltd |
Data processing systems
|
FR2344094A1
(fr)
*
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1976-03-10 |
1977-10-07 |
Cii |
Systeme de gestion coherente des echanges entre deux niveaux contigus d'une hierarchie de memoires
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US4065809A
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*
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1976-05-27 |
1977-12-27 |
Tokyo Shibaura Electric Co., Ltd. |
Multi-processing system for controlling microcomputers and memories
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GB1505603A
(en)
*
|
1976-07-07 |
1978-03-30 |
Ibm |
Data processing systems
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US4126893A
(en)
*
|
1977-02-17 |
1978-11-21 |
Xerox Corporation |
Interrupt request controller for data processing system
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US4157586A
(en)
*
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1977-05-05 |
1979-06-05 |
International Business Machines Corporation |
Technique for performing partial stores in store-thru memory configuration
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US4136386A
(en)
*
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1977-10-06 |
1979-01-23 |
International Business Machines Corporation |
Backing store access coordination in a multi-processor system
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US4142234A
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*
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1977-11-28 |
1979-02-27 |
International Business Machines Corporation |
Bias filter memory for filtering out unnecessary interrogations of cache directories in a multiprocessor system
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US4357656A
(en)
*
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1977-12-09 |
1982-11-02 |
Digital Equipment Corporation |
Method and apparatus for disabling and diagnosing cache memory storage locations
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*
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1977-12-16 |
1982-10-12 |
Honeywell Information Systems Inc. |
Cache memory command buffer circuit
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JPS5849945B2
(ja)
*
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1977-12-29 |
1983-11-08 |
富士通株式会社 |
バツフア合せ方式
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US4305124A
(en)
*
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1978-06-09 |
1981-12-08 |
Ncr Corporation |
Pipelined computer
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FR2430637A1
(fr)
*
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1978-07-06 |
1980-02-01 |
Cii Honeywell Bull |
Procede et dispositif pour garantir la coherence des informations entre des caches et d'autres memoires d'un systeme de traitement de l'information travaillant en multitraitement
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FR2431733A1
(fr)
*
|
1978-07-21 |
1980-02-15 |
Sfena |
Systeme de communication par memoire commune dans un calculateur comprenant plusieurs processeurs
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US4228503A
(en)
*
|
1978-10-02 |
1980-10-14 |
Sperry Corporation |
Multiplexed directory for dedicated cache memory system
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(en)
*
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1978-12-11 |
1981-03-17 |
Bell Telephone Laboratories, Incorporated |
Multiprocessor system with demand assignable program paging stores
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US4282572A
(en)
*
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1979-01-15 |
1981-08-04 |
Ncr Corporation |
Multiprocessor memory access system
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JPS55134459A
(en)
*
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1979-04-06 |
1980-10-20 |
Hitachi Ltd |
Data processing system
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US4293910A
(en)
*
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1979-07-02 |
1981-10-06 |
International Business Machines Corporation |
Reconfigurable key-in-storage means for protecting interleaved main storage
|
DE2939412C2
(de)
*
|
1979-09-28 |
1983-11-17 |
Siemens AG, 1000 Berlin und 8000 München |
Schaltungsanordung zum Adressieren von Daten für Lese- und Schreibzugriffe in einer Datenverarbeitungsanlage
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US4313161A
(en)
*
|
1979-11-13 |
1982-01-26 |
International Business Machines Corporation |
Shared storage for multiple processor systems
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JPS5680872A
(en)
*
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1979-12-06 |
1981-07-02 |
Fujitsu Ltd |
Buffer memory control system
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GB2065941B
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*
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1979-12-14 |
1984-02-29 |
Honeywell Inf Systems |
Cache store system
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FR2474201B1
(fr)
*
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1980-01-22 |
1986-05-16 |
Bull Sa |
Procede et dispositif pour gerer les conflits poses par des acces multiples a un meme cache d'un systeme de traitement numerique de l'information comprenant au moins deux processus possedant chacun un cache
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US4345309A
(en)
*
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1980-01-28 |
1982-08-17 |
Digital Equipment Corporation |
Relating to cached multiprocessor system with pipeline timing
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US4507781A
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*
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1980-03-14 |
1985-03-26 |
Ibm Corporation |
Time domain multiple access broadcasting, multipoint, and conferencing communication apparatus and method
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DE3012205C2
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*
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1980-03-28 |
1982-05-27 |
Siemens AG, 1000 Berlin und 8000 München |
Multiprozessor-Datenverarbeitungsanlage mit mehreren jeweils einem Prozessor zugeordneten Pufferspeichern
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FR2479532B1
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*
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1980-04-01 |
1986-09-19 |
Bull Sa |
Procede et dispositif pour gerer les transferts d'informations entre un ensemble memoire et les differentes unites de traitement d'un systeme de traitement numerique de l'information
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US4399506A
(en)
*
|
1980-10-06 |
1983-08-16 |
International Business Machines Corporation |
Store-in-cache processor means for clearing main storage
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DE3176632D1
(en)
*
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1980-11-10 |
1988-03-03 |
Ibm |
Cache storage hierarchy for a multiprocessor system
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US4394731A
(en)
*
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1980-11-10 |
1983-07-19 |
International Business Machines Corporation |
Cache storage line shareability control for a multiprocessor system
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JPS57105879A
(en)
*
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1980-12-23 |
1982-07-01 |
Hitachi Ltd |
Control system for storage device
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US4410944A
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*
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1981-03-24 |
1983-10-18 |
Burroughs Corporation |
Apparatus and method for maintaining cache memory integrity in a shared memory environment
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US4445174A
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*
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1981-03-31 |
1984-04-24 |
International Business Machines Corporation |
Multiprocessing system including a shared cache
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US4814979A
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*
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1981-04-01 |
1989-03-21 |
Teradata Corporation |
Network to transmit prioritized subtask pockets to dedicated processors
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1981-04-01 |
1990-07-31 |
Teradata Corporation |
Message transmission system for selectively transmitting one of two colliding messages based on contents thereof
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1981-06-24 |
1985-09-03 |
Elevator Gmbh |
Apparatus for inter-processor data transfer in a multi-processor system
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*
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1981-08-03 |
1985-06-25 |
Honeywell Information Systems Inc. |
Split-cycle cache system with SCU controlled cache clearing during cache store access period
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1982-02-23 |
1984-07-31 |
International Business Machines Corporation |
Multiprocessor cache replacement under task control
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*
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1982-05-27 |
1985-03-05 |
International Business Machines Corporation |
System for independent cache-to-cache transfer
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JPS5955565A
(ja)
*
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1982-09-24 |
1984-03-30 |
Fujitsu Ltd |
マルチフア−ムウエア方式
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*
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1982-11-30 |
1985-01-01 |
Rca Corporation |
Multiprocessor-memory data transfer network
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1983-05-25 |
1987-10-06 |
Ramtek Corporation |
Multiprocessor communication method and apparatus
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1983-07-07 |
1987-09-22 |
Honeywell Bull Inc. |
Computer hierarchy control
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1983-07-29 |
1989-08-15 |
Hewlett-Packard Company |
Write-back cache system using concurrent address transfers to setup requested address in main memory before dirty miss signal from cache
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1983-10-13 |
1989-10-17 |
Mitchell Maurice E |
Microcomputer with disconnected, open, independent, bimemory architecture, allowing large interacting, interconnected multi-microcomputer parallel systems accomodating multiple levels of programmer defined heirarchy
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JPS60138653A
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1983-12-27 |
1985-07-23 |
Hitachi Ltd |
階層記憶制御方式
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*
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1984-05-17 |
1990-02-27 |
Texas Instruments Incorporated |
Multiprocessor
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JPS60258671A
(ja)
*
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1984-06-05 |
1985-12-20 |
Nec Corp |
プロセツサ
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JPS6170654A
(ja)
*
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1984-09-14 |
1986-04-11 |
Hitachi Ltd |
分散処理システムにおける資源管理方式
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1985-06-28 |
1987-12-15 |
Hewlett-Packard Company |
Cache memory consistency control with explicit software instructions
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JPS6279797U
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1985-11-08 |
1987-05-21 |
|
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1985-11-12 |
1989-01-24 |
American Telephone And Telegraph Company, At&T Bell Laboratories |
Method of propagating resource information in a computer network
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JPH059965Y2
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1986-03-03 |
1993-03-11 |
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1986-06-27 |
1988-08-30 |
Honeywell Bull Inc. |
Read in process memory apparatus
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1987-12-02 |
1991-04-16 |
Xerox Corporation |
Representation of collaborative multi-user activities relative to shared structured data objects in a networked workstation environment
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1987-12-02 |
1993-06-15 |
Xerox Corporation |
Updating local copy of shared data in a collaborative system
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1988-08-16 |
1994-05-31 |
International Business Machines Corporation |
Multiple caches using state information indicating if cache line was previously modified and type of access rights granted to assign access rights to cache line
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1988-08-25 |
1991-07-02 |
Edge Computer Corporation |
Coherent cache structures and methods
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1988-08-25 |
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Edgcore Technology, Inc. |
Coherent cache structures and methods
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1988-09-19 |
1994-01-04 |
Princeton University |
Oblivious memory computer networking
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1988-10-06 |
1993-09-21 |
International Computers Limited |
Method for bootstrap loading in a data processing system comprising searching a plurality of program source devices for a bootstrap program if initial data indicating a bootstrap program source device fails a validity check
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1989-01-09 |
1993-02-16 |
Intel Corporation |
Processor with hierarchal memory and using meta-instructions for software control of loading, unloading and execution of machine instructions stored in the cache
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1989-01-13 |
1992-11-03 |
International Business Machines Corporation |
Computer system with input/output cache
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1989-01-27 |
1993-02-09 |
Digital Equipment Corporation |
Method and apparatus for reducing memory read latency in a shared memory system with multiple processors
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1989-01-27 |
1994-12-06 |
Digital Equipment Corporation |
Write-read/write-pass memory subsystem cycle
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1989-02-22 |
1993-05-11 |
International Business Machines Corporation |
Multi-processor caches with large granularity exclusivity locking
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1989-10-17 |
1991-10-09 |
MITCHELL, Maurice E. |
Rechner mit abgeschalteter offener unabhängiger doppelspeicherarchitektur
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1990-01-22 |
1993-04-27 |
International Business Machines Corporation |
Fast store-through cache memory
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1990-04-26 |
1994-03-22 |
Digital Equipment Company |
Cache coherency protocol for multi processor computer system
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1990-06-29 |
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Digital Equipment Corporation |
Method and apparatus for sharing data between processors in a computer system
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1990-09-24 |
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Data storage system controlled remote data mirroring with respectively maintained data indices
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1991-09-05 |
1999-09-14 |
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Bidirectional data bus reservation priority controls having token logic
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1991-09-18 |
1996-06-25 |
Ncr Corporation |
Computer memory data merging technique for computers with write-back caches
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1991-09-19 |
1994-11-01 |
Hewlett-Packard Company |
Critical line first paging system
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1991-12-13 |
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Apparatus for and method of managing the availability of items
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1992-03-09 |
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High-performance non-volatile ram protected write cache accelerator system
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JP2568017B2
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1992-03-12 |
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マイクロプロセッサ及びそれを使用したデータ処理システム
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1992-04-24 |
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Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system
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Memory system and method for selective multi-level caching using a cache level code
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System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions
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System for maintaining data coherency in cache memory by periodically broadcasting invalidation reports from server to client
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Method and system for providing a static snapshot of data stored on a mass storage system
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Backup system that takes a snapshot of the locations in a mass storage device that has been identified for updating prior to updating
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Memory controller with priority queues
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System for migrating data by selecting a first or second transfer means based on the status of a data element map initialized to a predetermined state
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Computer system and method for maintaining an integrated shared buffer memory in a group of interconnected hosts
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