CA2391480C - Single chip cmos transmitter/receiver and method of using same - Google Patents

Single chip cmos transmitter/receiver and method of using same Download PDF

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Publication number
CA2391480C
CA2391480C CA002391480A CA2391480A CA2391480C CA 2391480 C CA2391480 C CA 2391480C CA 002391480 A CA002391480 A CA 002391480A CA 2391480 A CA2391480 A CA 2391480A CA 2391480 C CA2391480 C CA 2391480C
Authority
CA
Canada
Prior art keywords
signals
frequency
phase
signal
coupled
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA002391480A
Other languages
English (en)
French (fr)
Other versions
CA2391480A1 (en
Inventor
Kyeongho Lee
Deog-Kyoon Jeong
Joonbae Park
Wonchan Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GCT Semiconductor Inc
Original Assignee
GCT Semiconductor Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GCT Semiconductor Inc filed Critical GCT Semiconductor Inc
Priority claimed from PCT/US2000/031065 external-priority patent/WO2001035529A2/en
Publication of CA2391480A1 publication Critical patent/CA2391480A1/en
Application granted granted Critical
Publication of CA2391480C publication Critical patent/CA2391480C/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/16—Networks for phase shifting
    • H03H11/22—Networks for phase shifting providing two or more phase shifted output signals, e.g. n-phase output
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
    • H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
    • H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
    • H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/16—Circuits
    • H04B1/26—Circuits for superheterodyne receivers
    • H04B1/28—Circuits for superheterodyne receivers the receiver comprising at least one semiconductor device having three or more electrodes
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
    • H04B1/40—Circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F2200/00—Indexing scheme relating to amplifiers
    • H03F2200/372—Noise reduction and elimination in amplifier
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
    • H03H11/00—Networks using active elements
    • H03H11/02—Multiple-port networks
    • H03H11/04—Frequency selective two-port networks
    • H03H2011/0494—Complex filters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
    • H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
    • H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Superheterodyne Receivers (AREA)
  • Circuits Of Receivers In General (AREA)
  • Transceivers (AREA)
CA002391480A 1999-11-12 2000-11-13 Single chip cmos transmitter/receiver and method of using same Expired - Fee Related CA2391480C (en)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US16487499P 1999-11-12 1999-11-12
US60/164,874 1999-11-12
US1100A 2000-11-06 2000-11-06
USGCT-011 2000-11-06
PCT/US2000/031065 WO2001035529A2 (en) 1999-11-12 2000-11-13 Single chip cmos transmitter/receiver and method of using same

Publications (2)

Publication Number Publication Date
CA2391480A1 CA2391480A1 (en) 2001-05-17
CA2391480C true CA2391480C (en) 2009-10-06

Family

ID=26667125

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002391480A Expired - Fee Related CA2391480C (en) 1999-11-12 2000-11-13 Single chip cmos transmitter/receiver and method of using same

Country Status (4)

Country Link
CN (1) CN100420246C (zh)
AU (1) AU767508B2 (zh)
CA (1) CA2391480C (zh)
HK (1) HK1054825A1 (zh)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4647361B2 (ja) 2005-03-29 2011-03-09 ルネサスエレクトロニクス株式会社 半導体集積回路
WO2008091230A1 (en) 2007-01-26 2008-07-31 Agency For Science, Technology And Research A radio frequency identification transceiver
CN101447766B (zh) * 2007-11-27 2012-08-01 立锜科技股份有限公司 消除偏移的单输出运算放大器及其方法
CN102790596B (zh) * 2011-05-20 2014-10-29 杭州中科微电子有限公司 一种消除直流失调的自动增益控制放大器
US9219410B2 (en) * 2012-09-14 2015-12-22 Analog Devices, Inc. Charge pump supply with clock phase interpolation
CN103036588B (zh) * 2012-12-05 2014-11-05 中国科学院上海微系统与信息技术研究所 用于物联网短距离无线互联无线节点的超低功耗收发机
US9300297B2 (en) * 2013-11-05 2016-03-29 Qualcomm Incorporated Reference-voltage-less pseudo-differential input circuitry
US9509268B2 (en) * 2014-11-04 2016-11-29 Mediatek Inc. Signal amplifying system, AC signal generating circuit, amplifying gain acquiring method, and AC signal generating method
US9692471B2 (en) * 2015-01-21 2017-06-27 Mediatek Singapore Pte. Ltd. Wireless receiver with high linearity
CN105099488A (zh) * 2015-07-20 2015-11-25 联想(北京)有限公司 一种射频电路
CN106788511B (zh) * 2016-12-30 2019-07-23 北京时代民芯科技有限公司 一种宽带射频接收机
KR102557997B1 (ko) * 2017-12-05 2023-07-21 삼성전자주식회사 반송파 집적(Carrier Aggregation)을 이용하여 신호를 송수신하는 RFIC 및 이를 포함하는 무선 통신 장치
KR102527676B1 (ko) * 2018-07-13 2023-05-03 삼성전자주식회사 위상 고정 루프 회로
CN112865154B (zh) * 2021-03-08 2024-04-12 阳光电源股份有限公司 一种储能系统及其电池簇均衡控制方法
CN113507295B (zh) * 2021-09-13 2021-11-19 成都明夷电子科技有限公司 一种基于soi cmos工艺的全集成宽频可配置前端的应用方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE69624673T2 (de) * 1996-01-17 2003-09-18 Nokia Corp., Espoo Verfahren zur Ausdehnung des Bereichs eines Empfangssignalstärkenindikators und nach diesem Verfahren arbeitender Funksendeempfänger
JPH10117127A (ja) * 1996-10-11 1998-05-06 Toshiba Corp 論理記憶回路及び論理回路

Also Published As

Publication number Publication date
CN100420246C (zh) 2008-09-17
CA2391480A1 (en) 2001-05-17
AU767508B2 (en) 2003-11-13
AU1600501A (en) 2001-06-06
CN1411651A (zh) 2003-04-16
HK1054825A1 (en) 2003-12-12

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