CA2305894C - Structure de dispositif electronique permettant de prevenir les defauts de fonctionnement causes par les ondes electromagnetiques exterieures - Google Patents

Structure de dispositif electronique permettant de prevenir les defauts de fonctionnement causes par les ondes electromagnetiques exterieures Download PDF

Info

Publication number
CA2305894C
CA2305894C CA 2305894 CA2305894A CA2305894C CA 2305894 C CA2305894 C CA 2305894C CA 2305894 CA2305894 CA 2305894 CA 2305894 A CA2305894 A CA 2305894A CA 2305894 C CA2305894 C CA 2305894C
Authority
CA
Canada
Prior art keywords
circuit board
electronic device
electronic component
input
electromagnetic waves
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CA 2305894
Other languages
English (en)
Other versions
CA2305894A1 (fr
Inventor
Hajime Matsuzawa
Koetsu Tamura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of CA2305894A1 publication Critical patent/CA2305894A1/fr
Application granted granted Critical
Publication of CA2305894C publication Critical patent/CA2305894C/fr
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/1302—Disposition
    • H01L2224/13025—Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Health & Medical Sciences (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
CA 2305894 1999-04-19 2000-04-17 Structure de dispositif electronique permettant de prevenir les defauts de fonctionnement causes par les ondes electromagnetiques exterieures Expired - Fee Related CA2305894C (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP11058399A JP2000307289A (ja) 1999-04-19 1999-04-19 電子部品組立体
JP110583/1999 1999-04-19

Publications (2)

Publication Number Publication Date
CA2305894A1 CA2305894A1 (fr) 2000-10-19
CA2305894C true CA2305894C (fr) 2004-05-04

Family

ID=14539536

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2305894 Expired - Fee Related CA2305894C (fr) 1999-04-19 2000-04-17 Structure de dispositif electronique permettant de prevenir les defauts de fonctionnement causes par les ondes electromagnetiques exterieures

Country Status (3)

Country Link
US (1) US6472724B1 (fr)
JP (1) JP2000307289A (fr)
CA (1) CA2305894C (fr)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100430203B1 (ko) * 1999-10-29 2004-05-03 가부시키가이샤 히타치세이사쿠쇼 반도체 장치 및 그 제조 방법
DE10026353A1 (de) * 2000-05-27 2001-11-29 Mannesmann Vdo Ag Abgeschirmte, elektronische Schaltung
US8617934B1 (en) 2000-11-28 2013-12-31 Knowles Electronics, Llc Methods of manufacture of top port multi-part surface mount silicon condenser microphone packages
US7434305B2 (en) 2000-11-28 2008-10-14 Knowles Electronics, Llc. Method of manufacturing a microphone
US20030112710A1 (en) * 2001-12-18 2003-06-19 Eidson John C. Reducing thermal drift in electronic components
DE10164502B4 (de) * 2001-12-28 2013-07-04 Epcos Ag Verfahren zur hermetischen Verkapselung eines Bauelements
US6560125B1 (en) * 2001-12-28 2003-05-06 Motorola, Inc. Shield for shielding radio components
JP3923368B2 (ja) * 2002-05-22 2007-05-30 シャープ株式会社 半導体素子の製造方法
US20040000428A1 (en) * 2002-06-26 2004-01-01 Mirng-Ji Lii Socketless package to circuit board assemblies and methods of using same
TW565009U (en) * 2003-01-20 2003-12-01 Benq Corp Electronic module having ball grid array
US20080112151A1 (en) 2004-03-04 2008-05-15 Skyworks Solutions, Inc. Overmolded electronic module with an integrated electromagnetic shield using SMT shield wall components
US8399972B2 (en) * 2004-03-04 2013-03-19 Skyworks Solutions, Inc. Overmolded semiconductor package with a wirebond cage for EMI shielding
US7422448B2 (en) * 2005-07-28 2008-09-09 Delphi Technologies, Inc. Surface mount connector
DE102007020656B4 (de) * 2007-04-30 2009-05-07 Infineon Technologies Ag Werkstück mit Halbleiterchips, Halbleiterbauteil und Verfahren zur Herstellung eines Werkstücks mit Halbleiterchips
US7799602B2 (en) * 2008-12-10 2010-09-21 Stats Chippac, Ltd. Semiconductor device and method of forming a shielding layer over a semiconductor die after forming a build-up interconnect structure
US9679869B2 (en) 2011-09-02 2017-06-13 Skyworks Solutions, Inc. Transmission line for high performance radio frequency applications
CN103999484B (zh) 2011-11-04 2017-06-30 美商楼氏电子有限公司 作为声学设备中的屏障的嵌入式电介质和制造方法
US8948712B2 (en) 2012-05-31 2015-02-03 Skyworks Solutions, Inc. Via density and placement in radio frequency shielding applications
KR20190058711A (ko) 2012-06-14 2019-05-29 스카이워크스 솔루션즈, 인코포레이티드 고조파 종단 회로를 포함하는 전력 증폭기 모듈 및 관련된 시스템, 장치, 및 방법
US9295157B2 (en) 2012-07-13 2016-03-22 Skyworks Solutions, Inc. Racetrack design in radio frequency shielding applications
US9078063B2 (en) 2012-08-10 2015-07-07 Knowles Electronics, Llc Microphone assembly with barrier to prevent contaminant infiltration
JP6103066B2 (ja) * 2013-09-11 2017-03-29 株式会社村田製作所 電子部品の外部電極形成方法
US9794661B2 (en) 2015-08-07 2017-10-17 Knowles Electronics, Llc Ingress protection for reducing particle infiltration into acoustic chamber of a MEMS microphone package
WO2018163961A1 (fr) 2017-03-06 2018-09-13 株式会社村田製作所 Structure et procédé de montage d'un module équipé d'une protection sur une carte de circuit imprimé, et module équipé d'une protection
CN108346952B (zh) * 2018-01-25 2020-11-24 番禺得意精密电子工业有限公司 电连接器固持装置
US20200098698A1 (en) * 2018-09-26 2020-03-26 Intel Corporation Novel wafer level chip scale package (wlcsp), flip-chip chip scale package (fccsp), and fan out shielding concepts
US11244876B2 (en) 2019-10-09 2022-02-08 Microchip Technology Inc. Packaged semiconductor die with micro-cavity
CN111312078B (zh) * 2020-03-05 2022-03-08 武汉华星光电半导体显示技术有限公司 显示面板及其侧面邦定方法
US11177223B1 (en) * 2020-09-02 2021-11-16 Qualcomm Incorporated Electromagnetic interference shielding for packages and modules
US11393698B2 (en) * 2020-12-18 2022-07-19 STATS ChipPAC Pte. Ltd. Mask design for improved attach position

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4616406A (en) * 1984-09-27 1986-10-14 Advanced Micro Devices, Inc. Process of making a semiconductor device having parallel leads directly connected perpendicular to integrated circuit layers therein
US5103292A (en) * 1989-11-29 1992-04-07 Olin Corporation Metal pin grid array package
JP2772739B2 (ja) * 1991-06-20 1998-07-09 いわき電子株式会社 リードレスパッケージの外部電極構造及びその製造方法
US5573172A (en) * 1993-11-08 1996-11-12 Sawtek, Inc. Surface mount stress relief hidden lead package device and method
US5491303A (en) * 1994-03-21 1996-02-13 Motorola, Inc. Surface mount interposer
US5585671A (en) * 1994-10-07 1996-12-17 Nagesh; Voddarahalli K. Reliable low thermal resistance package for high power flip clip ICs
JPH08288686A (ja) 1995-04-20 1996-11-01 Nec Corp 半導体装置
US5694300A (en) * 1996-04-01 1997-12-02 Northrop Grumman Corporation Electromagnetically channelized microwave integrated circuit
US5866943A (en) * 1997-06-23 1999-02-02 Lsi Logic Corporation System and method for forming a grid array device package employing electomagnetic shielding

Also Published As

Publication number Publication date
JP2000307289A (ja) 2000-11-02
US6472724B1 (en) 2002-10-29
CA2305894A1 (fr) 2000-10-19

Similar Documents

Publication Publication Date Title
CA2305894C (fr) Structure de dispositif electronique permettant de prevenir les defauts de fonctionnement causes par les ondes electromagnetiques exterieures
US5986340A (en) Ball grid array package with enhanced thermal and electrical characteristics and electronic device incorporating same
US6326244B1 (en) Method of making a cavity ball grid array apparatus
EP0729180B1 (fr) Empaquetage de modules à multi-puces sans interconnexion à fil
KR100218996B1 (ko) 반도체장치
US5640047A (en) Ball grid assembly type semiconductor device having a heat diffusion function and an electric and magnetic shielding function
US6376907B1 (en) Ball grid array type package for semiconductor device
US5581122A (en) Packaging assembly with consolidated common voltage connections for integrated circuits
US6002147A (en) Hybrid microwave-frequency integrated circuit
JP3259420B2 (ja) フリップチップの接続構造
US5923954A (en) Ball grid array package and fabrication method therefor
US20060214278A1 (en) Shield and semiconductor die assembly
US6383838B2 (en) Substrateless chip scale package and method of making same
US20090289352A1 (en) Semiconductor device and a method for manufacturing the semiconductor device
US6111761A (en) Electronic assembly
US5486723A (en) Packaged integrated circuit add-on card
JPH08125379A (ja) シールド装置
US5909055A (en) Chip package device mountable on a mother board in whichever of facedown and wire bonding manners
US6054757A (en) Semiconductor apparatus, circuit board and combination thereof
US6414246B1 (en) Printed circuit board (PCB)
US6320136B1 (en) Layered printed-circuit-board and module using the same
JPH1050877A (ja) 半導体パッケージ
US6198160B1 (en) Surface mounted type semiconductor device with wrap-around external leads
JP3715120B2 (ja) ハイブリッドモジュール
JPH07297236A (ja) 半導体素子実装用フィルムと半導体素子実装構造

Legal Events

Date Code Title Description
EEER Examination request
MKLA Lapsed