CA2094754A1 - Multilayer board and fabrication method thereof - Google Patents

Multilayer board and fabrication method thereof

Info

Publication number
CA2094754A1
CA2094754A1 CA002094754A CA2094754A CA2094754A1 CA 2094754 A1 CA2094754 A1 CA 2094754A1 CA 002094754 A CA002094754 A CA 002094754A CA 2094754 A CA2094754 A CA 2094754A CA 2094754 A1 CA2094754 A1 CA 2094754A1
Authority
CA
Canada
Prior art keywords
layer
wiring pattern
via hole
hole portion
multilayer board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA002094754A
Other languages
English (en)
French (fr)
Inventor
Jun-Ichi Ito
Toshitsugu Shimamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokuyama Corp
Original Assignee
Tokuyama Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokuyama Corp filed Critical Tokuyama Corp
Publication of CA2094754A1 publication Critical patent/CA2094754A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
    • H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
    • H05K3/4069—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in organic insulating substrates
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0195—Dielectric or adhesive layers comprising a plurality of layers, e.g. in a multilayer structure
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/096—Vertically aligned vias, holes or stacked vias

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
CA002094754A 1992-04-27 1993-04-23 Multilayer board and fabrication method thereof Abandoned CA2094754A1 (en)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
JP107,984/92 1992-04-27
JP10798492 1992-04-27
JP33136092 1992-12-11
JP331,360/92 1992-12-11

Publications (1)

Publication Number Publication Date
CA2094754A1 true CA2094754A1 (en) 1993-10-28

Family

ID=26447961

Family Applications (1)

Application Number Title Priority Date Filing Date
CA002094754A Abandoned CA2094754A1 (en) 1992-04-27 1993-04-23 Multilayer board and fabrication method thereof

Country Status (3)

Country Link
KR (1) KR940006434A (ko)
CA (1) CA2094754A1 (ko)
TW (1) TW230293B (ko)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20010047630A (ko) * 1999-11-22 2001-06-15 전세호 홀플러깅 보조판 및 이를 이용한 홀플러깅 방법
TWI741370B (zh) * 2019-09-17 2021-10-01 李家銘 具有層間導孔的線路結構的製法

Also Published As

Publication number Publication date
TW230293B (ko) 1994-09-11
KR940006434A (ko) 1994-03-23

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Legal Events

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