CA2031625A1 - Video memory system with intermediate buffer - Google Patents

Video memory system with intermediate buffer

Info

Publication number
CA2031625A1
CA2031625A1 CA 2031625 CA2031625A CA2031625A1 CA 2031625 A1 CA2031625 A1 CA 2031625A1 CA 2031625 CA2031625 CA 2031625 CA 2031625 A CA2031625 A CA 2031625A CA 2031625 A1 CA2031625 A1 CA 2031625A1
Authority
CA
Canada
Prior art keywords
memory
signals
address
data
buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
CA 2031625
Other languages
English (en)
French (fr)
Inventor
Chien-Chih Yu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Acer Inc
Original Assignee
Acer Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Acer Inc filed Critical Acer Inc
Publication of CA2031625A1 publication Critical patent/CA2031625A1/en
Abandoned legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
    • G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
    • G09G5/39—Control of the bit-mapped memory
    • G09G5/393—Arrangements for updating the contents of the bit-mapped memory
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2360/00—Aspects of the architecture of display systems
    • G09G2360/12—Frame memory handling
    • G09G2360/121—Frame memory handling using a cache memory

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Multimedia (AREA)
  • Controls And Circuits For Display Device (AREA)
  • Image Input (AREA)
CA 2031625 1990-10-24 1990-12-06 Video memory system with intermediate buffer Abandoned CA2031625A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US60247990A 1990-10-24 1990-10-24
US07/602,479 1990-10-24

Publications (1)

Publication Number Publication Date
CA2031625A1 true CA2031625A1 (en) 1992-04-25

Family

ID=24411507

Family Applications (1)

Application Number Title Priority Date Filing Date
CA 2031625 Abandoned CA2031625A1 (en) 1990-10-24 1990-12-06 Video memory system with intermediate buffer

Country Status (2)

Country Link
EP (1) EP0482263A3 (de)
CA (1) CA2031625A1 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5444458A (en) * 1993-02-22 1995-08-22 Casio Computer Co., Ltd. Display data write control device
US7607312B2 (en) 2005-05-27 2009-10-27 Maytag Corporation Insulated ice compartment for bottom mount refrigerator with temperature control system
DE102008003436A1 (de) * 2008-01-07 2009-07-09 Micronas Gmbh Verfahren zur Änderung von Registerinhalten in einer Videosignalverarbeitungsschaltung und Videosignalverarbeitungsschaltung

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4418343A (en) * 1981-02-19 1983-11-29 Honeywell Information Systems Inc. CRT Refresh memory system
JPS60117327A (ja) * 1983-11-30 1985-06-24 Fuji Xerox Co Ltd ディスプレイ装置

Also Published As

Publication number Publication date
EP0482263A3 (en) 1992-08-26
EP0482263A2 (de) 1992-04-29

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Legal Events

Date Code Title Description
FZDE Dead