EP0482263A3 - Video memory system with intermediate buffer - Google Patents
Video memory system with intermediate buffer Download PDFInfo
- Publication number
- EP0482263A3 EP0482263A3 EP19900313405 EP90313405A EP0482263A3 EP 0482263 A3 EP0482263 A3 EP 0482263A3 EP 19900313405 EP19900313405 EP 19900313405 EP 90313405 A EP90313405 A EP 90313405A EP 0482263 A3 EP0482263 A3 EP 0482263A3
- Authority
- EP
- European Patent Office
- Prior art keywords
- memory system
- video memory
- intermediate buffer
- buffer
- video
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/001—Arbitration of resources in a display system, e.g. control of access to frame buffer by video controller and/or main processor
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
- G09G5/36—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators characterised by the display of a graphic pattern, e.g. using an all-points-addressable [APA] memory
- G09G5/39—Control of the bit-mapped memory
- G09G5/393—Arrangements for updating the contents of the bit-mapped memory
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/12—Frame memory handling
- G09G2360/121—Frame memory handling using a cache memory
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Multimedia (AREA)
- Controls And Circuits For Display Device (AREA)
- Image Input (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US60247990A | 1990-10-24 | 1990-10-24 | |
US602479 | 1990-10-24 |
Publications (2)
Publication Number | Publication Date |
---|---|
EP0482263A2 EP0482263A2 (de) | 1992-04-29 |
EP0482263A3 true EP0482263A3 (en) | 1992-08-26 |
Family
ID=24411507
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
EP19900313405 Withdrawn EP0482263A3 (en) | 1990-10-24 | 1990-12-10 | Video memory system with intermediate buffer |
Country Status (2)
Country | Link |
---|---|
EP (1) | EP0482263A3 (de) |
CA (1) | CA2031625A1 (de) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5444458A (en) * | 1993-02-22 | 1995-08-22 | Casio Computer Co., Ltd. | Display data write control device |
US7607312B2 (en) | 2005-05-27 | 2009-10-27 | Maytag Corporation | Insulated ice compartment for bottom mount refrigerator with temperature control system |
DE102008003436A1 (de) * | 2008-01-07 | 2009-07-09 | Micronas Gmbh | Verfahren zur Änderung von Registerinhalten in einer Videosignalverarbeitungsschaltung und Videosignalverarbeitungsschaltung |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4418343A (en) * | 1981-02-19 | 1983-11-29 | Honeywell Information Systems Inc. | CRT Refresh memory system |
JPS60117327A (ja) * | 1983-11-30 | 1985-06-24 | Fuji Xerox Co Ltd | ディスプレイ装置 |
-
1990
- 1990-12-06 CA CA 2031625 patent/CA2031625A1/en not_active Abandoned
- 1990-12-10 EP EP19900313405 patent/EP0482263A3/en not_active Withdrawn
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4418343A (en) * | 1981-02-19 | 1983-11-29 | Honeywell Information Systems Inc. | CRT Refresh memory system |
JPS60117327A (ja) * | 1983-11-30 | 1985-06-24 | Fuji Xerox Co Ltd | ディスプレイ装置 |
Non-Patent Citations (2)
Title |
---|
IBM TECHNICAL DISCLOSURE BULLETIN. vol. 25, no. 3B, August 1982, NEW YORK US pages 1610 - 1611; J.P. HURST: 'Simultaneous storage of two asynchronous memories for CRT refresh' * |
PATENT ABSTRACTS OF JAPAN vol. 009, no. 273 (P-401)30 October 1985 & JP-A-60 117 327 ( FUJI XEROX KK ) 24 June 1985 * |
Also Published As
Publication number | Publication date |
---|---|
CA2031625A1 (en) | 1992-04-25 |
EP0482263A2 (de) | 1992-04-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PUAI | Public reference made under article 153(3) epc to a published international application that has entered the european phase |
Free format text: ORIGINAL CODE: 0009012 |
|
AK | Designated contracting states |
Kind code of ref document: A2 Designated state(s): DE FR GB IT |
|
PUAL | Search report despatched |
Free format text: ORIGINAL CODE: 0009013 |
|
AK | Designated contracting states |
Kind code of ref document: A3 Designated state(s): DE FR GB IT |
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STAA | Information on the status of an ep patent application or granted ep patent |
Free format text: STATUS: THE APPLICATION IS DEEMED TO BE WITHDRAWN |
|
18D | Application deemed to be withdrawn |
Effective date: 19930227 |